+2006-05-20 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/31585
+ * config/i386/pmmintrin.h: Do not include xmmintrin.h
+ * config/i386/xmmintrin.h (_mm_extract_pi16): Implement as always
+ inlined function, not as a macro.
+ (_mm_prefetch): Ditto.
+ (_m_pextrw): Ditto.
+ (_mm_insert_pi16): Ditto.
+ (_m_pinsrw): Ditto.
+ (_mm_shuffle_pi16): Ditto. Add const to __N argument.
+ (_m_pshufw): Ditto. Add const to __N argument.
+ (_mm_shufle_ps): Ditto. Add const to __mask argument.
+ * config/i386/emmintrin.h (_mm_slli_epi16): Add const to __B argument.
+ (_mm_slli_epi32): Ditto.
+ (_mm_srli_si128): Implement as always inlined function, not as a macro.
+ Add __inline to function declaration.
+ (_mm_slli_si128): Ditto.
+
2007-05-19 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sfp-machine.h (FP_EX_INVALID, FP_EX_DENORM,
}
static __inline __m128i __attribute__((__always_inline__))
-_mm_slli_epi16 (__m128i __A, int __B)
+_mm_slli_epi16 (__m128i __A, const int __B)
{
return (__m128i)__builtin_ia32_psllwi128 ((__v8hi)__A, __B);
}
static __inline __m128i __attribute__((__always_inline__))
-_mm_slli_epi32 (__m128i __A, int __B)
+_mm_slli_epi32 (__m128i __A, const int __B)
{
return (__m128i)__builtin_ia32_pslldi128 ((__v4si)__A, __B);
}
return (__m128i)__builtin_ia32_psradi128 ((__v4si)__A, __B);
}
-#if 0
-static __m128i __attribute__((__always_inline__))
+static __inline __m128i __attribute__((__always_inline__))
_mm_srli_si128 (__m128i __A, const int __B)
{
return ((__m128i)__builtin_ia32_psrldqi128 (__A, __B * 8));
}
-static __m128i __attribute__((__always_inline__))
-_mm_srli_si128 (__m128i __A, const int __B)
+static __inline __m128i __attribute__((__always_inline__))
+_mm_slli_si128 (__m128i __A, const int __B)
{
return ((__m128i)__builtin_ia32_pslldqi128 (__A, __B * 8));
}
-#else
-#define _mm_srli_si128(__A, __B) \
- ((__m128i)__builtin_ia32_psrldqi128 (__A, (__B) * 8))
-#define _mm_slli_si128(__A, __B) \
- ((__m128i)__builtin_ia32_pslldqi128 (__A, (__B) * 8))
-#endif
static __inline __m128i __attribute__((__always_inline__))
_mm_srli_epi16 (__m128i __A, const int __B)
#else
/* We need definitions from the SSE2 and SSE header files*/
-#include <xmmintrin.h>
#include <emmintrin.h>
/* Additional bits in the MXCSR. */
}
/* Selects four specific SPFP values from A and B based on MASK. */
-#if 0
static __inline __m128 __attribute__((__always_inline__))
-_mm_shuffle_ps (__m128 __A, __m128 __B, int __mask)
+_mm_shuffle_ps (__m128 __A, __m128 __B, int const __mask)
{
return (__m128) __builtin_ia32_shufps ((__v4sf)__A, (__v4sf)__B, __mask);
}
-#else
-#define _mm_shuffle_ps(A, B, MASK) \
- ((__m128) __builtin_ia32_shufps ((__v4sf)(A), (__v4sf)(B), (MASK)))
-#endif
-
/* Selects and interleaves the upper two SPFP values from A and B. */
static __inline __m128 __attribute__((__always_inline__))
}
/* Extracts one of the four words of A. The selector N must be immediate. */
-#if 0
static __inline int __attribute__((__always_inline__))
_mm_extract_pi16 (__m64 const __A, int const __N)
{
{
return _mm_extract_pi16 (__A, __N);
}
-#else
-#define _mm_extract_pi16(A, N) __builtin_ia32_vec_ext_v4hi ((__v4hi)(A), (N))
-#define _m_pextrw(A, N) _mm_extract_pi16((A), (N))
-#endif
/* Inserts word D into one of four words of A. The selector N must be
immediate. */
-#if 0
static __inline __m64 __attribute__((__always_inline__))
_mm_insert_pi16 (__m64 const __A, int const __D, int const __N)
{
{
return _mm_insert_pi16 (__A, __D, __N);
}
-#else
-#define _mm_insert_pi16(A, D, N) \
- ((__m64) __builtin_ia32_vec_set_v4hi ((__v4hi)(A), (D), (N)))
-#define _m_pinsrw(A, D, N) _mm_insert_pi16((A), (D), (N))
-#endif
/* Compute the element-wise maximum of signed 16-bit values. */
static __inline __m64 __attribute__((__always_inline__))
/* Return a combination of the four 16-bit values in A. The selector
must be an immediate. */
-#if 0
static __inline __m64 __attribute__((__always_inline__))
-_mm_shuffle_pi16 (__m64 __A, int __N)
+_mm_shuffle_pi16 (__m64 __A, int const __N)
{
return (__m64) __builtin_ia32_pshufw ((__v4hi)__A, __N);
}
static __inline __m64 __attribute__((__always_inline__))
-_m_pshufw (__m64 __A, int __N)
+_m_pshufw (__m64 __A, int const __N)
{
return _mm_shuffle_pi16 (__A, __N);
}
-#else
-#define _mm_shuffle_pi16(A, N) \
- ((__m64) __builtin_ia32_pshufw ((__v4hi)(A), (N)))
-#define _m_pshufw(A, N) _mm_shuffle_pi16 ((A), (N))
-#endif
/* Conditionally store byte elements of A into P. The high bit of each
byte in the selector N determines whether the corresponding byte from
/* Loads one cache line from address P to a location "closer" to the
processor. The selector I specifies the type of prefetch operation. */
-#if 0
static __inline void __attribute__((__always_inline__))
_mm_prefetch (void *__P, enum _mm_hint __I)
{
__builtin_prefetch (__P, 0, __I);
}
-#else
-#define _mm_prefetch(P, I) \
- __builtin_prefetch ((P), 0, (I))
-#endif
/* Stores the data in A to the address P without polluting the caches. */
static __inline void __attribute__((__always_inline__))
+2006-05-20 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/31585
+ * gcc.target/i386/sse-13.c: Use "-mssse3 -msse4a" compile options.
+ (__builtin_ia32_psllwi128): Redefine to test with immediate operand.
+ (__builtin_ia32_psrlqi128): Ditto.
+ (__builtin_ia32_psrlwi128): Ditto.
+ (__builtin_ia32_psrldi128): Ditto.
+ (__builtin_ia32_psrldqi128): Ditto.
+ (__builtin_ia32_pslldqi128): Ditto.
+ (__builtin_ia32_psrawi128): Ditto.
+ (__builtin_ia32_psradi128): Ditto.
+ (__builtin_ia32_psllqi128): Ditto.
+ (__builtin_ia32_pslldi128): Ditto.
+ (__builtin_prefetch): Ditto.
+ (__builtin_ia32_pshufw): Ditto.
+ (__builtin_ia32_vec_set_v4hi): Ditto.
+ (__builtin_ia32_vec_ext_v4hi): Ditto.
+ (__builtin_ia32_shufps): Ditto.
+ * gcc.target/i386/sse-14.c: Same changes as sse-13.c.
+
2007-05-19 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
PR fortran/31974
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O2 -msse" } */
+/* { dg-options "-O2 -mssse3 -msse4a" } */
/* Test that the intrinsics compile with optimization. All of them are
defined as inline functions in mmintrin.h that reference the proper
#define static
#define __inline
-#include <xmmintrin.h>
+/* Following intrinsics require immediate arguments. */
+
+/* emmintrin.h */
+#define __builtin_ia32_psllwi128(A, B) __builtin_ia32_psllwi128(A, 1)
+#define __builtin_ia32_psrlqi128(A, B) __builtin_ia32_psrlqi128(A, 1)
+#define __builtin_ia32_psrlwi128(A, B) __builtin_ia32_psrlwi128(A, 1)
+#define __builtin_ia32_psrldi128(A, B) __builtin_ia32_psrldi128(A, 1)
+#define __builtin_ia32_psrldqi128(A, B) __builtin_ia32_psrldqi128(A, 8)
+#define __builtin_ia32_pslldqi128(A, B) __builtin_ia32_pslldqi128(A, 8)
+#define __builtin_ia32_psrawi128(A, B) __builtin_ia32_psrawi128(A, 1)
+#define __builtin_ia32_psradi128(A, B) __builtin_ia32_psradi128(A, 1)
+#define __builtin_ia32_psllqi128(A, B) __builtin_ia32_psllqi128(A, 1)
+#define __builtin_ia32_pslldi128(A, B) __builtin_ia32_pslldi128(A, 1)
+
+/* xmmintrin.h */
+#define __builtin_prefetch(P, A, I) __builtin_prefetch(P, A, _MM_HINT_NTA)
+#define __builtin_ia32_pshufw(A, N) __builtin_ia32_pshufw(A, 0)
+#define __builtin_ia32_vec_set_v4hi(A, D, N) \
+ __builtin_ia32_vec_set_v4hi(A, D, 0)
+#define __builtin_ia32_vec_ext_v4hi(A, N) __builtin_ia32_vec_ext_v4hi(A, 0)
+#define __builtin_ia32_shufps(A, B, C) __builtin_ia32_shufps(A, B, 0)
+
+#include <ammintrin.h>
+#include <tmmintrin.h>
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
-/* { dg-options "-O0 -msse" } */
+/* { dg-options "-O0 -mssse3 -msse4a" } */
/* Test that the intrinsics compile without optimization. All of them are
defined as inline functions in mmintrin.h that reference the proper
#define static
#define __inline
-#include <xmmintrin.h>
+/* Following intrinsics require immediate arguments. */
+
+/* emmintrin.h */
+#define __builtin_ia32_psllwi128(A, B) __builtin_ia32_psllwi128(A, 1)
+#define __builtin_ia32_psrlqi128(A, B) __builtin_ia32_psrlqi128(A, 1)
+#define __builtin_ia32_psrlwi128(A, B) __builtin_ia32_psrlwi128(A, 1)
+#define __builtin_ia32_psrldi128(A, B) __builtin_ia32_psrldi128(A, 1)
+#define __builtin_ia32_psrldqi128(A, B) __builtin_ia32_psrldqi128(A, 8)
+#define __builtin_ia32_pslldqi128(A, B) __builtin_ia32_pslldqi128(A, 8)
+#define __builtin_ia32_psrawi128(A, B) __builtin_ia32_psrawi128(A, 1)
+#define __builtin_ia32_psradi128(A, B) __builtin_ia32_psradi128(A, 1)
+#define __builtin_ia32_psllqi128(A, B) __builtin_ia32_psllqi128(A, 1)
+#define __builtin_ia32_pslldi128(A, B) __builtin_ia32_pslldi128(A, 1)
+
+/* xmmintrin.h */
+#define __builtin_prefetch(P, A, I) __builtin_prefetch(P, A, _MM_HINT_NTA)
+#define __builtin_ia32_pshufw(A, N) __builtin_ia32_pshufw(A, 0)
+#define __builtin_ia32_vec_set_v4hi(A, D, N) \
+ __builtin_ia32_vec_set_v4hi(A, D, 0)
+#define __builtin_ia32_vec_ext_v4hi(A, N) __builtin_ia32_vec_ext_v4hi(A, 0)
+#define __builtin_ia32_shufps(A, B, C) __builtin_ia32_shufps(A, B, 0)
+
+#include <ammintrin.h>
+#include <tmmintrin.h>
+
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