tests: Removed 70.twolf tests
authorBobby R. Bruce <bbruce@ucdavis.edu>
Tue, 14 Jan 2020 19:57:41 +0000 (11:57 -0800)
committerBobby R. Bruce <bbruce@ucdavis.edu>
Fri, 24 Jan 2020 06:02:32 +0000 (06:02 +0000)
In an effort to cleanup the old tests, and migrate useful tests to be
executed via `test/main.py`, it has been decided that the
`test/quick/70.twolf` tests should be removed.

Jira: https://gem5.atlassian.net/browse/GEM5-109
Change-Id: I19f2e20298e14a92f49adf0b8369e1fa09e0c1bc
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24383
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
55 files changed:
tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simerr [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/smred.out [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simerr [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-timing/smred.out [deleted file]
tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.out [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf [deleted file]
tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf [deleted file]
tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt [deleted file]
tests/quick/se/70.twolf/test.py [deleted file]

diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index dba6283..0000000
+++ /dev/null
@@ -1,330 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dstage2_mmu dtb interrupts isa istage2_mmu itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[4]
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.membus.slave[3]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/arm/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simerr b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index 04cbe4a..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index 15f6a3c..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 18:00:23
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 54878
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/arm/linux/simple-atomic
-
-Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/smred.sav
-Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-atomic/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 99596491500 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/smred.out b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index 9f00c41..0000000
+++ /dev/null
@@ -1,262 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.099596                      
-sim_ticks                                 99596491500                      
-final_tick                                99596491500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 936229                      
-host_op_rate                                   986937                      
-host_tick_rate                              541124372                      
-host_mem_usage                                 274820                      
-host_seconds                                   184.05                      
-sim_insts                                   172317410                      
-sim_ops                                     181650342                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.physmem.bytes_read::cpu.inst         759440208                      
-system.physmem.bytes_read::cpu.data         110533661                      
-system.physmem.bytes_read::total            869973869                      
-system.physmem.bytes_inst_read::cpu.inst    759440208                      
-system.physmem.bytes_inst_read::total       759440208                      
-system.physmem.bytes_written::cpu.data       45252940                      
-system.physmem.bytes_written::total          45252940                      
-system.physmem.num_reads::cpu.inst          189860052                      
-system.physmem.num_reads::cpu.data           27777721                      
-system.physmem.num_reads::total             217637773                      
-system.physmem.num_writes::cpu.data          12386694                      
-system.physmem.num_writes::total             12386694                      
-system.physmem.bw_read::cpu.inst           7625170290                      
-system.physmem.bw_read::cpu.data           1109814807                      
-system.physmem.bw_read::total              8734985097                      
-system.physmem.bw_inst_read::cpu.inst      7625170290                      
-system.physmem.bw_inst_read::total         7625170290                      
-system.physmem.bw_write::cpu.data           454362792                      
-system.physmem.bw_write::total              454362792                      
-system.physmem.bw_total::cpu.inst          7625170290                      
-system.physmem.bw_total::cpu.data          1564177600                      
-system.physmem.bw_total::total             9189347890                      
-system.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
-system.cpu.dtb.write_accesses                       0                      
-system.cpu.dtb.inst_accesses                        0                      
-system.cpu.dtb.hits                                 0                      
-system.cpu.dtb.misses                               0                      
-system.cpu.dtb.accesses                             0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.istage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.istage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.istage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.istage2_mmu.stage2_tlb.hits              0                      
-system.cpu.istage2_mmu.stage2_tlb.misses            0                      
-system.cpu.istage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.cpu.itb.walker.walks                         0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.itb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.itb.walker.walkRequestOrigin::total            0                      
-system.cpu.itb.inst_hits                            0                      
-system.cpu.itb.inst_misses                          0                      
-system.cpu.itb.read_hits                            0                      
-system.cpu.itb.read_misses                          0                      
-system.cpu.itb.write_hits                           0                      
-system.cpu.itb.write_misses                         0                      
-system.cpu.itb.flush_tlb                            0                      
-system.cpu.itb.flush_tlb_mva                        0                      
-system.cpu.itb.flush_tlb_mva_asid                   0                      
-system.cpu.itb.flush_tlb_asid                       0                      
-system.cpu.itb.flush_entries                        0                      
-system.cpu.itb.align_faults                         0                      
-system.cpu.itb.prefetch_faults                      0                      
-system.cpu.itb.domain_faults                        0                      
-system.cpu.itb.perms_faults                         0                      
-system.cpu.itb.read_accesses                        0                      
-system.cpu.itb.write_accesses                       0                      
-system.cpu.itb.inst_accesses                        0                      
-system.cpu.itb.hits                                 0                      
-system.cpu.itb.misses                               0                      
-system.cpu.itb.accesses                             0                      
-system.cpu.workload.numSyscalls                   400                      
-system.cpu.pwrStateResidencyTicks::ON     99596491500                      
-system.cpu.numCycles                        199192984                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                   172317410                      
-system.cpu.committedOps                     181650342                      
-system.cpu.num_int_alu_accesses             143085668                      
-system.cpu.num_fp_alu_accesses                1752310                      
-system.cpu.num_func_calls                     3545028                      
-system.cpu.num_conditional_control_insts     32201008                      
-system.cpu.num_int_insts                    143085668                      
-system.cpu.num_fp_insts                       1752310                      
-system.cpu.num_int_register_reads           238310719                      
-system.cpu.num_int_register_writes           98192342                      
-system.cpu.num_fp_register_reads              2822225                      
-system.cpu.num_fp_register_writes             2378039                      
-system.cpu.num_cc_register_reads            543309970                      
-system.cpu.num_cc_register_writes           190815535                      
-system.cpu.num_mem_refs                      40540779                      
-system.cpu.num_load_insts                    27896144                      
-system.cpu.num_store_insts                   12644635                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                  199192984                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                          40300312                      
-system.cpu.op_class::No_OpClass                     0      0.00%      0.00%
-system.cpu.op_class::IntAlu                 138988213     76.51%     76.51%
-system.cpu.op_class::IntMult                   908940      0.50%     77.01%
-system.cpu.op_class::IntDiv                         0      0.00%     77.01%
-system.cpu.op_class::FloatAdd                       0      0.00%     77.01%
-system.cpu.op_class::FloatCmp                       0      0.00%     77.01%
-system.cpu.op_class::FloatCvt                       0      0.00%     77.01%
-system.cpu.op_class::FloatMult                      0      0.00%     77.01%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     77.01%
-system.cpu.op_class::FloatDiv                       0      0.00%     77.01%
-system.cpu.op_class::FloatMisc                      0      0.00%     77.01%
-system.cpu.op_class::FloatSqrt                      0      0.00%     77.01%
-system.cpu.op_class::SimdAdd                        0      0.00%     77.01%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     77.01%
-system.cpu.op_class::SimdAlu                        0      0.00%     77.01%
-system.cpu.op_class::SimdCmp                        0      0.00%     77.01%
-system.cpu.op_class::SimdCvt                        0      0.00%     77.01%
-system.cpu.op_class::SimdMisc                       0      0.00%     77.01%
-system.cpu.op_class::SimdMult                       0      0.00%     77.01%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     77.01%
-system.cpu.op_class::SimdShift                      0      0.00%     77.01%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     77.01%
-system.cpu.op_class::SimdSqrt                       0      0.00%     77.01%
-system.cpu.op_class::SimdFloatAdd               32754      0.02%     77.03%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     77.03%
-system.cpu.op_class::SimdFloatCmp              154829      0.09%     77.12%
-system.cpu.op_class::SimdFloatCvt              238880      0.13%     77.25%
-system.cpu.op_class::SimdFloatDiv               76016      0.04%     77.29%
-system.cpu.op_class::SimdFloatMisc             437591      0.24%     77.53%
-system.cpu.op_class::SimdFloatMult             200806      0.11%     77.64%
-system.cpu.op_class::SimdFloatMultAcc           71617      0.04%     77.68%
-system.cpu.op_class::SimdFloatSqrt                318      0.00%     77.68%
-system.cpu.op_class::MemRead                 27348059     15.06%     92.74%
-system.cpu.op_class::MemWrite                12498389      6.88%     99.62%
-system.cpu.op_class::FloatMemRead              548085      0.30%     99.92%
-system.cpu.op_class::FloatMemWrite             146246      0.08%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                  181650743                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED  99596491500                      
-system.membus.trans_dist::ReadReq           217614903                      
-system.membus.trans_dist::ReadResp          217637310                      
-system.membus.trans_dist::WriteReq           12364287                      
-system.membus.trans_dist::WriteResp          12364287                      
-system.membus.trans_dist::SoftPFReq               463                      
-system.membus.trans_dist::SoftPFResp              463                      
-system.membus.trans_dist::LoadLockedReq         22407                      
-system.membus.trans_dist::StoreCondReq          22407                      
-system.membus.trans_dist::StoreCondResp         22407                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port    379720104                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port     80328830                      
-system.membus.pkt_count::total              460048934                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port    759440208                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port    155786601                      
-system.membus.pkt_size::total               915226809                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples         230024467                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0               230024467    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total           230024467                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 5b49b59..0000000
+++ /dev/null
@@ -1,499 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dstage2_mmu dtb icache interrupts isa istage2_mmu itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dstage2_mmu=system.cpu.dstage2_mmu
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-istage2_mmu=system.cpu.istage2_mmu
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dstage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.dtb
-
-[system.cpu.dstage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.dstage2_mmu.stage2_tlb.walker
-
-[system.cpu.dstage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.dtb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=ArmInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=ArmISA
-decoderFlavour=Generic
-eventq_index=0
-fpsid=1090793632
-id_aa64afr0_el1=0
-id_aa64afr1_el1=0
-id_aa64dfr0_el1=1052678
-id_aa64dfr1_el1=0
-id_aa64isar0_el1=0
-id_aa64isar1_el1=0
-id_aa64mmfr0_el1=15728642
-id_aa64mmfr1_el1=0
-id_isar0=34607377
-id_isar1=34677009
-id_isar2=555950401
-id_isar3=17899825
-id_isar4=268501314
-id_isar5=0
-id_mmfr0=270536963
-id_mmfr1=0
-id_mmfr2=19070976
-id_mmfr3=34611729
-midr=1091551472
-pmu=Null
-system=system
-
-[system.cpu.istage2_mmu]
-type=ArmStage2MMU
-children=stage2_tlb
-eventq_index=0
-stage2_tlb=system.cpu.istage2_mmu.stage2_tlb
-sys=system
-tlb=system.cpu.itb
-
-[system.cpu.istage2_mmu.stage2_tlb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=true
-size=32
-walker=system.cpu.istage2_mmu.stage2_tlb.walker
-
-[system.cpu.istage2_mmu.stage2_tlb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=true
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-
-[system.cpu.itb]
-type=ArmTLB
-children=walker
-eventq_index=0
-is_stage2=false
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=ArmTableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-is_stage2=false
-num_squash_per_cycle=2
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sys=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/arm/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simerr b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index 04cbe4a..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/simout
deleted file mode 100755 (executable)
index 07d5ab0..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simout
-Redirecting stderr to build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 17:55:48
-gem5 started Apr  3 2017 17:57:55
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 54318
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/arm/linux/simple-timing
-
-Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/smred.sav
-Couldn't unlink  build/ARM/tests/opt/quick/se/70.twolf/arm/linux/simple-timing/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 230201146500 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/smred.out b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index fa75e6a..0000000
+++ /dev/null
@@ -1,669 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.230201                      
-sim_ticks                                230201146500                      
-final_tick                               230201146500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 699032                      
-host_op_rate                                   736956                      
-host_tick_rate                              936426495                      
-host_mem_usage                                 284812                      
-host_seconds                                   245.83                      
-sim_insts                                   171842484                      
-sim_ops                                     181165371                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED 230201146500                      
-system.physmem.bytes_read::cpu.inst            110656                      
-system.physmem.bytes_read::cpu.data            110336                      
-system.physmem.bytes_read::total               220992                      
-system.physmem.bytes_inst_read::cpu.inst       110656                      
-system.physmem.bytes_inst_read::total          110656                      
-system.physmem.num_reads::cpu.inst               1729                      
-system.physmem.num_reads::cpu.data               1724                      
-system.physmem.num_reads::total                  3453                      
-system.physmem.bw_read::cpu.inst               480693                      
-system.physmem.bw_read::cpu.data               479303                      
-system.physmem.bw_read::total                  959995                      
-system.physmem.bw_inst_read::cpu.inst          480693                      
-system.physmem.bw_inst_read::total             480693                      
-system.physmem.bw_total::cpu.inst              480693                      
-system.physmem.bw_total::cpu.data              479303                      
-system.physmem.bw_total::total                 959995                      
-system.pwrStateResidencyTicks::UNDEFINED 230201146500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walks            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_hits            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid            0                      
-system.cpu.dstage2_mmu.stage2_tlb.flush_entries            0                      
-system.cpu.dstage2_mmu.stage2_tlb.align_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.domain_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.perms_faults            0                      
-system.cpu.dstage2_mmu.stage2_tlb.read_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.write_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.inst_accesses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.hits              0                      
-system.cpu.dstage2_mmu.stage2_tlb.misses            0                      
-system.cpu.dstage2_mmu.stage2_tlb.accesses            0                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 230201146500                      
-system.cpu.dtb.walker.walks                         0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Requested::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Data            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst            0                      
-system.cpu.dtb.walker.walkRequestOrigin_Completed::total            0                      
-system.cpu.dtb.walker.walkRequestOrigin::total            0                      
-system.cpu.dtb.inst_hits                            0                      
-system.cpu.dtb.inst_misses                          0                      
-system.cpu.dtb.read_hits                            0                      
-system.cpu.dtb.read_misses                          0                      
-system.cpu.dtb.write_hits                           0                      
-system.cpu.dtb.write_misses                         0                      
-system.cpu.dtb.flush_tlb                            0                      
-system.cpu.dtb.flush_tlb_mva                        0                      
-system.cpu.dtb.flush_tlb_mva_asid                   0                      
-system.cpu.dtb.flush_tlb_asid                       0                      
-system.cpu.dtb.flush_entries                        0                      
-system.cpu.dtb.align_faults                         0                      
-system.cpu.dtb.prefetch_faults                      0                      
-system.cpu.dtb.domain_faults                        0                      
-system.cpu.dtb.perms_faults                         0                      
-system.cpu.dtb.read_accesses                        0                      
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-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 230201146500                      
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-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
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-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    3453    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                3453                      
-system.membus.reqLayer0.occupancy             3601500                      
-system.membus.reqLayer0.utilization               0.0                      
-system.membus.respLayer1.occupancy           17265000                      
-system.membus.respLayer1.utilization              0.0                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index a38ce2f..0000000
+++ /dev/null
@@ -1,213 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/sparc/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index 04cbe4a..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index 22a19a0..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 18:41:19
-gem5 started Apr  3 2017 18:41:37
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64822
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/sparc/linux/simple-atomic
-
-Couldn't unlink  build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/smred.sav
-Couldn't unlink  build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-atomic/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 96722945000 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin
deleted file mode 100644 (file)
index 62b922e..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-$COUNT_1/$AND2_1/$ND2_1$Z 1 $COUNT_1/$AND2_1/$ND2_1 00#Z 17 52 2 1 0
-$COUNT_1/$AND2_1/$ND2_1$Z 1 ACOUNT_1 00#A 15 26 2 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#K 25 78 3 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#J 23 78 3 -1 0
-B7 3 $COUNT_1/$AND2_2/$ND2_1 00#A 9 26 2 -1 0
-B7 3 ACOUNT_1 01#Z 17 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#K 25 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#J 23 26 2 -1 0
-B6 5 $COUNT_1/$AND2_3/$IV_1 01#Z 7 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$FJK3_1 01#Q 81 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$AND2_1/$ND2_1 00#B 19 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$FJK3_2 00#Q 81 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$AND2_2/$ND2_1 01#B 11 26 2 -1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$ND2_1 00#Z 5 52 2 1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$IV_1 00#A 5 26 2 -1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$ND2_1 00#Z 7 52 2 1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$IV_1 00#A 3 26 2 -1 0
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1
deleted file mode 100644 (file)
index bdc569e..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-$COUNT_1/$AND2_4/$IV_1 0 0  4 26  0 1
-$COUNT_1/$AND2_3/$IV_1 4 0  8 26  2 1
-$COUNT_1/$AND2_2/$ND2_1 8 0  14 26  0 1
-ACOUNT_1 14 0  18 26  2 1
-twfeed1 18 0  22 26  0 1
-$COUNT_1/$FJK3_1 22 0  86 26  0 1
-$COUNT_1/$AND2_3/$ND2_1 0 52  6 78  0 2
-$COUNT_1/$AND2_4/$ND2_1 6 52  12 78  2 2
-$COUNT_1/$AND2_2/$IV_1 12 52  16 78  2 2
-$COUNT_1/$AND2_1/$ND2_1 16 52  22 78  2 2
-$COUNT_1/$FJK3_2 22 52  86 78  0 2
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2
deleted file mode 100644 (file)
index 6e2601e..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-1 0 0  86 26  0 0
-2 0 52  86 78  0 0
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav
deleted file mode 100644 (file)
index 04c8e99..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-0.009592
-121
-0
-1
-0.000000
-0.500000
-3.906156
-1
-1 1 2 37 13
-2 2 0 34 65
-3 2 2 63 65
-4 1 0 59 13
-5 1 2 32 13
-6 2 0 23 65
-7 1 2 12 13
-8 2 0 6 65
-9 1 0 70 13
-10 2 0 70 65
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2
deleted file mode 100644 (file)
index 9dd68ec..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-0.001000
-123
-0
-2
-0.000000
-0.500000
-3.906156
-1
-1 1 2 16 13
-2 2 2 19 65
-3 2 2 14 65
-4 1 0 11 13
-5 1 2 6 13
-6 2 0 3 65
-7 1 0 2 13
-8 2 2 9 65
-9 1 0 50 13
-10 2 0 54 65
-11 1 0 84 13
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf
deleted file mode 100644 (file)
index a4c2eac..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-net 1
-segment channel 2
- pin1 1  pin2 7 0 0
-net 2
-segment channel 3
-pin1 41  pin2 42 0 0
-segment channel 2
-pin1 12  pin2 3 0 0
-net 3
-segment channel 2
-pin1 35  pin2 36 0 0
-segment channel 2
-pin1 19  pin2 35 0 0
-net 4
-segment channel 2
- pin1 5  pin2 38 0 0
-net 5
-net 7
-segment channel 2
- pin1 14  pin2 43 0 0
-net 8
-segment channel 2
- pin1 23  pin2 17 0 0
-net 9
-net 11
-segment channel 2
- pin1 25  pin2 31 0 0
-net 14
-net 15
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index e75fdc7..0000000
+++ /dev/null
@@ -1,139 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.096723                      
-sim_ticks                                 96722945000                      
-final_tick                                96722945000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                1253206                      
-host_op_rate                                  1253207                      
-host_tick_rate                              626607046                      
-host_mem_usage                                 258716                      
-host_seconds                                   154.36                      
-sim_insts                                   193444518                      
-sim_ops                                     193444756                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED  96722945000                      
-system.physmem.bytes_read::cpu.inst         773782140                      
-system.physmem.bytes_read::cpu.data         223463413                      
-system.physmem.bytes_read::total            997245553                      
-system.physmem.bytes_inst_read::cpu.inst    773782140                      
-system.physmem.bytes_inst_read::total       773782140                      
-system.physmem.bytes_written::cpu.data       72065412                      
-system.physmem.bytes_written::total          72065412                      
-system.physmem.num_reads::cpu.inst          193445535                      
-system.physmem.num_reads::cpu.data           57735068                      
-system.physmem.num_reads::total             251180603                      
-system.physmem.num_writes::cpu.data          18976439                      
-system.physmem.num_writes::total             18976439                      
-system.physmem.num_other::cpu.data              22406                      
-system.physmem.num_other::total                 22406                      
-system.physmem.bw_read::cpu.inst           7999985319                      
-system.physmem.bw_read::cpu.data           2310345420                      
-system.physmem.bw_read::total             10310330739                      
-system.physmem.bw_inst_read::cpu.inst      7999985319                      
-system.physmem.bw_inst_read::total         7999985319                      
-system.physmem.bw_write::cpu.data           745070490                      
-system.physmem.bw_write::total              745070490                      
-system.physmem.bw_total::cpu.inst          7999985319                      
-system.physmem.bw_total::cpu.data          3055415910                      
-system.physmem.bw_total::total            11055401229                      
-system.pwrStateResidencyTicks::UNDEFINED  96722945000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.workload.numSyscalls                   401                      
-system.cpu.pwrStateResidencyTicks::ON     96722945000                      
-system.cpu.numCycles                        193445891                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                   193444518                      
-system.cpu.committedOps                     193444756                      
-system.cpu.num_int_alu_accesses             167974806                      
-system.cpu.num_fp_alu_accesses                1970372                      
-system.cpu.num_func_calls                     1957920                      
-system.cpu.num_conditional_control_insts      8665106                      
-system.cpu.num_int_insts                    167974806                      
-system.cpu.num_fp_insts                       1970372                      
-system.cpu.num_int_register_reads           352617941                      
-system.cpu.num_int_register_writes          163060124                      
-system.cpu.num_fp_register_reads              3181089                      
-system.cpu.num_fp_register_writes             2974850                      
-system.cpu.num_mem_refs                      76733958                      
-system.cpu.num_load_insts                    57735091                      
-system.cpu.num_store_insts                   18998867                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                  193445891                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                          15132745                      
-system.cpu.op_class::No_OpClass              13329871      6.89%      6.89%
-system.cpu.op_class::IntAlu                 102506896     52.99%     59.88%
-system.cpu.op_class::IntMult                        0      0.00%     59.88%
-system.cpu.op_class::IntDiv                         0      0.00%     59.88%
-system.cpu.op_class::FloatAdd                  875036      0.45%     60.33%
-system.cpu.op_class::FloatCmp                       0      0.00%     60.33%
-system.cpu.op_class::FloatCvt                       0      0.00%     60.33%
-system.cpu.op_class::FloatMult                      0      0.00%     60.33%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     60.33%
-system.cpu.op_class::FloatDiv                       0      0.00%     60.33%
-system.cpu.op_class::FloatMisc                      0      0.00%     60.33%
-system.cpu.op_class::FloatSqrt                      0      0.00%     60.33%
-system.cpu.op_class::SimdAdd                        0      0.00%     60.33%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     60.33%
-system.cpu.op_class::SimdAlu                        0      0.00%     60.33%
-system.cpu.op_class::SimdCmp                        0      0.00%     60.33%
-system.cpu.op_class::SimdCvt                        0      0.00%     60.33%
-system.cpu.op_class::SimdMisc                       0      0.00%     60.33%
-system.cpu.op_class::SimdMult                       0      0.00%     60.33%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     60.33%
-system.cpu.op_class::SimdShift                      0      0.00%     60.33%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     60.33%
-system.cpu.op_class::SimdSqrt                       0      0.00%     60.33%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     60.33%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     60.33%
-system.cpu.op_class::MemRead                 56837780     29.38%     89.71%
-system.cpu.op_class::MemWrite                18800854      9.72%     99.43%
-system.cpu.op_class::FloatMemRead              897323      0.46%     99.90%
-system.cpu.op_class::FloatMemWrite             198013      0.10%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                  193445773                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED  96722945000                      
-system.membus.trans_dist::ReadReq           251180603                      
-system.membus.trans_dist::ReadResp          251180603                      
-system.membus.trans_dist::WriteReq           18976439                      
-system.membus.trans_dist::WriteResp          18976439                      
-system.membus.trans_dist::SwapReq               22406                      
-system.membus.trans_dist::SwapResp              22406                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port    386891070                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port    153467826                      
-system.membus.pkt_count::total              540358896                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port    773782140                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port    295708073                      
-system.membus.pkt_size::total              1069490213                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples         270179448                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0               270179448    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total           270179448                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 02b45e3..0000000
+++ /dev/null
@@ -1,382 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=SparcInterrupts
-eventq_index=0
-
-[system.cpu.isa]
-type=SparcISA
-eventq_index=0
-
-[system.cpu.itb]
-type=SparcTLB
-eventq_index=0
-size=64
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/sparc/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port
-slave=system.system_port system.cpu.l2cache.mem_side
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index 04cbe4a..0000000
+++ /dev/null
@@ -1,4 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/simout
deleted file mode 100755 (executable)
index ba3d0f6..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simout
-Redirecting stderr to build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 18:41:19
-gem5 started Apr  3 2017 18:41:39
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 64871
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/SPARC/gem5.opt -d build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/sparc/linux/simple-timing
-
-Couldn't unlink  build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/smred.sav
-Couldn't unlink  build/SPARC/tests/opt/quick/se/70.twolf/sparc/linux/simple-timing/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 270604702500 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.out b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin
deleted file mode 100644 (file)
index 62b922e..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-$COUNT_1/$AND2_1/$ND2_1$Z 1 $COUNT_1/$AND2_1/$ND2_1 00#Z 17 52 2 1 0
-$COUNT_1/$AND2_1/$ND2_1$Z 1 ACOUNT_1 00#A 15 26 2 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#K 25 78 3 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#J 23 78 3 -1 0
-B7 3 $COUNT_1/$AND2_2/$ND2_1 00#A 9 26 2 -1 0
-B7 3 ACOUNT_1 01#Z 17 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#K 25 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#J 23 26 2 -1 0
-B6 5 $COUNT_1/$AND2_3/$IV_1 01#Z 7 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$FJK3_1 01#Q 81 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$AND2_1/$ND2_1 00#B 19 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$FJK3_2 00#Q 81 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$AND2_2/$ND2_1 01#B 11 26 2 -1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$ND2_1 00#Z 5 52 2 1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$IV_1 00#A 5 26 2 -1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$ND2_1 00#Z 7 52 2 1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$IV_1 00#A 3 26 2 -1 0
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1
deleted file mode 100644 (file)
index bdc569e..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-$COUNT_1/$AND2_4/$IV_1 0 0  4 26  0 1
-$COUNT_1/$AND2_3/$IV_1 4 0  8 26  2 1
-$COUNT_1/$AND2_2/$ND2_1 8 0  14 26  0 1
-ACOUNT_1 14 0  18 26  2 1
-twfeed1 18 0  22 26  0 1
-$COUNT_1/$FJK3_1 22 0  86 26  0 1
-$COUNT_1/$AND2_3/$ND2_1 0 52  6 78  0 2
-$COUNT_1/$AND2_4/$ND2_1 6 52  12 78  2 2
-$COUNT_1/$AND2_2/$IV_1 12 52  16 78  2 2
-$COUNT_1/$AND2_1/$ND2_1 16 52  22 78  2 2
-$COUNT_1/$FJK3_2 22 52  86 78  0 2
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2
deleted file mode 100644 (file)
index 6e2601e..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-1 0 0  86 26  0 0
-2 0 52  86 78  0 0
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav
deleted file mode 100644 (file)
index 04c8e99..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-0.009592
-121
-0
-1
-0.000000
-0.500000
-3.906156
-1
-1 1 2 37 13
-2 2 0 34 65
-3 2 2 63 65
-4 1 0 59 13
-5 1 2 32 13
-6 2 0 23 65
-7 1 2 12 13
-8 2 0 6 65
-9 1 0 70 13
-10 2 0 70 65
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2
deleted file mode 100644 (file)
index 9dd68ec..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-0.001000
-123
-0
-2
-0.000000
-0.500000
-3.906156
-1
-1 1 2 16 13
-2 2 2 19 65
-3 2 2 14 65
-4 1 0 11 13
-5 1 2 6 13
-6 2 0 3 65
-7 1 0 2 13
-8 2 2 9 65
-9 1 0 50 13
-10 2 0 54 65
-11 1 0 84 13
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf
deleted file mode 100644 (file)
index a4c2eac..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-net 1
-segment channel 2
- pin1 1  pin2 7 0 0
-net 2
-segment channel 3
-pin1 41  pin2 42 0 0
-segment channel 2
-pin1 12  pin2 3 0 0
-net 3
-segment channel 2
-pin1 35  pin2 36 0 0
-segment channel 2
-pin1 19  pin2 35 0 0
-net 4
-segment channel 2
- pin1 5  pin2 38 0 0
-net 5
-net 7
-segment channel 2
- pin1 14  pin2 43 0 0
-net 8
-segment channel 2
- pin1 23  pin2 17 0 0
-net 9
-net 11
-segment channel 2
- pin1 25  pin2 31 0 0
-net 14
-net 15
diff --git a/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index dadd279..0000000
+++ /dev/null
@@ -1,536 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.270605                      
-sim_ticks                                270604702500                      
-final_tick                               270604702500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 850262                      
-host_op_rate                                   850263                      
-host_tick_rate                             1189410021                      
-host_mem_usage                                 267428                      
-host_seconds                                   227.51                      
-sim_insts                                   193444518                      
-sim_ops                                     193444756                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED 270604702500                      
-system.physmem.bytes_read::cpu.inst            230208                      
-system.physmem.bytes_read::cpu.data            100864                      
-system.physmem.bytes_read::total               331072                      
-system.physmem.bytes_inst_read::cpu.inst       230208                      
-system.physmem.bytes_inst_read::total          230208                      
-system.physmem.num_reads::cpu.inst               3597                      
-system.physmem.num_reads::cpu.data               1576                      
-system.physmem.num_reads::total                  5173                      
-system.physmem.bw_read::cpu.inst               850717                      
-system.physmem.bw_read::cpu.data               372736                      
-system.physmem.bw_read::total                 1223453                      
-system.physmem.bw_inst_read::cpu.inst          850717                      
-system.physmem.bw_inst_read::total             850717                      
-system.physmem.bw_total::cpu.inst              850717                      
-system.physmem.bw_total::cpu.data              372736                      
-system.physmem.bw_total::total                1223453                      
-system.pwrStateResidencyTicks::UNDEFINED 270604702500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.workload.numSyscalls                   401                      
-system.cpu.pwrStateResidencyTicks::ON    270604702500                      
-system.cpu.numCycles                        541209405                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                   193444518                      
-system.cpu.committedOps                     193444756                      
-system.cpu.num_int_alu_accesses             167974806                      
-system.cpu.num_fp_alu_accesses                1970372                      
-system.cpu.num_func_calls                     1957920                      
-system.cpu.num_conditional_control_insts      8665106                      
-system.cpu.num_int_insts                    167974806                      
-system.cpu.num_fp_insts                       1970372                      
-system.cpu.num_int_register_reads           352617941                      
-system.cpu.num_int_register_writes          163060123                      
-system.cpu.num_fp_register_reads              3181089                      
-system.cpu.num_fp_register_writes             2974850                      
-system.cpu.num_mem_refs                      76733958                      
-system.cpu.num_load_insts                    57735091                      
-system.cpu.num_store_insts                   18998867                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                  541209405                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                          15132745                      
-system.cpu.op_class::No_OpClass              13329871      6.89%      6.89%
-system.cpu.op_class::IntAlu                 102506896     52.99%     59.88%
-system.cpu.op_class::IntMult                        0      0.00%     59.88%
-system.cpu.op_class::IntDiv                         0      0.00%     59.88%
-system.cpu.op_class::FloatAdd                  875036      0.45%     60.33%
-system.cpu.op_class::FloatCmp                       0      0.00%     60.33%
-system.cpu.op_class::FloatCvt                       0      0.00%     60.33%
-system.cpu.op_class::FloatMult                      0      0.00%     60.33%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     60.33%
-system.cpu.op_class::FloatDiv                       0      0.00%     60.33%
-system.cpu.op_class::FloatMisc                      0      0.00%     60.33%
-system.cpu.op_class::FloatSqrt                      0      0.00%     60.33%
-system.cpu.op_class::SimdAdd                        0      0.00%     60.33%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     60.33%
-system.cpu.op_class::SimdAlu                        0      0.00%     60.33%
-system.cpu.op_class::SimdCmp                        0      0.00%     60.33%
-system.cpu.op_class::SimdCvt                        0      0.00%     60.33%
-system.cpu.op_class::SimdMisc                       0      0.00%     60.33%
-system.cpu.op_class::SimdMult                       0      0.00%     60.33%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     60.33%
-system.cpu.op_class::SimdShift                      0      0.00%     60.33%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     60.33%
-system.cpu.op_class::SimdSqrt                       0      0.00%     60.33%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     60.33%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     60.33%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     60.33%
-system.cpu.op_class::MemRead                 56837780     29.38%     89.71%
-system.cpu.op_class::MemWrite                18800854      9.72%     99.43%
-system.cpu.op_class::FloatMemRead              897323      0.46%     99.90%
-system.cpu.op_class::FloatMemWrite             198013      0.10%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                  193445773                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 270604702500                      
-system.cpu.dcache.tags.replacements                 2                      
-system.cpu.dcache.tags.tagsinuse          1237.152973                      
-system.cpu.dcache.tags.total_refs            76732337                      
-system.cpu.dcache.tags.sampled_refs              1576                      
-system.cpu.dcache.tags.avg_refs          48688.031091                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data  1237.152973                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.302039                      
-system.cpu.dcache.tags.occ_percent::total     0.302039                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024         1574                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0            5                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1           22                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::2           39                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::3          271                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::4         1237                      
-system.cpu.dcache.tags.occ_task_id_percent::1024     0.384277                      
-system.cpu.dcache.tags.tag_accesses         153469402                      
-system.cpu.dcache.tags.data_accesses        153469402                      
-system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 270604702500                      
-system.cpu.dcache.ReadReq_hits::cpu.data     57734570                      
-system.cpu.dcache.ReadReq_hits::total        57734570                      
-system.cpu.dcache.WriteReq_hits::cpu.data     18975362                      
-system.cpu.dcache.WriteReq_hits::total       18975362                      
-system.cpu.dcache.SwapReq_hits::cpu.data        22405                      
-system.cpu.dcache.SwapReq_hits::total           22405                      
-system.cpu.dcache.demand_hits::cpu.data      76709932                      
-system.cpu.dcache.demand_hits::total         76709932                      
-system.cpu.dcache.overall_hits::cpu.data     76709932                      
-system.cpu.dcache.overall_hits::total        76709932                      
-system.cpu.dcache.ReadReq_misses::cpu.data          498                      
-system.cpu.dcache.ReadReq_misses::total           498                      
-system.cpu.dcache.WriteReq_misses::cpu.data         1077                      
-system.cpu.dcache.WriteReq_misses::total         1077                      
-system.cpu.dcache.SwapReq_misses::cpu.data            1                      
-system.cpu.dcache.SwapReq_misses::total             1                      
-system.cpu.dcache.demand_misses::cpu.data         1575                      
-system.cpu.dcache.demand_misses::total           1575                      
-system.cpu.dcache.overall_misses::cpu.data         1575                      
-system.cpu.dcache.overall_misses::total          1575                      
-system.cpu.dcache.ReadReq_miss_latency::cpu.data     31375500                      
-system.cpu.dcache.ReadReq_miss_latency::total     31375500                      
-system.cpu.dcache.WriteReq_miss_latency::cpu.data     67852000                      
-system.cpu.dcache.WriteReq_miss_latency::total     67852000                      
-system.cpu.dcache.SwapReq_miss_latency::cpu.data        63000                      
-system.cpu.dcache.SwapReq_miss_latency::total        63000                      
-system.cpu.dcache.demand_miss_latency::cpu.data     99227500                      
-system.cpu.dcache.demand_miss_latency::total     99227500                      
-system.cpu.dcache.overall_miss_latency::cpu.data     99227500                      
-system.cpu.dcache.overall_miss_latency::total     99227500                      
-system.cpu.dcache.ReadReq_accesses::cpu.data     57735068                      
-system.cpu.dcache.ReadReq_accesses::total     57735068                      
-system.cpu.dcache.WriteReq_accesses::cpu.data     18976439                      
-system.cpu.dcache.WriteReq_accesses::total     18976439                      
-system.cpu.dcache.SwapReq_accesses::cpu.data        22406                      
-system.cpu.dcache.SwapReq_accesses::total        22406                      
-system.cpu.dcache.demand_accesses::cpu.data     76711507                      
-system.cpu.dcache.demand_accesses::total     76711507                      
-system.cpu.dcache.overall_accesses::cpu.data     76711507                      
-system.cpu.dcache.overall_accesses::total     76711507                      
-system.cpu.dcache.ReadReq_miss_rate::cpu.data     0.000009                      
-system.cpu.dcache.ReadReq_miss_rate::total     0.000009                      
-system.cpu.dcache.WriteReq_miss_rate::cpu.data     0.000057                      
-system.cpu.dcache.WriteReq_miss_rate::total     0.000057                      
-system.cpu.dcache.SwapReq_miss_rate::cpu.data     0.000045                      
-system.cpu.dcache.SwapReq_miss_rate::total     0.000045                      
-system.cpu.dcache.demand_miss_rate::cpu.data     0.000021                      
-system.cpu.dcache.demand_miss_rate::total     0.000021                      
-system.cpu.dcache.overall_miss_rate::cpu.data     0.000021                      
-system.cpu.dcache.overall_miss_rate::total     0.000021                      
-system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 63003.012048                      
-system.cpu.dcache.ReadReq_avg_miss_latency::total 63003.012048                      
-system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 63000.928505                      
-system.cpu.dcache.WriteReq_avg_miss_latency::total 63000.928505                      
-system.cpu.dcache.SwapReq_avg_miss_latency::cpu.data        63000                      
-system.cpu.dcache.SwapReq_avg_miss_latency::total        63000                      
-system.cpu.dcache.demand_avg_miss_latency::cpu.data 63001.587302                      
-system.cpu.dcache.demand_avg_miss_latency::total 63001.587302                      
-system.cpu.dcache.overall_avg_miss_latency::cpu.data 63001.587302                      
-system.cpu.dcache.overall_avg_miss_latency::total 63001.587302                      
-system.cpu.dcache.blocked_cycles::no_mshrs            0                      
-system.cpu.dcache.blocked_cycles::no_targets            0                      
-system.cpu.dcache.blocked::no_mshrs                 0                      
-system.cpu.dcache.blocked::no_targets               0                      
-system.cpu.dcache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.dcache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.dcache.writebacks::writebacks            2                      
-system.cpu.dcache.writebacks::total                 2                      
-system.cpu.dcache.ReadReq_mshr_misses::cpu.data          498                      
-system.cpu.dcache.ReadReq_mshr_misses::total          498                      
-system.cpu.dcache.WriteReq_mshr_misses::cpu.data         1077                      
-system.cpu.dcache.WriteReq_mshr_misses::total         1077                      
-system.cpu.dcache.SwapReq_mshr_misses::cpu.data            1                      
-system.cpu.dcache.SwapReq_mshr_misses::total            1                      
-system.cpu.dcache.demand_mshr_misses::cpu.data         1575                      
-system.cpu.dcache.demand_mshr_misses::total         1575                      
-system.cpu.dcache.overall_mshr_misses::cpu.data         1575                      
-system.cpu.dcache.overall_mshr_misses::total         1575                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data     30877500                      
-system.cpu.dcache.ReadReq_mshr_miss_latency::total     30877500                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data     66775000                      
-system.cpu.dcache.WriteReq_mshr_miss_latency::total     66775000                      
-system.cpu.dcache.SwapReq_mshr_miss_latency::cpu.data        62000                      
-system.cpu.dcache.SwapReq_mshr_miss_latency::total        62000                      
-system.cpu.dcache.demand_mshr_miss_latency::cpu.data     97652500                      
-system.cpu.dcache.demand_mshr_miss_latency::total     97652500                      
-system.cpu.dcache.overall_mshr_miss_latency::cpu.data     97652500                      
-system.cpu.dcache.overall_mshr_miss_latency::total     97652500                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data     0.000009                      
-system.cpu.dcache.ReadReq_mshr_miss_rate::total     0.000009                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data     0.000057                      
-system.cpu.dcache.WriteReq_mshr_miss_rate::total     0.000057                      
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-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples        13864                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.000072                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.008493                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0              13863     99.99%     99.99%
-system.cpu.toL2Bus.snoop_fanout::1                  1      0.01%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total          13864                      
-system.cpu.toL2Bus.reqLayer0.occupancy       22478000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.0                      
-system.cpu.toL2Bus.respLayer0.occupancy      18432000                      
-system.cpu.toL2Bus.respLayer0.utilization          0.0                      
-system.cpu.toL2Bus.respLayer1.occupancy       2364000                      
-system.cpu.toL2Bus.respLayer1.utilization          0.0                      
-system.membus.snoop_filter.tot_requests          5173                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED 270604702500                      
-system.membus.trans_dist::ReadResp               4095                      
-system.membus.trans_dist::ReadExReq              1078                      
-system.membus.trans_dist::ReadExResp             1078                      
-system.membus.trans_dist::ReadSharedReq          4095                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port        10346                      
-system.membus.pkt_count::total                  10346                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port       331072                      
-system.membus.pkt_size::total                  331072                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              5173                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    5173    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                5173                      
-system.membus.reqLayer0.occupancy             5203000                      
-system.membus.reqLayer0.utilization               0.0                      
-system.membus.respLayer1.occupancy           25865000                      
-system.membus.respLayer1.utilization              0.0                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/config.ini
deleted file mode 100644 (file)
index f29a800..0000000
+++ /dev/null
@@ -1,263 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=atomic
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=AtomicSimpleCPU
-children=apic_clk_domain dtb interrupts isa itb tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-fastmem=false
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-simulate_data_stalls=false
-simulate_inst_stalls=false
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-width=1
-workload=system.cpu.workload
-dcache_port=system.membus.slave[2]
-icache_port=system.membus.slave[1]
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu_clk_domain
-eventq_index=0
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.membus.slave[4]
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1000
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-pio_addr=2305843009213693952
-pio_latency=100000
-power_model=Null
-system=system
-int_master=system.membus.slave[5]
-int_slave=system.membus.master[2]
-pio=system.membus.master[1]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.membus.slave[3]
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/x86/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.system_port system.cpu.icache_port system.cpu.dcache_port system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.interrupts.int_master
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simerr
deleted file mode 100755 (executable)
index 094173d..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/simout
deleted file mode 100755 (executable)
index c05a378..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:21
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87172
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/x86/linux/simple-atomic
-
-Couldn't unlink  build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/smred.sav
-Couldn't unlink  build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-atomic/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 131393279000 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin
deleted file mode 100644 (file)
index 62b922e..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-$COUNT_1/$AND2_1/$ND2_1$Z 1 $COUNT_1/$AND2_1/$ND2_1 00#Z 17 52 2 1 0
-$COUNT_1/$AND2_1/$ND2_1$Z 1 ACOUNT_1 00#A 15 26 2 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#K 25 78 3 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#J 23 78 3 -1 0
-B7 3 $COUNT_1/$AND2_2/$ND2_1 00#A 9 26 2 -1 0
-B7 3 ACOUNT_1 01#Z 17 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#K 25 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#J 23 26 2 -1 0
-B6 5 $COUNT_1/$AND2_3/$IV_1 01#Z 7 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$FJK3_1 01#Q 81 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$AND2_1/$ND2_1 00#B 19 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$FJK3_2 00#Q 81 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$AND2_2/$ND2_1 01#B 11 26 2 -1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$ND2_1 00#Z 5 52 2 1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$IV_1 00#A 5 26 2 -1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$ND2_1 00#Z 7 52 2 1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$IV_1 00#A 3 26 2 -1 0
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1
deleted file mode 100644 (file)
index bdc569e..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-$COUNT_1/$AND2_4/$IV_1 0 0  4 26  0 1
-$COUNT_1/$AND2_3/$IV_1 4 0  8 26  2 1
-$COUNT_1/$AND2_2/$ND2_1 8 0  14 26  0 1
-ACOUNT_1 14 0  18 26  2 1
-twfeed1 18 0  22 26  0 1
-$COUNT_1/$FJK3_1 22 0  86 26  0 1
-$COUNT_1/$AND2_3/$ND2_1 0 52  6 78  0 2
-$COUNT_1/$AND2_4/$ND2_1 6 52  12 78  2 2
-$COUNT_1/$AND2_2/$IV_1 12 52  16 78  2 2
-$COUNT_1/$AND2_1/$ND2_1 16 52  22 78  2 2
-$COUNT_1/$FJK3_2 22 52  86 78  0 2
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2
deleted file mode 100644 (file)
index 6e2601e..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-1 0 0  86 26  0 0
-2 0 52  86 78  0 0
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav
deleted file mode 100644 (file)
index 04c8e99..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-0.009592
-121
-0
-1
-0.000000
-0.500000
-3.906156
-1
-1 1 2 37 13
-2 2 0 34 65
-3 2 2 63 65
-4 1 0 59 13
-5 1 2 32 13
-6 2 0 23 65
-7 1 2 12 13
-8 2 0 6 65
-9 1 0 70 13
-10 2 0 70 65
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2
deleted file mode 100644 (file)
index 9dd68ec..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-0.001000
-123
-0
-2
-0.000000
-0.500000
-3.906156
-1
-1 1 2 16 13
-2 2 2 19 65
-3 2 2 14 65
-4 1 0 11 13
-5 1 2 6 13
-6 2 0 3 65
-7 1 0 2 13
-8 2 2 9 65
-9 1 0 50 13
-10 2 0 54 65
-11 1 0 84 13
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf
deleted file mode 100644 (file)
index a4c2eac..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-net 1
-segment channel 2
- pin1 1  pin2 7 0 0
-net 2
-segment channel 3
-pin1 41  pin2 42 0 0
-segment channel 2
-pin1 12  pin2 3 0 0
-net 3
-segment channel 2
-pin1 35  pin2 36 0 0
-segment channel 2
-pin1 19  pin2 35 0 0
-net 4
-segment channel 2
- pin1 5  pin2 38 0 0
-net 5
-net 7
-segment channel 2
- pin1 14  pin2 43 0 0
-net 8
-segment channel 2
- pin1 23  pin2 17 0 0
-net 9
-net 11
-segment channel 2
- pin1 25  pin2 31 0 0
-net 14
-net 15
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
deleted file mode 100644 (file)
index 78c52eb..0000000
+++ /dev/null
@@ -1,145 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.131393                      
-sim_ticks                                131393279000                      
-final_tick                               131393279000                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 712720                      
-host_op_rate                                  1194584                      
-host_tick_rate                              709061486                      
-host_mem_usage                                 300116                      
-host_seconds                                   185.31                      
-sim_insts                                   132071193                      
-sim_ops                                     221363385                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.physmem.bytes_read::cpu.inst        1387954936                      
-system.physmem.bytes_read::cpu.data         310423752                      
-system.physmem.bytes_read::total           1698378688                      
-system.physmem.bytes_inst_read::cpu.inst   1387954936                      
-system.physmem.bytes_inst_read::total      1387954936                      
-system.physmem.bytes_written::cpu.data       99822191                      
-system.physmem.bytes_written::total          99822191                      
-system.physmem.num_reads::cpu.inst          173494367                      
-system.physmem.num_reads::cpu.data           56682005                      
-system.physmem.num_reads::total             230176372                      
-system.physmem.num_writes::cpu.data          20515731                      
-system.physmem.num_writes::total             20515731                      
-system.physmem.bw_read::cpu.inst          10563363260                      
-system.physmem.bw_read::cpu.data           2362554267                      
-system.physmem.bw_read::total             12925917527                      
-system.physmem.bw_inst_read::cpu.inst     10563363260                      
-system.physmem.bw_inst_read::total        10563363260                      
-system.physmem.bw_write::cpu.data           759720678                      
-system.physmem.bw_write::total              759720678                      
-system.physmem.bw_total::cpu.inst         10563363260                      
-system.physmem.bw_total::cpu.data          3122274945                      
-system.physmem.bw_total::total            13685638205                      
-system.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.cpu.apic_clk_domain.clock                 8000                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.cpu.workload.numSyscalls                   400                      
-system.cpu.pwrStateResidencyTicks::ON    131393279000                      
-system.cpu.numCycles                        262786559                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                   132071193                      
-system.cpu.committedOps                     221363385                      
-system.cpu.num_int_alu_accesses             219019986                      
-system.cpu.num_fp_alu_accesses                2162459                      
-system.cpu.num_func_calls                     1595632                      
-system.cpu.num_conditional_control_insts      8268466                      
-system.cpu.num_int_insts                    219019986                      
-system.cpu.num_fp_insts                       2162459                      
-system.cpu.num_int_register_reads           519996939                      
-system.cpu.num_int_register_writes          201355989                      
-system.cpu.num_fp_register_reads              3037165                      
-system.cpu.num_fp_register_writes             1831403                      
-system.cpu.num_cc_register_reads             96962463                      
-system.cpu.num_cc_register_writes            56242058                      
-system.cpu.num_mem_refs                      77165304                      
-system.cpu.num_load_insts                    56649587                      
-system.cpu.num_store_insts                   20515717                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                  262786559                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                          12326938                      
-system.cpu.op_class::No_OpClass               1176721      0.53%      0.53%
-system.cpu.op_class::IntAlu                 134111833     60.58%     61.12%
-system.cpu.op_class::IntMult                   772953      0.35%     61.47%
-system.cpu.op_class::IntDiv                   7031501      3.18%     64.64%
-system.cpu.op_class::FloatAdd                 1105073      0.50%     65.14%
-system.cpu.op_class::FloatCmp                       0      0.00%     65.14%
-system.cpu.op_class::FloatCvt                       0      0.00%     65.14%
-system.cpu.op_class::FloatMult                      0      0.00%     65.14%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     65.14%
-system.cpu.op_class::FloatDiv                       0      0.00%     65.14%
-system.cpu.op_class::FloatMisc                      0      0.00%     65.14%
-system.cpu.op_class::FloatSqrt                      0      0.00%     65.14%
-system.cpu.op_class::SimdAdd                        0      0.00%     65.14%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     65.14%
-system.cpu.op_class::SimdAlu                        0      0.00%     65.14%
-system.cpu.op_class::SimdCmp                        0      0.00%     65.14%
-system.cpu.op_class::SimdCvt                        0      0.00%     65.14%
-system.cpu.op_class::SimdMisc                       0      0.00%     65.14%
-system.cpu.op_class::SimdMult                       0      0.00%     65.14%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     65.14%
-system.cpu.op_class::SimdShift                      0      0.00%     65.14%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     65.14%
-system.cpu.op_class::SimdSqrt                       0      0.00%     65.14%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     65.14%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     65.14%
-system.cpu.op_class::MemRead                 55945136     25.27%     90.41%
-system.cpu.op_class::MemWrite                20410230      9.22%     99.63%
-system.cpu.op_class::FloatMemRead              704451      0.32%     99.95%
-system.cpu.op_class::FloatMemWrite             105487      0.05%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                  221363385                      
-system.membus.snoop_filter.tot_requests             0                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED 131393279000                      
-system.membus.trans_dist::ReadReq           230176372                      
-system.membus.trans_dist::ReadResp          230176372                      
-system.membus.trans_dist::WriteReq           20515731                      
-system.membus.trans_dist::WriteResp          20515731                      
-system.membus.pkt_count_system.cpu.icache_port::system.physmem.port    346988734                      
-system.membus.pkt_count_system.cpu.icache_port::total    346988734                      
-system.membus.pkt_count_system.cpu.dcache_port::system.physmem.port    154395472                      
-system.membus.pkt_count_system.cpu.dcache_port::total    154395472                      
-system.membus.pkt_count::total              501384206                      
-system.membus.pkt_size_system.cpu.icache_port::system.physmem.port   1387954936                      
-system.membus.pkt_size_system.cpu.icache_port::total   1387954936                      
-system.membus.pkt_size_system.cpu.dcache_port::system.physmem.port    410245943                      
-system.membus.pkt_size_system.cpu.dcache_port::total    410245943                      
-system.membus.pkt_size::total              1798200879                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples         250692103                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0               250692103    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total           250692103                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/config.ini
deleted file mode 100644 (file)
index 66b18ed..0000000
+++ /dev/null
@@ -1,432 +0,0 @@
-[root]
-type=Root
-children=system
-eventq_index=0
-full_system=false
-sim_quantum=0
-time_sync_enable=false
-time_sync_period=100000000000
-time_sync_spin_threshold=100000000
-
-[system]
-type=System
-children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
-boot_osflags=a
-cache_line_size=64
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-exit_on_work_items=false
-init_param=0
-kernel=
-kernel_addr_check=true
-kvm_vm=Null
-load_addr_mask=1099511627775
-load_offset=0
-mem_mode=timing
-mem_ranges=
-memories=system.physmem
-mmap_using_noreserve=false
-multi_thread=false
-num_work_ids=16
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-readfile=
-symbolfile=
-thermal_components=
-thermal_model=Null
-work_begin_ckpt_count=0
-work_begin_cpu_id_exit=-1
-work_begin_exit_count=0
-work_cpus_ckpt_count=0
-work_end_ckpt_count=0
-work_end_exit_count=0
-work_item_id=-1
-system_port=system.membus.slave[0]
-
-[system.clk_domain]
-type=SrcClockDomain
-clock=1000
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.cpu]
-type=TimingSimpleCPU
-children=apic_clk_domain dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload
-branchPred=Null
-checker=Null
-clk_domain=system.cpu_clk_domain
-cpu_id=0
-default_p_state=UNDEFINED
-do_checkpoint_insts=true
-do_quiesce=true
-do_statistics_insts=true
-dtb=system.cpu.dtb
-eventq_index=0
-function_trace=false
-function_trace_start=0
-interrupts=system.cpu.interrupts
-isa=system.cpu.isa
-itb=system.cpu.itb
-max_insts_all_threads=0
-max_insts_any_thread=0
-max_loads_all_threads=0
-max_loads_any_thread=0
-numThreads=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-profile=0
-progress_interval=0
-simpoint_start_insts=
-socket_id=0
-switched_out=false
-syscallRetryLatency=10000
-system=system
-tracer=system.cpu.tracer
-workload=system.cpu.workload
-dcache_port=system.cpu.dcache.cpu_side
-icache_port=system.cpu.icache.cpu_side
-
-[system.cpu.apic_clk_domain]
-type=DerivedClockDomain
-clk_divider=16
-clk_domain=system.cpu_clk_domain
-eventq_index=0
-
-[system.cpu.dcache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=262144
-system=system
-tag_latency=2
-tags=system.cpu.dcache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.slave[1]
-
-[system.cpu.dcache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=262144
-tag_latency=2
-
-[system.cpu.dtb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.dtb.walker
-
-[system.cpu.dtb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[3]
-
-[system.cpu.icache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=2
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=2
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=true
-max_miss_count=0
-mshrs=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=2
-sequential_access=false
-size=131072
-system=system
-tag_latency=2
-tags=system.cpu.icache.tags
-tgts_per_mshr=20
-write_buffers=8
-writeback_clean=true
-cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.slave[0]
-
-[system.cpu.icache.tags]
-type=LRU
-assoc=2
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=2
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=131072
-tag_latency=2
-
-[system.cpu.interrupts]
-type=X86LocalApic
-clk_domain=system.cpu.apic_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-int_latency=1000
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-pio_addr=2305843009213693952
-pio_latency=100000
-power_model=Null
-system=system
-int_master=system.membus.slave[2]
-int_slave=system.membus.master[2]
-pio=system.membus.master[1]
-
-[system.cpu.isa]
-type=X86ISA
-eventq_index=0
-
-[system.cpu.itb]
-type=X86TLB
-children=walker
-eventq_index=0
-size=64
-walker=system.cpu.itb.walker
-
-[system.cpu.itb.walker]
-type=X86PagetableWalker
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-num_squash_per_cycle=4
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-system=system
-port=system.cpu.toL2Bus.slave[2]
-
-[system.cpu.l2cache]
-type=Cache
-children=tags
-addr_ranges=0:18446744073709551615:0:0:0:0
-assoc=8
-clk_domain=system.cpu_clk_domain
-clusivity=mostly_incl
-data_latency=20
-default_p_state=UNDEFINED
-demand_mshr_reserve=1
-eventq_index=0
-is_read_only=false
-max_miss_count=0
-mshrs=20
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-prefetch_on_access=false
-prefetcher=Null
-response_latency=20
-sequential_access=false
-size=2097152
-system=system
-tag_latency=20
-tags=system.cpu.l2cache.tags
-tgts_per_mshr=12
-write_buffers=8
-writeback_clean=false
-cpu_side=system.cpu.toL2Bus.master[0]
-mem_side=system.membus.slave[1]
-
-[system.cpu.l2cache.tags]
-type=LRU
-assoc=8
-block_size=64
-clk_domain=system.cpu_clk_domain
-data_latency=20
-default_p_state=UNDEFINED
-eventq_index=0
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-sequential_access=false
-size=2097152
-tag_latency=20
-
-[system.cpu.toL2Bus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.cpu_clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=0
-frontend_latency=1
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=false
-power_model=Null
-response_latency=1
-snoop_filter=system.cpu.toL2Bus.snoop_filter
-snoop_response_latency=1
-system=system
-use_default_range=false
-width=32
-master=system.cpu.l2cache.cpu_side
-slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
-
-[system.cpu.toL2Bus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=0
-max_capacity=8388608
-system=system
-
-[system.cpu.tracer]
-type=ExeTracer
-eventq_index=0
-
-[system.cpu.workload]
-type=Process
-cmd=twolf smred
-cwd=build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing
-drivers=
-egid=100
-env=
-errout=cerr
-euid=100
-eventq_index=0
-executable=/usr/local/google/home/gabeblack/gem5/dist/m5/cpu2000/binaries/x86/linux/twolf
-gid=100
-input=cin
-kvmInSE=false
-maxStackSize=67108864
-output=cout
-pgid=100
-pid=100
-ppid=0
-simpoint=0
-system=system
-uid=100
-useArchPT=false
-
-[system.cpu_clk_domain]
-type=SrcClockDomain
-clock=500
-domain_id=-1
-eventq_index=0
-init_perf_level=0
-voltage_domain=system.voltage_domain
-
-[system.dvfs_handler]
-type=DVFSHandler
-domains=
-enable=false
-eventq_index=0
-sys_clk_domain=system.clk_domain
-transition_latency=100000000
-
-[system.membus]
-type=CoherentXBar
-children=snoop_filter
-clk_domain=system.clk_domain
-default_p_state=UNDEFINED
-eventq_index=0
-forward_latency=4
-frontend_latency=3
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-point_of_coherency=true
-power_model=Null
-response_latency=2
-snoop_filter=system.membus.snoop_filter
-snoop_response_latency=4
-system=system
-use_default_range=false
-width=16
-master=system.physmem.port system.cpu.interrupts.pio system.cpu.interrupts.int_slave
-slave=system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
-
-[system.membus.snoop_filter]
-type=SnoopFilter
-eventq_index=0
-lookup_latency=1
-max_capacity=8388608
-system=system
-
-[system.physmem]
-type=SimpleMemory
-bandwidth=73.000000
-clk_domain=system.clk_domain
-conf_table_reported=true
-default_p_state=UNDEFINED
-eventq_index=0
-in_addr_map=true
-kvm_map=true
-latency=30000
-latency_var=0
-null=false
-p_state_clk_gate_bins=20
-p_state_clk_gate_max=1000000000000
-p_state_clk_gate_min=1000
-power_model=Null
-range=0:134217727:0:0:0:0
-port=system.membus.master[0]
-
-[system.voltage_domain]
-type=VoltageDomain
-eventq_index=0
-voltage=1.000000
-
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simerr
deleted file mode 100755 (executable)
index 094173d..0000000
+++ /dev/null
@@ -1,5 +0,0 @@
-warn: Sockets disabled, not accepting gdb connections
-warn: ClockedObject: More than one power state change request encountered within the same simulation tick
-info: Entering event queue @ 0.  Starting simulation...
-info: Increasing stack size by one page.
-info: Increasing stack size by one page.
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/simout
deleted file mode 100755 (executable)
index cd65125..0000000
+++ /dev/null
@@ -1,27 +0,0 @@
-Redirecting stdout to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/simout
-Redirecting stderr to build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/simerr
-gem5 Simulator System.  http://gem5.org
-gem5 is copyrighted software; use the --copyright option for details.
-
-gem5 compiled Apr  3 2017 19:05:53
-gem5 started Apr  3 2017 19:06:21
-gem5 executing on gabeblack-desktop.mtv.corp.google.com, pid 87178
-command line: /usr/local/google/home/gabeblack/gem5/gem5-public/build/X86/gem5.opt -d build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing --stats-file 'text://stats.txt?desc=False' -re /usr/local/google/home/gabeblack/gem5/gem5-public/tests/testing/../run.py quick/se/70.twolf/x86/linux/simple-timing
-
-Couldn't unlink  build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/smred.sav
-Couldn't unlink  build/X86/tests/opt/quick/se/70.twolf/x86/linux/simple-timing/smred.sv2
-Global frequency set at 1000000000000 ticks per second
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-         Yale University
-  1   2   3   4   5   6   7   8   9  10  11  12  13  14  15 
- 16  17  18  19  20  21  22  23  24  25  26  27  28  29  30 
- 31  32  33  34  35  36  37  38  39  40  41  42  43  44  45 
- 46  47  48  49  50  51  52  53  54  55  56  57  58  59  60 
- 61  62  63  64  65  66  67  68  69  70  71  72  73  74  75 
- 76  77  78  79  80  81  82  83  84  85  86  87  88  89  90 
- 91  92  93  94  95  96  97  98  99 100 101 102 103 104 105 
-106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 
-122 123 124 Exiting @ tick 250991873500 because exiting with last active thread context
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.out
deleted file mode 100644 (file)
index 00387ae..0000000
+++ /dev/null
@@ -1,276 +0,0 @@
-
-TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
-Standard Cell Placement and Global Routing Program
-Authors: Carl Sechen, Bill Swartz
-          Yale University
-
-
-NOTE: Restart file .rs2 not used
-
-TimberWolf will perform a global route step
-rowSep: 1.000000
-feedThruWidth: 4
-
-******************
-BLOCK DATA
-block:1 desire:85
-block:2 desire:85
-Total Desired Length: 170
-total cell length: 168
-total block length: 168
-block x-span:84  block y-span:78
-implicit feed thru range: -84
-Using default value of bin.penalty.control:1.000000
-numBins automatically set to:5
-binWidth = average_cell_width + 0 sigma= 17
-average_cell_width is:16
-standard deviation of cell length is:23.6305
-TimberWolfSC starting from the beginning
-
-
-
-THIS IS THE ROUTE COST OF THE ORIGINAL PLACEMENT: 645
-The number of nets with 1 pin is 4
-The number of nets with 2 pin is 9
-The number of nets with 3 pin is 0
-The number of nets with 4 pin is 2
-The number of nets with 5 pin is 0
-The number of nets with 6 pin is 0
-The number of nets with 7 pin is 0
-The number of nets with 8 pin is 0
-The number of nets with 9 pin is 0
-The number of nets with 10 pin or more is 0
-
-New Cost Function: Initial Horizontal Cost:242
-New Cost Function: FEEDS:0   MISSING_ROWS:-46
-
-bdxlen:86  bdylen:78
-l:0  t:78  r:86  b:0
-
-
-
-THIS IS THE ROUTE COST OF THE CURRENT PLACEMENT: 645
-
-
-
-THIS IS THE PENALTY OF THE CURRENT PLACEMENT: 44
-
-The rand generator seed was at utemp() : 1
-
-
-  tempfile[0][0] = 0.982500    tempfile[0][1] = 90.000000
-  tempfile[1][0] = 0.915000    tempfile[1][1] = 20.000000
-  tempfile[2][0] = 0.700000    tempfile[2][1] = 10.000000
-  tempfile[3][0] = 0.100000    tempfile[3][1] = 0.000000
-
-  I   T  fds     Wire Penalty P_lim Epct binC rowC  acc  s/p early  FDs    MRs
-  1 500    0      929     592   160 30.0  1.0  3.0 84.2 34.7  0.0     0     40
-  2 491    0      876     106   726  0.0  0.8  2.5 80.0 18.5  0.0     0     46
-  3 482    0      822     273   372  0.0  0.5  1.5 80.8 21.2  0.0     0     46
-  4 474    0      826      53   247  0.0  0.5  0.9 65.0 21.9  0.0     0     48
-  5 465    8      987      73   190  0.0  0.5  0.5 50.0 38.3  0.0     0     46
-  6 457    8      851      67   226  0.0  0.5  0.5 53.8 42.9  0.0     0     52
-  7 449    8     1067     108   190  0.0  0.5  0.5 46.2 53.8  0.0     0     50
-  8 441    8      918     106   171  0.0  0.5  0.5 47.1 40.4  0.0     0     48
-  9 434    8      812     101   197  0.0  0.5  0.5 53.6 21.0  0.0     0     48
- 10 426    8     1038     121   181  0.0  0.5  0.5 43.6 27.1  0.0     0     48
- 11 419    8      898      93   187  0.0  0.5  0.5 45.3 47.8  0.0     0     50
- 12 411    4      857      94   240  0.0  0.5  0.5 62.7 51.6  0.0     0     44
- 13 404    8     1043      88   185  0.0  0.5  0.5 54.0 52.8  0.0     0     50
- 14 397    8      767      94   154  0.0  0.5  0.5 33.8 35.0  0.0     0     50
- 15 390    8      862      89   183  0.0  0.5  0.5 55.6 29.0  0.0     0     46
- 16 383    4      798      79   173  0.0  0.5  0.5 57.5 35.3  0.0     0     52
- 17 376    8      827     100   152  0.0  0.5  0.5 35.3 81.8  0.0     0     50
- 18 370    8      878     101   208  0.0  0.5  0.5 44.7 46.2  0.0     0     48
- 19 363    4      921      67   167  0.0  0.5  0.5 57.1 34.7  0.0     0     48
- 20 357    8      933      93   154  0.0  0.5  0.5 46.5 43.6  0.0     0     52
- 21 351    8      930      89   147  0.0  0.5  0.5 39.4 36.5  0.0     0     52
- 22 345    8      951      79   142  0.0  0.5  0.5 32.8 51.3  0.0     0     50
- 23 339    8     1046      87   207  0.0  0.5  0.5 52.8 61.0  0.0     0     48
- 24 333    4      989      96   185  0.0  0.5  0.5 45.3 43.3  0.0     0     42
- 25 327    4      577      86   157  0.0  0.5  0.5 31.1 55.3  0.0     0     52
- 26 321    8      776      97   174  0.0  0.5  0.5 47.9 62.5  0.0     0     52
- 27 315    8      850      81   188  0.0  0.5  0.5 45.0 55.2  0.0     0     50
- 28 310    8      898      97   148  0.0  0.5  0.5 43.0 45.8  0.0     0     48
- 29 304    8      889      65   173  0.0  0.5  0.5 32.5 41.3  0.0     0     50
- 30 299    8      858      81   153  0.0  0.5  0.5 44.3 29.2  0.0     0     46
- 31 294    8      871      82   187  0.0  0.5  0.5 45.7 47.7  0.0     0     48
- 32 289    8      782     109   173  0.0  0.5  0.5 35.2 57.4  0.0     0     48
- 33 284    8      743      98   189  0.0  0.6  0.5 41.8 64.3  0.0     0     52
- 34 279    8      943      90   147  0.0  0.5  0.5 38.6 32.8  0.0     0     48
- 35 274    8      907      57   166  0.0  0.5  0.5 33.6 51.0  0.0     0     48
- 36 269    8      900      70   148  0.0  0.5  0.5 45.0 41.4  0.0     0     50
- 37 264    4      875     106   133  0.0  0.5  0.5 31.7 55.3  0.0     0     52
- 38 260    8     1023     145   149  0.0  0.6  0.5 28.7 65.0  0.0     0     52
- 39 255    8      801     151   173  0.0  0.9  0.5 41.7 41.2  0.0     0     48
- 40 251    8      741     104   159  0.0  0.8  0.5 36.2 47.5  0.0     0     48
- 41 246    8      828     108   149  0.0  0.5  0.5 34.6 50.9  0.0     0     50
- 42 242    8      947     128   132  0.0  0.7  0.5 34.2 39.0  0.0     0     50
- 43 238    8      917     101   142  0.0  0.8  0.5 34.4 50.9  0.0     0     48
- 44 234    8      761      86   129  0.0  0.5  0.5 42.0 36.4  0.0     0     52
- 45 229    8      979     106   137  0.0  0.5  0.5 29.2 55.3  0.0     0     50
- 46 225    8      806      74   130  0.0  0.7  0.5 33.1 65.4  0.0     0     52
- 47 221    8      971     125   114  0.0  0.5  0.5 31.9 45.6  0.0     0     52
- 48 218    8      869     125   104  0.0  0.9  0.5 30.0 56.0  0.0     0     48
- 49 214    8      999     153   140  0.0  0.8  0.5 30.4 46.4  0.0     0     52
- 50 210    8      798     192   139  0.0  1.0  0.5 28.9 50.0  0.0     0     52
- 51 206    8      860     125   157  0.0  1.2  0.5 31.5 26.9  0.0     0     52
- 52 203    8      893     186   127  5.9  0.9  0.5 26.4 42.3  0.0     0     46
- 53 199    8      863     126   141  0.0  1.2  0.5 32.5 44.4  0.0     0     44
- 54 196    8      788      97   133  0.0  0.9  0.5 37.5 40.0  0.0     0     50
- 55 192    8      926     119   116  0.0  0.6  0.5 26.1 55.3  0.0     0     52
- 56 189    8      789     162   107  0.0  0.8  0.5 25.2 40.4  0.0     0     48
- 57 186    8      878     107   128  0.0  1.1  0.5 23.1 34.0  0.0     0     52
- 58 182    8      775     105   122  0.0  0.8  0.5 25.5 57.4  0.0     0     50
- 59 179    8      747      94   129  0.0  0.7  0.5 34.3 37.3  0.0     0     50
- 60 176    8      845      96   138  0.0  0.6  0.5 28.3 41.7  0.0     0     52
- 61 173    8      961     121   110  0.0  0.6  0.5 29.0 52.6  0.0     0     48
- 62 170    4      911     110   109  0.0  0.9  0.5 33.5 33.3  0.0     0     48
- 63 167    8      656     109   109  0.0  0.8  0.5 21.9 44.7  0.0     0     52
- 64 164    8      934     117   105  0.0  0.8  0.5 15.5 50.0  0.0     0     52
- 65 161    8      972     125    95  0.0  0.8  0.5 24.4 50.0  0.0     0     50
- 66 158    8      894     125   101  0.0  0.9  0.5 27.2 35.9  0.0     0     52
- 67 155    8      798     146   129  0.0  1.0  0.5 22.8 58.7  0.0     0     52
- 68 153    8      901     183    92  0.0  1.1  0.5 23.6 34.5  0.0     0     52
- 69 150    8      977     197   103  0.0  1.4  0.5 23.6 36.8  0.0     0     52
- 70 147    8      905     262    93  0.0  1.5  0.5 20.3 63.4  0.0     0     52
- 71 145    8      995     148   122  0.0  1.9  0.5 20.9 35.3  0.0     0     52
- 72 142    8      934     230    99  0.0  1.6  0.5 20.0 65.9  0.0     0     52
- 73 140    8      862     173   100  0.0  1.8  0.5 26.8 46.8  0.0     0     52
- 74 137    8      924     139    90  0.0  1.7  0.5 16.8 42.5  0.0     0     52
- 75 135    8      888     168   113  0.0  1.6  0.5 22.9 40.4  0.0     0     52
- 76 133    8      712     212    84  0.0  1.6  0.5 13.4 46.9  0.0     0     52
- 77 130    8      868     210    91  0.0  1.7  0.5 17.7 51.2  0.0     0     52
- 78 128    8      952     307    92  0.0  1.9  0.5 19.7 44.9  0.0     0     50
- 79 126    8      801     157   107  0.0  2.2  0.5 15.8 39.0  0.0     0     52
- 80 123    8      849     147    93  0.0  2.1  0.5 15.6 51.4  0.0     0     52
- 81 121    8      799     154    86  0.0  1.9  0.5 12.2 50.0  0.0     0     52
- 82 119    8      941     213    82  0.0  1.8  0.5 19.5 41.2  0.0     0     50
- 83 117    8      751     268    94  0.0  2.0  0.5 20.8 42.6  0.0     0     50
- 84 115    8      828     198   102  0.0  2.2  0.5 15.5 59.5  0.0     0     52
- 85 113    8      898     266   123  0.0  2.2  0.5 13.2 85.2  0.0     0     52
- 86 111    8      943     190    93  0.0  2.4  0.5 19.5 45.1  0.0     0     52
- 87 109    8      864     183    65  0.0  2.4  0.5 14.9 31.8  0.0     0     52
- 88 107    8      793     203    93  0.0  2.4  0.5 11.8 35.3  0.0     0     52
- 89 105    8      752     162    74  1.2  2.4  0.5 13.1 21.4  0.0     0     52
- 90 103    8      801     149    77  0.0  2.3  0.5  9.7 58.3  0.0     0     52
- 91 102    8      901     230    99  0.0  2.2  0.5 16.0 25.5  0.0     0     52
- 92 100    8      826     201    87  0.0  2.4  0.5 12.8 45.7  0.0     0     52
- 93  98    8      810     196    83  0.0  2.5  0.5 14.0 24.4  0.0     0     52
- 94  96    8      857     209    68  1.0  2.5  0.5 11.5 27.0  5.1     0     52
- 95  95    8      771     174    91  0.0  2.6  0.5 10.5 26.5  0.0     0     52
- 96  93    8      955     210    59  0.0  2.6  0.5 10.0 36.7  0.7     0     52
- 97  91    8      833     206    53  0.0  2.7  0.5 10.2 19.4  1.4     0     52
- 98  90    8      888     229    86  0.0  2.8  0.5  8.1 36.0  0.0     0     52
- 99  88    8      794     186    91  1.0  2.9  0.5  8.3 25.0  0.5     0     52
-100  81    8      756     170    72  1.0  2.9  0.5  6.0 23.8  7.0     0     52
-101  74    8      791     176    67  0.0  2.9  0.5  4.4 58.3  4.0     0     52
-102  67    8      813     213    43  0.0  3.0  0.5  7.0 150.0  4.2     0     52
-103  62    8      779     245    39  0.0  3.1  0.5  3.2 16.7 13.0     0     52
-104  56    8      767     303    63  0.0  3.2  0.5  4.1 20.0  0.7     0     52
-105  52    8      757     270    57  0.0  3.5  0.5  6.4  3.7  0.5     0     52
-106  47    8      763     283    41  0.0  3.7  0.5  4.5  0.0  0.0     0     52
-107  43    8      768     283    36  0.0  3.7  0.5  2.9 18.2  3.6     0     52
-108  39    8      804     283    25  0.0  3.7  0.5  3.1  0.0  6.2     0     52
-109  36    8      781     283    24  0.0  3.7  0.5  3.6  6.7  6.7     0     52
-110  33    8      738     298    42  0.0  3.7  0.5  3.3 15.4  3.5     0     52
-111  30    8      761     298    36  0.0  3.7  0.5  2.2  0.0  4.3     0     52
-112  27    8      769     298    37  0.0  3.7  0.5  0.9  0.0  2.2     0     52
-113  25    8      745     298    31  0.0  3.7  0.5  1.5  0.0  6.6     0     52
-114  23    8      753     298    16  0.0  3.7  0.5  1.3  0.0  2.8     0     52
-115  21    8      745     298    11  0.0  3.7  0.5  1.5  0.0 14.0     0     52
-116  19    8      747     298    21  0.0  3.7  0.5  2.1  0.0  5.8     0     52
-117  13    8      737     298    12  0.0  3.7  0.5  1.0  0.0 10.0     0     52
-118   9    8      736     298     4  0.0  3.7  0.5  1.5  0.0 18.5     0     52
-119   0    8      739     298     0  0.0  3.7  0.5  1.8  0.0 18.0     0     52
-120   0    8      732     298     0  0.0  3.7  0.5  1.2  0.0 21.8     0     52
-121   0    8      732      19    -1 0.0  0.0  0.5  0.0 100.0 54.8
-
-Initial Wiring Cost: 645   Final Wiring Cost: 732
-############## Percent Wire Cost Reduction: -13
-
-
-Initial Wire Length: 645   Final Wire Length: 732
-************** Percent Wire Length Reduction: -13
-
-
-Initial Horiz. Wire: 216   Final Horiz. Wire: 147
-$$$$$$$$$$$ Percent H-Wire Length Reduction: 32
-
-
-Initial Vert. Wire: 429   Final Vert. Wire: 585
-@@@@@@@@@@@ Percent V-Wire Length Reduction: -36
-
-Before Feeds are Added:
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 82                   -20
-  2                 86                   -16
-
-LONGEST Block is:2   Its length is:86
-BLOCK      TOTAL CELL LENGTHS      OVER/UNDER TARGET
-  1                 86                   -16
-  2                 86                   -16
-
-LONGEST Block is:1   Its length is:86
-Added: 1  feed-through cells
-
-Removed the cell overlaps --- Will do neighbor interchanges only now
-
-TOTAL INTERCONNECT LENGTH: 994
-OVERLAP PENALTY: 0
-
-initialRowControl:   1.650
-finalRowControl:   0.300
-iter      T      Wire accept
- 122  0.001       976   16%
- 123  0.001       971    0%
- 124  0.001       971    0%
-Total Feed-Alignment Movement (Pass 1): 0
-Total Feed-Alignment Movement (Pass 2): 0
-Total Feed-Alignment Movement (Pass 3): 0
-Total Feed-Alignment Movement (Pass 4): 0
-Total Feed-Alignment Movement (Pass 5): 0
-Total Feed-Alignment Movement (Pass 6): 0
-Total Feed-Alignment Movement (Pass 7): 0
-Total Feed-Alignment Movement (Pass 8): 0
-
-The rand generator seed was at globroute() : 987654321
-
-
-Total Number of Net Segments: 9
-Number of Switchable Net Segments: 0
-
-Number of channels: 3
-
-
-
-THIS IS THE ORIGINAL NUMBER OF TRACKS: 5
-
-
-no. of accepted flips: 0
-no. of attempted flips: 0
-THIS IS THE NUMBER OF TRACKS: 5
-
-
-
-FINAL NUMBER OF ROUTING TRACKS: 5
-
-MAX OF CHANNEL:  1  is:   0
-MAX OF CHANNEL:  2  is:   4
-MAX OF CHANNEL:  3  is:   1
-FINAL TOTAL INTERCONNECT LENGTH: 978
-FINAL OVERLAP PENALTY: 0    FINAL VALUE OF TOTAL COST IS: 978
-MAX NUMBER OF ATTEMPTED FLIPS PER T:      55
-
-
-cost_scale_factor:3.90616
-
-Number of Feed Thrus: 0
-Number of Implicit Feed Thrus: 0
-
-Statistics:
-Number of Standard Cells: 10
-Number of Pads: 0 
-Number of Nets: 15 
-Number of Pins: 46 
-Usage statistics not available
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pin
deleted file mode 100644 (file)
index 62b922e..0000000
+++ /dev/null
@@ -1,17 +0,0 @@
-$COUNT_1/$AND2_1/$ND2_1$Z 1 $COUNT_1/$AND2_1/$ND2_1 00#Z 17 52 2 1 0
-$COUNT_1/$AND2_1/$ND2_1$Z 1 ACOUNT_1 00#A 15 26 2 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#K 25 78 3 -1 0
-B7 2 $COUNT_1/$FJK3_2 00#J 23 78 3 -1 0
-B7 3 $COUNT_1/$AND2_2/$ND2_1 00#A 9 26 2 -1 0
-B7 3 ACOUNT_1 01#Z 17 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#K 25 26 2 -1 0
-B6 5 $COUNT_1/$FJK3_1 00#J 23 26 2 -1 0
-B6 5 $COUNT_1/$AND2_3/$IV_1 01#Z 7 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$FJK3_1 01#Q 81 26 2 -1 0
-$COUNT_1/$FJK3_1$Q 6 $COUNT_1/$AND2_1/$ND2_1 00#B 19 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$FJK3_2 00#Q 81 52 2 1 0
-$COUNT_1/$FJK3_2$Q 7 $COUNT_1/$AND2_2/$ND2_1 01#B 11 26 2 -1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$ND2_1 00#Z 5 52 2 1 0
-$COUNT_1/$AND2_3/$ND2_1$Z 8 $COUNT_1/$AND2_3/$IV_1 00#A 5 26 2 -1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$ND2_1 00#Z 7 52 2 1 0
-$COUNT_1/$AND2_4/$ND2_1$Z 9 $COUNT_1/$AND2_4/$IV_1 00#A 3 26 2 -1 0
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1
deleted file mode 100644 (file)
index bdc569e..0000000
+++ /dev/null
@@ -1,11 +0,0 @@
-$COUNT_1/$AND2_4/$IV_1 0 0  4 26  0 1
-$COUNT_1/$AND2_3/$IV_1 4 0  8 26  2 1
-$COUNT_1/$AND2_2/$ND2_1 8 0  14 26  0 1
-ACOUNT_1 14 0  18 26  2 1
-twfeed1 18 0  22 26  0 1
-$COUNT_1/$FJK3_1 22 0  86 26  0 1
-$COUNT_1/$AND2_3/$ND2_1 0 52  6 78  0 2
-$COUNT_1/$AND2_4/$ND2_1 6 52  12 78  2 2
-$COUNT_1/$AND2_2/$IV_1 12 52  16 78  2 2
-$COUNT_1/$AND2_1/$ND2_1 16 52  22 78  2 2
-$COUNT_1/$FJK3_2 22 52  86 78  0 2
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2
deleted file mode 100644 (file)
index 6e2601e..0000000
+++ /dev/null
@@ -1,2 +0,0 @@
-1 0 0  86 26  0 0
-2 0 52  86 78  0 0
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sav
deleted file mode 100644 (file)
index 04c8e99..0000000
+++ /dev/null
@@ -1,18 +0,0 @@
-0.009592
-121
-0
-1
-0.000000
-0.500000
-3.906156
-1
-1 1 2 37 13
-2 2 0 34 65
-3 2 2 63 65
-4 1 0 59 13
-5 1 2 32 13
-6 2 0 23 65
-7 1 2 12 13
-8 2 0 6 65
-9 1 0 70 13
-10 2 0 70 65
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2
deleted file mode 100644 (file)
index 9dd68ec..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-0.001000
-123
-0
-2
-0.000000
-0.500000
-3.906156
-1
-1 1 2 16 13
-2 2 2 19 65
-3 2 2 14 65
-4 1 0 11 13
-5 1 2 6 13
-6 2 0 3 65
-7 1 0 2 13
-8 2 2 9 65
-9 1 0 50 13
-10 2 0 54 65
-11 1 0 84 13
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/smred.twf
deleted file mode 100644 (file)
index a4c2eac..0000000
+++ /dev/null
@@ -1,29 +0,0 @@
-net 1
-segment channel 2
- pin1 1  pin2 7 0 0
-net 2
-segment channel 3
-pin1 41  pin2 42 0 0
-segment channel 2
-pin1 12  pin2 3 0 0
-net 3
-segment channel 2
-pin1 35  pin2 36 0 0
-segment channel 2
-pin1 19  pin2 35 0 0
-net 4
-segment channel 2
- pin1 5  pin2 38 0 0
-net 5
-net 7
-segment channel 2
- pin1 14  pin2 43 0 0
-net 8
-segment channel 2
- pin1 23  pin2 17 0 0
-net 9
-net 11
-segment channel 2
- pin1 25  pin2 31 0 0
-net 14
-net 15
diff --git a/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt b/tests/quick/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
deleted file mode 100644 (file)
index 225096f..0000000
+++ /dev/null
@@ -1,531 +0,0 @@
-
----------- Begin Simulation Statistics ----------
-sim_seconds                                  0.250992                      
-sim_ticks                                250991873500                      
-final_tick                               250991873500                      
-sim_freq                                 1000000000000                      
-host_inst_rate                                 493841                      
-host_op_rate                                   827723                      
-host_tick_rate                              938509817                      
-host_mem_usage                                 310112                      
-host_seconds                                   267.44                      
-sim_insts                                   132071193                      
-sim_ops                                     221363385                      
-system.voltage_domain.voltage                       1                      
-system.clk_domain.clock                          1000                      
-system.physmem.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.physmem.bytes_read::cpu.inst            181760                      
-system.physmem.bytes_read::cpu.data            121280                      
-system.physmem.bytes_read::total               303040                      
-system.physmem.bytes_inst_read::cpu.inst       181760                      
-system.physmem.bytes_inst_read::total          181760                      
-system.physmem.num_reads::cpu.inst               2840                      
-system.physmem.num_reads::cpu.data               1895                      
-system.physmem.num_reads::total                  4735                      
-system.physmem.bw_read::cpu.inst               724167                      
-system.physmem.bw_read::cpu.data               483203                      
-system.physmem.bw_read::total                 1207370                      
-system.physmem.bw_inst_read::cpu.inst          724167                      
-system.physmem.bw_inst_read::total             724167                      
-system.physmem.bw_total::cpu.inst              724167                      
-system.physmem.bw_total::cpu.data              483203                      
-system.physmem.bw_total::total                1207370                      
-system.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu_clk_domain.clock                       500                      
-system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu.apic_clk_domain.clock                 8000                      
-system.cpu.interrupts.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu.workload.numSyscalls                   400                      
-system.cpu.pwrStateResidencyTicks::ON    250991873500                      
-system.cpu.numCycles                        501983747                      
-system.cpu.numWorkItemsStarted                      0                      
-system.cpu.numWorkItemsCompleted                    0                      
-system.cpu.committedInsts                   132071193                      
-system.cpu.committedOps                     221363385                      
-system.cpu.num_int_alu_accesses             219019986                      
-system.cpu.num_fp_alu_accesses                2162459                      
-system.cpu.num_func_calls                     1595632                      
-system.cpu.num_conditional_control_insts      8268466                      
-system.cpu.num_int_insts                    219019986                      
-system.cpu.num_fp_insts                       2162459                      
-system.cpu.num_int_register_reads           519996939                      
-system.cpu.num_int_register_writes          201355989                      
-system.cpu.num_fp_register_reads              3037165                      
-system.cpu.num_fp_register_writes             1831403                      
-system.cpu.num_cc_register_reads             96962463                      
-system.cpu.num_cc_register_writes            56242058                      
-system.cpu.num_mem_refs                      77165304                      
-system.cpu.num_load_insts                    56649587                      
-system.cpu.num_store_insts                   20515717                      
-system.cpu.num_idle_cycles                          0                      
-system.cpu.num_busy_cycles                  501983747                      
-system.cpu.not_idle_fraction                        1                      
-system.cpu.idle_fraction                            0                      
-system.cpu.Branches                          12326938                      
-system.cpu.op_class::No_OpClass               1176721      0.53%      0.53%
-system.cpu.op_class::IntAlu                 134111833     60.58%     61.12%
-system.cpu.op_class::IntMult                   772953      0.35%     61.47%
-system.cpu.op_class::IntDiv                   7031501      3.18%     64.64%
-system.cpu.op_class::FloatAdd                 1105073      0.50%     65.14%
-system.cpu.op_class::FloatCmp                       0      0.00%     65.14%
-system.cpu.op_class::FloatCvt                       0      0.00%     65.14%
-system.cpu.op_class::FloatMult                      0      0.00%     65.14%
-system.cpu.op_class::FloatMultAcc                   0      0.00%     65.14%
-system.cpu.op_class::FloatDiv                       0      0.00%     65.14%
-system.cpu.op_class::FloatMisc                      0      0.00%     65.14%
-system.cpu.op_class::FloatSqrt                      0      0.00%     65.14%
-system.cpu.op_class::SimdAdd                        0      0.00%     65.14%
-system.cpu.op_class::SimdAddAcc                     0      0.00%     65.14%
-system.cpu.op_class::SimdAlu                        0      0.00%     65.14%
-system.cpu.op_class::SimdCmp                        0      0.00%     65.14%
-system.cpu.op_class::SimdCvt                        0      0.00%     65.14%
-system.cpu.op_class::SimdMisc                       0      0.00%     65.14%
-system.cpu.op_class::SimdMult                       0      0.00%     65.14%
-system.cpu.op_class::SimdMultAcc                    0      0.00%     65.14%
-system.cpu.op_class::SimdShift                      0      0.00%     65.14%
-system.cpu.op_class::SimdShiftAcc                   0      0.00%     65.14%
-system.cpu.op_class::SimdSqrt                       0      0.00%     65.14%
-system.cpu.op_class::SimdFloatAdd                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatAlu                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatCmp                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatCvt                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatDiv                   0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMisc                  0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMult                  0      0.00%     65.14%
-system.cpu.op_class::SimdFloatMultAcc               0      0.00%     65.14%
-system.cpu.op_class::SimdFloatSqrt                  0      0.00%     65.14%
-system.cpu.op_class::MemRead                 55945136     25.27%     90.41%
-system.cpu.op_class::MemWrite                20410230      9.22%     99.63%
-system.cpu.op_class::FloatMemRead              704451      0.32%     99.95%
-system.cpu.op_class::FloatMemWrite             105487      0.05%    100.00%
-system.cpu.op_class::IprAccess                      0      0.00%    100.00%
-system.cpu.op_class::InstPrefetch                   0      0.00%    100.00%
-system.cpu.op_class::total                  221363385                      
-system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu.dcache.tags.replacements                41                      
-system.cpu.dcache.tags.tagsinuse          1363.408611                      
-system.cpu.dcache.tags.total_refs            77195831                      
-system.cpu.dcache.tags.sampled_refs              1905                      
-system.cpu.dcache.tags.avg_refs          40522.745932                      
-system.cpu.dcache.tags.warmup_cycle                 0                      
-system.cpu.dcache.tags.occ_blocks::cpu.data  1363.408611                      
-system.cpu.dcache.tags.occ_percent::cpu.data     0.332863                      
-system.cpu.dcache.tags.occ_percent::total     0.332863                      
-system.cpu.dcache.tags.occ_task_id_blocks::1024         1864                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::0            7                      
-system.cpu.dcache.tags.age_task_id_blocks_1024::1           14                      
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-system.cpu.l2cache.overall_avg_miss_latency::cpu.inst 60511.619718                      
-system.cpu.l2cache.overall_avg_miss_latency::cpu.data 60501.583113                      
-system.cpu.l2cache.overall_avg_miss_latency::total 60507.602957                      
-system.cpu.l2cache.blocked_cycles::no_mshrs            0                      
-system.cpu.l2cache.blocked_cycles::no_targets            0                      
-system.cpu.l2cache.blocked::no_mshrs                0                      
-system.cpu.l2cache.blocked::no_targets              0                      
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                      
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                      
-system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data         1575                      
-system.cpu.l2cache.ReadExReq_mshr_misses::total         1575                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::cpu.inst         2840                      
-system.cpu.l2cache.ReadCleanReq_mshr_misses::total         2840                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::cpu.data          320                      
-system.cpu.l2cache.ReadSharedReq_mshr_misses::total          320                      
-system.cpu.l2cache.demand_mshr_misses::cpu.inst         2840                      
-system.cpu.l2cache.demand_mshr_misses::cpu.data         1895                      
-system.cpu.l2cache.demand_mshr_misses::total         4735                      
-system.cpu.l2cache.overall_mshr_misses::cpu.inst         2840                      
-system.cpu.l2cache.overall_mshr_misses::cpu.data         1895                      
-system.cpu.l2cache.overall_mshr_misses::total         4735                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data     79538500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_latency::total     79538500                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::cpu.inst    143453000                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_latency::total    143453000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::cpu.data     16162000                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_latency::total     16162000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst    143453000                      
-system.cpu.l2cache.demand_mshr_miss_latency::cpu.data     95700500                      
-system.cpu.l2cache.demand_mshr_miss_latency::total    239153500                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst    143453000                      
-system.cpu.l2cache.overall_mshr_miss_latency::cpu.data     95700500                      
-system.cpu.l2cache.overall_mshr_miss_latency::total    239153500                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data     0.998099                      
-system.cpu.l2cache.ReadExReq_mshr_miss_rate::total     0.998099                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::cpu.inst     0.605028                      
-system.cpu.l2cache.ReadCleanReq_mshr_miss_rate::total     0.605028                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::cpu.data     0.978593                      
-system.cpu.l2cache.ReadSharedReq_mshr_miss_rate::total     0.978593                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst     0.605028                      
-system.cpu.l2cache.demand_mshr_miss_rate::cpu.data     0.994751                      
-system.cpu.l2cache.demand_mshr_miss_rate::total     0.717533                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst     0.605028                      
-system.cpu.l2cache.overall_mshr_miss_rate::cpu.data     0.994751                      
-system.cpu.l2cache.overall_mshr_miss_rate::total     0.717533                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 50500.634921                      
-system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 50500.634921                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::cpu.inst 50511.619718                      
-system.cpu.l2cache.ReadCleanReq_avg_mshr_miss_latency::total 50511.619718                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::cpu.data 50506.250000                      
-system.cpu.l2cache.ReadSharedReq_avg_mshr_miss_latency::total 50506.250000                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 50511.619718                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 50501.583113                      
-system.cpu.l2cache.demand_avg_mshr_miss_latency::total 50507.602957                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 50511.619718                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 50501.583113                      
-system.cpu.l2cache.overall_avg_mshr_miss_latency::total 50507.602957                      
-system.cpu.toL2Bus.snoop_filter.tot_requests         9476                      
-system.cpu.toL2Bus.snoop_filter.hit_single_requests         2878                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0                      
-system.cpu.toL2Bus.snoop_filter.tot_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                      
-system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                      
-system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.cpu.toL2Bus.trans_dist::ReadResp          5021                      
-system.cpu.toL2Bus.trans_dist::WritebackDirty            7                      
-system.cpu.toL2Bus.trans_dist::WritebackClean         2836                      
-system.cpu.toL2Bus.trans_dist::CleanEvict           34                      
-system.cpu.toL2Bus.trans_dist::ReadExReq         1578                      
-system.cpu.toL2Bus.trans_dist::ReadExResp         1578                      
-system.cpu.toL2Bus.trans_dist::ReadCleanReq         4694                      
-system.cpu.toL2Bus.trans_dist::ReadSharedReq          327                      
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side        12224                      
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side         3851                      
-system.cpu.toL2Bus.pkt_count::total             16075                      
-system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side       481920                      
-system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side       122368                      
-system.cpu.toL2Bus.pkt_size::total             604288                      
-system.cpu.toL2Bus.snoops                           0                      
-system.cpu.toL2Bus.snoopTraffic                     0                      
-system.cpu.toL2Bus.snoop_fanout::samples         6599                      
-system.cpu.toL2Bus.snoop_fanout::mean        0.000152                      
-system.cpu.toL2Bus.snoop_fanout::stdev       0.012310                      
-system.cpu.toL2Bus.snoop_fanout::underflows            0      0.00%      0.00%
-system.cpu.toL2Bus.snoop_fanout::0               6598     99.98%     99.98%
-system.cpu.toL2Bus.snoop_fanout::1                  1      0.02%    100.00%
-system.cpu.toL2Bus.snoop_fanout::2                  0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::overflows            0      0.00%    100.00%
-system.cpu.toL2Bus.snoop_fanout::min_value            0                      
-system.cpu.toL2Bus.snoop_fanout::max_value            1                      
-system.cpu.toL2Bus.snoop_fanout::total           6599                      
-system.cpu.toL2Bus.reqLayer0.occupancy        7581000                      
-system.cpu.toL2Bus.reqLayer0.utilization          0.0                      
-system.cpu.toL2Bus.respLayer0.occupancy       7041000                      
-system.cpu.toL2Bus.respLayer0.utilization          0.0                      
-system.cpu.toL2Bus.respLayer1.occupancy       2857500                      
-system.cpu.toL2Bus.respLayer1.utilization          0.0                      
-system.membus.snoop_filter.tot_requests          4735                      
-system.membus.snoop_filter.hit_single_requests            0                      
-system.membus.snoop_filter.hit_multi_requests            0                      
-system.membus.snoop_filter.tot_snoops               0                      
-system.membus.snoop_filter.hit_single_snoops            0                      
-system.membus.snoop_filter.hit_multi_snoops            0                      
-system.membus.pwrStateResidencyTicks::UNDEFINED 250991873500                      
-system.membus.trans_dist::ReadResp               3160                      
-system.membus.trans_dist::ReadExReq              1575                      
-system.membus.trans_dist::ReadExResp             1575                      
-system.membus.trans_dist::ReadSharedReq          3160                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port         9470                      
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total         9470                      
-system.membus.pkt_count::total                   9470                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port       303040                      
-system.membus.pkt_size_system.cpu.l2cache.mem_side::total       303040                      
-system.membus.pkt_size::total                  303040                      
-system.membus.snoops                                0                      
-system.membus.snoopTraffic                          0                      
-system.membus.snoop_fanout::samples              4735                      
-system.membus.snoop_fanout::mean                    0                      
-system.membus.snoop_fanout::stdev                   0                      
-system.membus.snoop_fanout::underflows              0      0.00%      0.00%
-system.membus.snoop_fanout::0                    4735    100.00%    100.00%
-system.membus.snoop_fanout::1                       0      0.00%    100.00%
-system.membus.snoop_fanout::overflows               0      0.00%    100.00%
-system.membus.snoop_fanout::min_value               0                      
-system.membus.snoop_fanout::max_value               0                      
-system.membus.snoop_fanout::total                4735                      
-system.membus.reqLayer0.occupancy             4771000                      
-system.membus.reqLayer0.utilization               0.0                      
-system.membus.respLayer1.occupancy           23675000                      
-system.membus.respLayer1.utilization              0.0                      
-
----------- End Simulation Statistics   ----------
diff --git a/tests/quick/se/70.twolf/test.py b/tests/quick/se/70.twolf/test.py
deleted file mode 100644 (file)
index cc131b0..0000000
+++ /dev/null
@@ -1,50 +0,0 @@
-# Copyright (c) 2006-2007 The Regents of The University of Michigan
-# All rights reserved.
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are
-# met: redistributions of source code must retain the above copyright
-# notice, this list of conditions and the following disclaimer;
-# redistributions in binary form must reproduce the above copyright
-# notice, this list of conditions and the following disclaimer in the
-# documentation and/or other materials provided with the distribution;
-# neither the name of the copyright holders nor the names of its
-# contributors may be used to endorse or promote products derived from
-# this software without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-# Authors: Korey Sewell
-
-from __future__ import print_function
-
-m5.util.addToPath('../configs/common')
-
-from cpu2000 import twolf
-import os
-
-workload = twolf(isa, opsys, 'smred')
-root.system.cpu[0].workload = workload.makeProcess()
-cwd = root.system.cpu[0].workload[0].cwd
-
-#Remove two files who's presence or absence affects execution
-sav_file = os.path.join(cwd, workload.input_set + '.sav')
-sv2_file = os.path.join(cwd, workload.input_set + '.sv2')
-try:
-    os.unlink(sav_file)
-except:
-    print("Couldn't unlink ", sav_file)
-try:
-    os.unlink(sv2_file)
-except:
-    print("Couldn't unlink ", sv2_file)