Call internal checker more often

diff --git a/frontends/ast/ast.cc b/frontends/ast/ast.cc
index bf7d0c38c3e59f688e24df7303833bb1c8f3ece2..115a3933397ee32a0a224eda71782391123a03f8 100644 (file)
--- a/frontends/ast/ast.cc
+++ b/frontends/ast/ast.cc
@@ -856,6 +856,7 @@ RTLIL::IdString AstModule::derive(RTLIL::Design *design, std::map<RTLIL::IdStrin
        if (design->modules.count(modname) == 0) {
                new_ast->str = modname;
                design->modules[modname] = process_module(new_ast);
+               design->modules[modname]->check();
        } else {
                log("Found cached RTLIL representation for module `%s'.\n", modname.c_str());
        }

diff --git a/kernel/driver.cc b/kernel/driver.cc
index 54f7a2e65bbd06ef97c23ece7c9a33412827e287..05a0c48a8988a4e34f54ce5495560961863bdcda 100644 (file)
--- a/kernel/driver.cc
+++ b/kernel/driver.cc
@@ -67,14 +67,10 @@ static void run_frontend(std::string filename, std::string command, RTLIL::Desig
                if (f == NULL)
                        log_error("Can't open script file `%s' for reading: %s\n", filename.c_str(), strerror(errno));
                std::string command;
-               while (fgetline(f, command)) {
+               while (fgetline(f, command))
                        Pass::call(design, command);
-                       design->check();
-               }
-               if (!command.empty()) {
+               if (!command.empty())
                        Pass::call(design, command);
-                       design->check();
-               }
                if (filename != "-")
                        fclose(f);
                if (backend_command != NULL && *backend_command == "auto")
@@ -89,7 +85,6 @@ static void run_frontend(std::string filename, std::string command, RTLIL::Desig
        }
 
        Frontend::frontend_call(design, NULL, filename, command);
-       design->check();
 }
 
 static void run_pass(std::string command, RTLIL::Design *design)
@@ -97,7 +92,6 @@ static void run_pass(std::string command, RTLIL::Design *design)
        log("\n-- Running pass `%s' --\n", command.c_str());
 
        Pass::call(design, command);
-       design->check();
 }
 
 static void run_backend(std::string filename, std::string command, RTLIL::Design *design)
@@ -125,7 +119,6 @@ static void run_backend(std::string filename, std::string command, RTLIL::Design
        }
 
        Backend::backend_call(design, NULL, filename, command);
-       design->check();
 }
 
 static char *readline_cmd_generator(const char *text, int state)

diff --git a/kernel/register.cc b/kernel/register.cc
index 4575e4091517eb0366acef8cae36d93c578f6b96..e02fc8fc0415868f19509aef6765cb0c34d1e4ce 100644 (file)
--- a/kernel/register.cc
+++ b/kernel/register.cc
@@ -178,6 +178,8 @@ void Pass::call(RTLIL::Design *design, std::vector<std::string> args)
        pass_register[args[0]]->execute(args, design);
        while (design->selection_stack.size() > orig_sel_stack_pos)
                design->selection_stack.pop_back();
+
+       design->check();
 }
 
 Frontend::Frontend(std::string name, std::string short_help) : Pass("read_"+name, short_help), frontend_name(name)
@@ -270,6 +272,8 @@ void Frontend::frontend_call(RTLIL::Design *design, FILE *f, std::string filenam
                        args.push_back(filename);
                frontend_register[args[0]]->execute(args, design);
        }
+
+       design->check();
 }
 
 Backend::Backend(std::string name, std::string short_help) : Pass("write_"+name, short_help), backend_name(name)
@@ -364,6 +368,8 @@ void Backend::backend_call(RTLIL::Design *design, FILE *f, std::string filename,
 
        while (design->selection_stack.size() > orig_sel_stack_pos)
                design->selection_stack.pop_back();
+
+       design->check();
 }
 
 struct HelpPass : public Pass {

diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc
index 75ff4a6c84deef5be6af01f87ca126fedb616f10..913c8a7301f5b71c3650a077e94eb5043c43a679 100644 (file)
--- a/passes/techmap/techmap.cc
+++ b/passes/techmap/techmap.cc
@@ -352,6 +352,8 @@ struct TechmapPass : public Pass {
                        for (auto &mod_it : design->modules)
                                if (techmap_module(design, mod_it.second, map, handled_cells, celltypeMap, false, opt_mode))
                                        did_something = true;
+                       if (did_something)
+                               design->check();
                }
 
                log("No more expansions possible.\n");