* ld-powerpc/tlsexetoc.d: Update.

	* ld-powerpc/tlsso.d: Update.
	* ld-powerpc/tlstoc.d: Update.
	* ld-powerpc/tlstocso.d: Update.
	* ld-powerpc/tlstocso.r: Update.

diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 939af77a78fa0865bf3fcfbc79a2f85d9e274bd5..7abdca720e0d1e9474da56b0ac518d1c2f0142e6 100644 (file)
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2003-06-16  Alan Modra  <amodra@bigpond.net.au>
+
+       * ld-powerpc/tlsexetoc.d: Update.
+       * ld-powerpc/tlsso.d: Update.
+       * ld-powerpc/tlstoc.d: Update.
+       * ld-powerpc/tlstocso.d: Update.
+       * ld-powerpc/tlstocso.r: Update.
+
 2003-06-16  Hans-Peter Nilsson  <hp@axis.com>
 
        * ld-cris/ldsym1.d: Restrict to cris-*-*elf* and cris-*-*aout*.

diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index 590a4dbd510bdbc9cc09561e77c221b03ef8c1f4..0f494aed6e0d7e3af97faa2106812e0ecab99aa5 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -33,7 +33,7 @@ Disassembly of section \.text:
 .*     39 23 80 40     addi    r9,r3,-32704
 .*     3d 23 00 00     addis   r9,r3,0
 .*     81 49 80 48     lwz     r10,-32696\(r9\)
-.*     3d 2d 00 00     addis   r9,r13,0
+.*     e9 22 80 48     ld      r9,-32696\(r2\)
 .*     7d 49 18 2a     ldx     r10,r9,r3
 .*     3d 2d 00 00     addis   r9,r13,0
 .*     a1 49 91 d8     lhz     r10,-28200\(r9\)

diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d
index 814659c75390961f8cae89d7f68d20096fde7bf3..5f13b0415c4002ce221eb47157876d5bce79bb79 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlsso.d
+++ b/ld/testsuite/ld-powerpc/tlsso.d
@@ -53,9 +53,9 @@ Disassembly of section \.text:
 .*     7d 49 19 2a     stdx    r10,r9,r3
 .*     e9 22 80 58     ld      r9,-32680\(r2\)
 .*     7d 49 6b 2e     sthx    r10,r9,r13
-.*     e9 4d 90 2a     lwa     r10,-28632\(r13\)
+.*     e9 4d 00 02     lwa     r10,0\(r13\)
 .*     3d 2d 00 00     addis   r9,r13,0
-.*     a9 49 90 30     lha     r10,-28624\(r9\)
+.*     a9 49 00 00     lha     r10,0\(r9\)
 .*     7d 89 02 a6     mfctr   r12
 .*     78 0b 1f 24     rldicr  r11,r0,3,60
 .*     34 40 80 00     addic\. r2,r0,-32768

diff --git a/ld/testsuite/ld-powerpc/tlstoc.d b/ld/testsuite/ld-powerpc/tlstoc.d
index d598bbef56f018e16f4d41c60ca9d72a41c0ad27..b6b2dfef3d47061e4b1f4a5f2a4a6e3ca6bfad4f 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlstoc.d
+++ b/ld/testsuite/ld-powerpc/tlstoc.d
@@ -9,29 +9,29 @@
 
 Disassembly of section \.text:
 
-00000000100000e8 <\.__tls_get_addr>:
-    100000e8:  4e 80 00 20     blr
+.* <\.__tls_get_addr>:
+.*     4e 80 00 20     blr
 
-00000000100000ec <_start>:
-    100000ec:  3c 6d 00 00     addis   r3,r13,0
-    100000f0:  60 00 00 00     nop
-    100000f4:  38 63 90 58     addi    r3,r3,-28584
-    100000f8:  3c 6d 00 00     addis   r3,r13,0
-    100000fc:  60 00 00 00     nop
-    10000100:  38 63 10 00     addi    r3,r3,4096
-    10000104:  3c 6d 00 00     addis   r3,r13,0
-    10000108:  60 00 00 00     nop
-    1000010c:  38 63 90 58     addi    r3,r3,-28584
-    10000110:  3c 6d 00 00     addis   r3,r13,0
-    10000114:  60 00 00 00     nop
-    10000118:  38 63 10 00     addi    r3,r3,4096
-    1000011c:  39 23 80 50     addi    r9,r3,-32688
-    10000120:  3d 23 00 00     addis   r9,r3,0
-    10000124:  81 49 80 58     lwz     r10,-32680\(r9\)
-    10000128:  3d 2d 00 00     addis   r9,r13,0
-    1000012c:  7d 49 18 2a     ldx     r10,r9,r3
-    10000130:  3d 2d 00 00     addis   r9,r13,0
-    10000134:  a1 49 90 a0     lhz     r10,-28512\(r9\)
-    10000138:  89 4d 90 70     lbz     r10,-28560\(r13\)
-    1000013c:  3d 2d 00 00     addis   r9,r13,0
-    10000140:  99 49 90 78     stb     r10,-28552\(r9\)
+.* <_start>:
+.*     3c 6d 00 00     addis   r3,r13,0
+.*     60 00 00 00     nop
+.*     38 63 90 58     addi    r3,r3,-28584
+.*     3c 6d 00 00     addis   r3,r13,0
+.*     60 00 00 00     nop
+.*     38 63 10 00     addi    r3,r3,4096
+.*     3c 6d 00 00     addis   r3,r13,0
+.*     60 00 00 00     nop
+.*     38 63 90 58     addi    r3,r3,-28584
+.*     3c 6d 00 00     addis   r3,r13,0
+.*     60 00 00 00     nop
+.*     38 63 10 00     addi    r3,r3,4096
+.*     39 23 80 50     addi    r9,r3,-32688
+.*     3d 23 00 00     addis   r9,r3,0
+.*     81 49 80 58     lwz     r10,-32680\(r9\)
+.*     e9 22 80 40     ld      r9,-32704\(r2\)
+.*     7d 49 18 2a     ldx     r10,r9,r3
+.*     3d 2d 00 00     addis   r9,r13,0
+.*     a1 49 90 a0     lhz     r10,-28512\(r9\)
+.*     89 4d 90 70     lbz     r10,-28560\(r13\)
+.*     3d 2d 00 00     addis   r9,r13,0
+.*     99 49 90 78     stb     r10,-28552\(r9\)

diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d
index 20501ab0c2a086a375e2824e1576bc5e82ba4a97..8ea7627c1cd4dab5424e5b9a13d2bc467ec2d048 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlstocso.d
+++ b/ld/testsuite/ld-powerpc/tlstocso.d
@@ -33,7 +33,7 @@ Disassembly of section \.text:
 .*     39 23 80 40     addi    r9,r3,-32704
 .*     3d 23 00 00     addis   r9,r3,0
 .*     81 49 80 48     lwz     r10,-32696\(r9\)
-.*     3d 2d 00 00     addis   r9,r13,0
+.*     e9 22 80 48     ld      r9,-32696\(r2\)
 .*     7d 49 18 2a     ldx     r10,r9,r3
 .*     e9 22 80 50     ld      r9,-32688\(r2\)
 .*     7d 49 6a 2e     lhzx    r10,r9,r13

diff --git a/ld/testsuite/ld-powerpc/tlstocso.r b/ld/testsuite/ld-powerpc/tlstocso.r
index a6f60c28ca098ac341deab78b39cc038fa4aaac2..096962d467b3a065736b7f3d691942481afc7bbf 100644 (file)
--- a/ld/testsuite/ld-powerpc/tlstocso.r
+++ b/ld/testsuite/ld-powerpc/tlstocso.r
@@ -50,9 +50,9 @@ Program Headers:
 
 Relocation section '\.rela\.dyn' at offset .* contains 11 entries:
  +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-0+6c2 +0+d00000048 R_PPC64_TPREL16_HA +0+108b8 \.toc \+ 40
 0+6d2 +0+1300000045 R_PPC64_TPREL16 +0+60 le0 \+ 0
 0+6d6 +0+1600000048 R_PPC64_TPREL16_HA +0+68 le1 \+ 0
+0+6da +0+1600000046 R_PPC64_TPREL16_LO +0+68 le1 \+ 0
 0+108b8 +0+1200000044 R_PPC64_DTPMOD64 +0+ gd \+ 0
 0+108c0 +0+120000004e R_PPC64_DTPREL64 +0+ gd \+ 0
 0+108c8 +0+1700000044 R_PPC64_DTPMOD64 +0+ ld \+ 0