config: Change mem_range attribute naming in ARM SimpleSystem
authorGabor Dozsa <gabor.dozsa@arm.com>
Wed, 5 Jul 2017 09:52:08 +0000 (10:52 +0100)
committerAndreas Sandberg <andreas.sandberg@arm.com>
Thu, 27 Jul 2017 15:16:30 +0000 (15:16 +0000)
MemConfig.config() expects memory ranges to be defined in a particular
way. This patch changes the naming of the mem_range attribute in
SympleSystem to enable use of MemConfig for configuring the memory.

Change-Id: I4964c136e53a99c69ff5e086cacb929aa435168d
Signed-off-by: Gabor Dozsa <gabor.dozsa@arm.com>
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/4200
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

configs/example/arm/devices.py

index f7375cd9a25ac50899ed01c5de9c119ce0ea561b..467d2b919aed6c625c337c09b0977f0d39c1eb75 100644 (file)
@@ -209,13 +209,13 @@ class SimpleSystem(LinuxArmSystem):
         mem_range = self.realview._mem_regions[0]
         mem_range_size = long(mem_range[1]) - long(mem_range[0])
         assert mem_range_size >= long(Addr(mem_size))
-        self._mem_range = AddrRange(start=mem_range[0], size=mem_size)
+        self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ]
         self._caches = caches
         if self._caches:
-            self.iocache = IOCache(addr_ranges=[self._mem_range])
+            self.iocache = IOCache(addr_ranges=[self.mem_ranges[0]])
         else:
             self.dmabridge = Bridge(delay='50ns',
-                                    ranges=[self._mem_range])
+                                    ranges=[self.mem_ranges[0]])
 
         self._pci_devices = 0
         self._clusters = []