Test r5900 floating point instructions.
authorAndrew Cagney <cagney@redhat.com>
Wed, 25 Feb 1998 15:04:11 +0000 (15:04 +0000)
committerAndrew Cagney <cagney@redhat.com>
Wed, 25 Feb 1998 15:04:11 +0000 (15:04 +0000)
17 files changed:
sim/testsuite/mips64r5900-elf/f-abs.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-add.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-cond.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-cvt.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-div.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-madd.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-madda.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-max.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-min.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-msub.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-msuba.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-mul.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-mula.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-neg.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-sqrt.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-sub.s [new file with mode: 0644]
sim/testsuite/mips64r5900-elf/f-suba.s [new file with mode: 0644]

diff --git a/sim/testsuite/mips64r5900-elf/f-abs.s b/sim/testsuite/mips64r5900-elf/f-abs.s
new file mode 100644 (file)
index 0000000..289849f
--- /dev/null
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+       start
+
+test_abs1:     
+       clearfcsr
+       loadfp $f1 4.0
+       abs.s $f2, $f1
+       checkfp 0 $f2 4.0
+
+test_abs2:
+       clearfcsr
+       loadfp $f1 4.0
+       neg.s $f1, $f1
+       abs.s $f2, $f1
+       checkfp 0 $f2 4.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-add.s b/sim/testsuite/mips64r5900-elf/f-add.s
new file mode 100644 (file)
index 0000000..caf006f
--- /dev/null
@@ -0,0 +1,38 @@
+.include "t-macros.i"
+
+       start
+
+test_add1:     
+       clearfcsr
+       loadfp $f1 4.0
+       loadfp $f2 0.1
+       add.s $f3, $f2, $f1
+       checkfp 0 $f3 4.1
+
+test_add2:
+       clearfcsr
+       loadfp $f1 , -4.0
+       loadfp $f2 8.0
+       add.s $f3, $f2, $f1
+       checkfp 0 $f3 4.0
+
+test_add3:
+       clearfcsr
+       loadfpmax $f1
+       loadfpmax $f2
+       add.s $f3, $f2, $f1
+       checkfpmax FCSR_O $f3
+
+test_add4:
+       clearfcsr
+       loadfpmax $f1
+       neg.s $f1, $f1
+       loadfpmax $f2
+       neg.s $f2, $f2
+       add.s $f3, $f2, $f1
+       checkfcsr FCSR_O
+       clearfcsr
+       neg.s $f3, $f3
+       checkfpmax 0 $f3
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-cond.s b/sim/testsuite/mips64r5900-elf/f-cond.s
new file mode 100644 (file)
index 0000000..effa8b1
--- /dev/null
@@ -0,0 +1,57 @@
+.include "t-macros.i"
+
+       start
+
+       loadfp $f1 1.0
+       loadfp $f2 2.0
+       loadfp $f3 3.0
+       
+test_f1:       
+       clearfcsr
+       c.f.s $f1, $f1
+       checkfcsr 0
+
+       
+test_eq1:
+       clearfcsr
+       c.eq.s $f1, $f1
+       checkfcsr FCSR_C
+
+test_eq2:
+       clearfcsr
+       c.eq.s $f1, $f2
+       checkfcsr 0
+
+       
+test_lt1:
+       clearfcsr
+       c.lt.s $f1, $f1
+       checkfcsr 0
+       
+test_lt2:
+       clearfcsr
+       c.lt.s $f1, $f2
+       checkfcsr FCSR_C
+       
+test_lt3:
+       clearfcsr
+       c.lt.s $f3, $f2
+       checkfcsr 0
+       
+               
+test_le1:
+       clearfcsr
+       c.le.s $f1, $f1
+       checkfcsr FCSR_C
+       
+test_le2:
+       clearfcsr
+       c.le.s $f1, $f2
+       checkfcsr FCSR_C
+       
+test_le3:
+       clearfcsr
+       c.le.s $f3, $f2
+       checkfcsr 0
+       
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-cvt.s b/sim/testsuite/mips64r5900-elf/f-cvt.s
new file mode 100644 (file)
index 0000000..8853280
--- /dev/null
@@ -0,0 +1,34 @@
+.include "t-macros.i"
+
+       start
+
+test_cvt1:     
+       clearfcsr
+       loadfp $f1 4.0
+       cvt.s.w $f2, $f1
+       mfc1 $10, $2
+       check10 0 4
+
+test_cvt2:     
+       clearfcsr
+       loadfp $f1 4.0
+       neg.s $f1, $f1
+       cvt.s.w $f2, $f1
+       mfc1 $10, $2
+       check10 0 , -4
+
+test_cvt3:
+       clearfcsr
+       li      $4, 4
+       mtc1    $4, $4
+       cvt.w.s $f3, $f4
+       checkfp 0 $f3 4.0
+
+test_cvt4:
+       clearfcsr
+       li      $4, -4
+       mtc1    $4, $4
+       cvt.w.s $f3, $f4
+       checkfp 0 $f3 , -4.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-div.s b/sim/testsuite/mips64r5900-elf/f-div.s
new file mode 100644 (file)
index 0000000..dfdd344
--- /dev/null
@@ -0,0 +1,27 @@
+.include "t-macros.i"
+
+       start
+
+test_div1:     
+       clearfcsr
+       loadfp $f1 2.0
+       loadfp $f2 4.0
+       div.s $f3, $f2, $f1
+       checkfp 0 $f3 2.0
+
+       
+test_div2:
+       clearfcsr
+       loadfp $f1 0.0
+       loadfp $f2 0.0
+       div.s $f3, $f2, $f1
+       checkfpmax FCSR_I $f3
+
+test_div3:
+       clearfcsr
+       loadfp $f1 0.0
+       loadfp $f2 1.0
+       div.s $f3, $f2, $f1
+       checkfpmax FCSR_D $f3
+       
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-madd.s b/sim/testsuite/mips64r5900-elf/f-madd.s
new file mode 100644 (file)
index 0000000..034041d
--- /dev/null
@@ -0,0 +1,21 @@
+.include "t-macros.i"
+
+       start
+
+test_madd1:    
+       clearfcsr
+       loadacc 1.0
+       loadfp $f1 2.0
+       loadfp $f2 4.0
+       madd.s $f3, $f2, $f1
+       checkfp 0 $f3 9.0
+
+test_madd2:    
+       clearfcsr
+       loadacc 4.0
+       loadfp $f1 2.0
+       loadfp $f2 2.0
+       madd.s $f3, $f2, $f1
+       checkfp 0 $f3 8.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-madda.s b/sim/testsuite/mips64r5900-elf/f-madda.s
new file mode 100644 (file)
index 0000000..eee9580
--- /dev/null
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+       start
+
+test_madda1:   
+       clearfcsr
+       loadacc  8.0
+       loadfp $f1 2.0
+       loadfp $f2 4.0
+       madda.s $f2, $f1
+       checkacc 0 16.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-max.s b/sim/testsuite/mips64r5900-elf/f-max.s
new file mode 100644 (file)
index 0000000..59c862b
--- /dev/null
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+       start
+
+       loadfp $f1, 1.0
+       loadfp $f2, 2.0
+
+test_max1:     
+       clearfcsr
+       max.s $f3, $f1, $f2
+       checkfp 0 $f3 2.0
+
+test_max2:     
+       clearfcsr
+       max.s $f3, $f2, $f1
+       checkfp 0 $f3 2.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-min.s b/sim/testsuite/mips64r5900-elf/f-min.s
new file mode 100644 (file)
index 0000000..9663e48
--- /dev/null
@@ -0,0 +1,18 @@
+.include "t-macros.i"
+
+       start
+
+       loadfp $f1, 1.0
+       loadfp $f2, 2.0
+
+test_min1:     
+       clearfcsr
+       min.s $f3, $f1, $f2
+       checkfp 0 $f3 1.0
+
+test_min2:     
+       clearfcsr
+       min.s $f3, $f2, $f1
+       checkfp 0 $f3 1.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-msub.s b/sim/testsuite/mips64r5900-elf/f-msub.s
new file mode 100644 (file)
index 0000000..04e3348
--- /dev/null
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+       start
+
+test_msub1:    
+       clearfcsr
+       loadacc  4.0
+       loadfp $f1 1.0
+       loadfp $f2 2.0
+       msub.s $f3, $f2, $f1
+       checkfp 0 $f3 2.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-msuba.s b/sim/testsuite/mips64r5900-elf/f-msuba.s
new file mode 100644 (file)
index 0000000..ce2d5a4
--- /dev/null
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+       start
+
+test_msuba1:   
+       clearfcsr
+       loadacc  2.0
+       loadfp $f1 1.0
+       loadfp $f2 2.0
+       msuba.s $f2, $f1
+       checkacc 0 0.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-mul.s b/sim/testsuite/mips64r5900-elf/f-mul.s
new file mode 100644 (file)
index 0000000..d7131dc
--- /dev/null
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+       start
+
+test_mul1:     
+       clearfcsr
+       loadfp $f1 2.0
+       loadfp $f2 4.0
+       mul.s $f3, $f2, $f1
+       checkfp 0 $f3 8.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-mula.s b/sim/testsuite/mips64r5900-elf/f-mula.s
new file mode 100644 (file)
index 0000000..83bc85e
--- /dev/null
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+       start
+
+test_mula1:    
+       clearfcsr
+       loadfp $f1 2.0
+       loadfp $f2 4.0
+       mula.s $f2, $f1
+       checkacc 0 8.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-neg.s b/sim/testsuite/mips64r5900-elf/f-neg.s
new file mode 100644 (file)
index 0000000..0757c0e
--- /dev/null
@@ -0,0 +1,11 @@
+.include "t-macros.i"
+
+       start
+
+test_neg1:     
+       clearfcsr
+       loadfp $f1 4.0
+       neg.s $f3, $f1
+       checkfp 0 $f3 , -4.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-sqrt.s b/sim/testsuite/mips64r5900-elf/f-sqrt.s
new file mode 100644 (file)
index 0000000..ab76604
--- /dev/null
@@ -0,0 +1,24 @@
+.include "t-macros.i"
+
+       start
+
+test_sqrt_4_0: 
+       clearfcsr
+       loadfp $f1 4.0
+       sqrt.s $f2, $f1
+       checkfp 0 $f2 2.0
+
+test_sqrt_0_01:
+       clearfcsr
+       loadfp $f1 0.01
+       sqrt.s $f2, $f1
+       checkfp 0 $f2 0.1
+
+test_sqrt_minus_4_0:
+       clearfcsr
+       loadfp $f1 4.0
+       neg.s $f1, $f1
+       sqrt.s $f2, $f1
+       checkfp FCSR_I $f2 2.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-sub.s b/sim/testsuite/mips64r5900-elf/f-sub.s
new file mode 100644 (file)
index 0000000..59f8898
--- /dev/null
@@ -0,0 +1,12 @@
+.include "t-macros.i"
+
+       start
+
+test_sub1:     
+       clearfcsr
+       loadfp $f1 1.0
+       loadfp $f2 2.0
+       sub.s $f3, $f2, $f1
+       checkfp 0 $f3 1.0
+
+       exit0
diff --git a/sim/testsuite/mips64r5900-elf/f-suba.s b/sim/testsuite/mips64r5900-elf/f-suba.s
new file mode 100644 (file)
index 0000000..abb1f95
--- /dev/null
@@ -0,0 +1,13 @@
+.include "t-macros.i"
+
+       start
+
+test_suba1:    
+       clearfcsr
+       loadacc 0.0
+       loadfp $f1 1.0
+       loadfp $f2 2.0
+       suba.s $f2, $f1
+       checkacc 0 1.0
+
+       exit0