* fr30-desc.c, * fr30-desc.h, * fr30-opc.c,

	* frv-desc.c, * frv-desc.h, * frv-opc.c,
	* ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
	* iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
	* lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
	* m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
	* m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
	* mep-desc.c, * mep-desc.h, * mep-opc.c,
	* mt-desc.c, * mt-desc.h, * mt-opc.c,
	* openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
	* xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
	* xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b34871d864937e597059985ef7b0f213e8d2b1fa..06d1cd80d244e5ba9986a61437b585adc70f53a7 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,18 @@
+2010-02-11  Doug Evans  <dje@sebabeach.org>
+
+       * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
+       * frv-desc.c, * frv-desc.h, * frv-opc.c,
+       * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
+       * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
+       * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
+       * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
+       * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
+       * mep-desc.c, * mep-desc.h, * mep-opc.c,
+       * mt-desc.c, * mt-desc.h, * mt-opc.c,
+       * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
+       * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
+       * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
+
 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-dis.c: Update copyright.

diff --git a/opcodes/fr30-desc.c b/opcodes/fr30-desc.c
index b33dbaf995bf3584d09213ed5abcbd2420b1e860..d80cd488586bff0d26f70fd4742e3753ef585ec4 100644 (file)
--- a/opcodes/fr30-desc.c
+++ b/opcodes/fr30-desc.c
@@ -251,11 +251,7 @@ CGEN_KEYWORD fr30_cgen_opval_h_r15 =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY fr30_cgen_hw_table[] =
 {
@@ -292,11 +288,7 @@ const CGEN_HW_ENTRY fr30_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD fr30_cgen_ifld_table[] =
 {
@@ -365,16 +357,8 @@ const CGEN_MAYBE_MULTI_IFLD FR30_F_I20_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FR30_OPERAND_##op
-#else
-#define OPERAND(op) FR30_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND fr30_cgen_operand_table[] =
 {
@@ -586,11 +570,7 @@ const CGEN_OPERAND fr30_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE fr30_cgen_insn_table[MAX_INSNS] =
 {
@@ -1630,11 +1610,7 @@ fr30_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 fr30_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/fr30-desc.h b/opcodes/fr30-desc.h
index 0f10ac79cbf1a9c498ac03c3f17c4cc4c808e89c..95e482746a49eebf8bbb6e2ab5ba88fcf2727d60 100644 (file)
--- a/opcodes/fr30-desc.h
+++ b/opcodes/fr30-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH fr30
 
 /* Given symbol S, return fr30_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) fr30##_cgen_##s
-#else
-#define CGEN_SYM(s) fr30/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/fr30-opc.c b/opcodes/fr30-opc.c
index a2254828f63a8d6dd62220fd4039469193cafedd..9ff93edc2f59b4b82d2c82c426ca7aa927b2a392 100644 (file)
--- a/opcodes/fr30-opc.c
+++ b/opcodes/fr30-opc.c
@@ -40,11 +40,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
-#else
-#define F(f) & fr30_cgen_ifld_table[FR30_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -167,16 +163,8 @@ static const CGEN_IFMT ifmt_enter ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FR30_OPERAND_##op
-#else
-#define OPERAND(op) FR30_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -1187,11 +1175,7 @@ static const CGEN_OPCODE fr30_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & fr30_cgen_ifld_table[FR30_##f]
-#else
-#define F(f) & fr30_cgen_ifld_table[FR30_/**/f]
-#endif
 static const CGEN_IFMT ifmt_ldi8m ATTRIBUTE_UNUSED = {
   16, 16, 0xf000, { { F (F_OP1) }, { F (F_I8) }, { F (F_RI) }, { 0 } }
 };
@@ -1208,16 +1192,8 @@ static const CGEN_IFMT ifmt_ldi32m ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FR30_OPERAND_##op
-#else
-#define OPERAND(op) FR30_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/frv-desc.c b/opcodes/frv-desc.c
index 5de6703023e03f43fdbeb358a792d856058e8878..df82930e70aae50fa1e71e5afecbcbf77324b3e9 100644 (file)
--- a/opcodes/frv-desc.c
+++ b/opcodes/frv-desc.c
@@ -1839,11 +1839,7 @@ CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY frv_cgen_hw_table[] =
 {
@@ -1905,11 +1901,7 @@ const CGEN_HW_ENTRY frv_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD frv_cgen_ifld_table[] =
 {
@@ -2055,16 +2047,8 @@ const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FRV_OPERAND_##op
-#else
-#define OPERAND(op) FRV_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND frv_cgen_operand_table[] =
 {
@@ -2436,11 +2420,7 @@ const CGEN_OPERAND frv_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
 {
@@ -6370,11 +6350,7 @@ frv_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/frv-desc.h b/opcodes/frv-desc.h
index fa6cbbb977952bf051603d0526cf32d2baf0cec1..e7ac5d6c5a27465b9b27331fe12254c973b055f9 100644 (file)
--- a/opcodes/frv-desc.h
+++ b/opcodes/frv-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH frv
 
 /* Given symbol S, return frv_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) frv##_cgen_##s
-#else
-#define CGEN_SYM(s) frv/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/frv-opc.c b/opcodes/frv-opc.c
index 53a3db2d2a2a35ea244ec15c91e533ec8f8dc6b4..3d0d1e0ff838d0d35307a55f509b973d240cc494 100644 (file)
--- a/opcodes/frv-opc.c
+++ b/opcodes/frv-opc.c
@@ -886,11 +886,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & frv_cgen_ifld_table[FRV_##f]
-#else
-#define F(f) & frv_cgen_ifld_table[FRV_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -1501,16 +1497,8 @@ static const CGEN_IFMT ifmt_fnop ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FRV_OPERAND_##op
-#else
-#define OPERAND(op) FRV_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -5989,11 +5977,7 @@ static const CGEN_OPCODE frv_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & frv_cgen_ifld_table[FRV_##f]
-#else
-#define F(f) & frv_cgen_ifld_table[FRV_/**/f]
-#endif
 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
   32, 32, 0x7fffffff, { { F (F_PACK) }, { F (F_GRK) }, { F (F_OP) }, { F (F_GRI) }, { F (F_D12) }, { 0 } }
 };
@@ -6026,16 +6010,8 @@ static const CGEN_IFMT ifmt_cmov ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) FRV_OPERAND_##op
-#else
-#define OPERAND(op) FRV_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/ip2k-desc.c b/opcodes/ip2k-desc.c
index bba2edf123e413a8eb374d88644ea78f4d3f2652..4a90db5b63af5f46676304010fa52945430e4fdb 100644 (file)
--- a/opcodes/ip2k-desc.c
+++ b/opcodes/ip2k-desc.c
@@ -263,11 +263,7 @@ CGEN_KEYWORD ip2k_cgen_opval_register_names =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY ip2k_cgen_hw_table[] =
 {
@@ -292,11 +288,7 @@ const CGEN_HW_ENTRY ip2k_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD ip2k_cgen_ifld_table[] =
 {
@@ -333,16 +325,8 @@ const CGEN_IFLD ip2k_cgen_ifld_table[] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IP2K_OPERAND_##op
-#else
-#define OPERAND(op) IP2K_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND ip2k_cgen_operand_table[] =
 {
@@ -410,11 +394,7 @@ const CGEN_OPERAND ip2k_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE ip2k_cgen_insn_table[MAX_INSNS] =
 {
@@ -1059,11 +1039,7 @@ ip2k_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 ip2k_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/ip2k-desc.h b/opcodes/ip2k-desc.h
index cbefb1dd6c3c94e7ab78bfcb2d014e3efb34b5d5..1c5af9fa6647e901d780c62e0ced4b0c10d03094 100644 (file)
--- a/opcodes/ip2k-desc.h
+++ b/opcodes/ip2k-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH ip2k
 
 /* Given symbol S, return ip2k_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) ip2k##_cgen_##s
-#else
-#define CGEN_SYM(s) ip2k/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/ip2k-opc.c b/opcodes/ip2k-opc.c
index 008e2320ad9be7797b4fd15be52608ade3e5ebc7..4391a6cf137a3cc514688ded37d3aea37fa2edd8 100644 (file)
--- a/opcodes/ip2k-opc.c
+++ b/opcodes/ip2k-opc.c
@@ -76,11 +76,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
-#else
-#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -127,16 +123,8 @@ static const CGEN_IFMT ifmt_reti ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IP2K_OPERAND_##op
-#else
-#define OPERAND(op) IP2K_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -673,11 +661,7 @@ static const CGEN_OPCODE ip2k_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
-#else
-#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
-#endif
 static const CGEN_IFMT ifmt_sc ATTRIBUTE_UNUSED = {
   16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
 };
@@ -706,16 +690,8 @@ static const CGEN_IFMT ifmt_skipb ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IP2K_OPERAND_##op
-#else
-#define OPERAND(op) IP2K_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/iq2000-desc.c b/opcodes/iq2000-desc.c
index f6311925f9e0393eb486e865f8ce329832b1c8e1..6ea18c70aaa54fd944497c416f8867c6256a70c2 100644 (file)
--- a/opcodes/iq2000-desc.c
+++ b/opcodes/iq2000-desc.c
@@ -212,11 +212,7 @@ CGEN_KEYWORD iq2000_cgen_opval_gr_names =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY iq2000_cgen_hw_table[] =
 {
@@ -235,11 +231,7 @@ const CGEN_HW_ENTRY iq2000_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD iq2000_cgen_ifld_table[] =
 {
@@ -317,16 +309,8 @@ const CGEN_MAYBE_MULTI_IFLD IQ2000_F_RT_RS_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IQ2000_OPERAND_##op
-#else
-#define OPERAND(op) IQ2000_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND iq2000_cgen_operand_table[] =
 {
@@ -470,11 +454,7 @@ const CGEN_OPERAND iq2000_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE iq2000_cgen_insn_table[MAX_INSNS] =
 {
@@ -2064,11 +2044,7 @@ iq2000_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 iq2000_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/iq2000-desc.h b/opcodes/iq2000-desc.h
index 8f2e4b64652b768f7f3fa61bef25b38081fa7964..a1200c739b73e496b20fa2619c51dfdc0e151f09 100644 (file)
--- a/opcodes/iq2000-desc.h
+++ b/opcodes/iq2000-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH iq2000
 
 /* Given symbol S, return iq2000_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) iq2000##_cgen_##s
-#else
-#define CGEN_SYM(s) iq2000/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/iq2000-opc.c b/opcodes/iq2000-opc.c
index d622752198ee3e12a76d1432feba493fc97b2abb..dbce4c0cc84db85ecc7e1c5351ccab09edebb9e8 100644 (file)
--- a/opcodes/iq2000-opc.c
+++ b/opcodes/iq2000-opc.c
@@ -40,11 +40,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & iq2000_cgen_ifld_table[IQ2000_##f]
-#else
-#define F(f) & iq2000_cgen_ifld_table[IQ2000_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -227,16 +223,8 @@ static const CGEN_IFMT ifmt_ctc ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IQ2000_OPERAND_##op
-#else
-#define OPERAND(op) IQ2000_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -1907,11 +1895,7 @@ static const CGEN_OPCODE iq2000_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & iq2000_cgen_ifld_table[IQ2000_##f]
-#else
-#define F(f) & iq2000_cgen_ifld_table[IQ2000_/**/f]
-#endif
 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
   32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_RS) }, { F (F_RT) }, { F (F_RD) }, { F (F_SHAMT) }, { F (F_FUNC) }, { 0 } }
 };
@@ -2292,16 +2276,8 @@ static const CGEN_IFMT ifmt_m_wbiu ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) IQ2000_OPERAND_##op
-#else
-#define OPERAND(op) IQ2000_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/lm32-desc.c b/opcodes/lm32-desc.c
index 3ea9a7ccf567c1596308f1917413d625f59d65aa..b7420ebf881e52a2aef566df8a0b600eeca9a3a4 100644 (file)
--- a/opcodes/lm32-desc.c
+++ b/opcodes/lm32-desc.c
@@ -207,11 +207,7 @@ CGEN_KEYWORD lm32_cgen_opval_h_csr =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY lm32_cgen_hw_table[] =
 {
@@ -231,11 +227,7 @@ const CGEN_HW_ENTRY lm32_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD lm32_cgen_ifld_table[] =
 {
@@ -270,16 +262,8 @@ const CGEN_IFLD lm32_cgen_ifld_table[] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) LM32_OPERAND_##op
-#else
-#define OPERAND(op) LM32_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND lm32_cgen_operand_table[] =
 {
@@ -367,11 +351,7 @@ const CGEN_OPERAND lm32_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE lm32_cgen_insn_table[MAX_INSNS] =
 {
@@ -1041,11 +1021,7 @@ lm32_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 lm32_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/lm32-desc.h b/opcodes/lm32-desc.h
index d5e8cbd53d2b8644a20b488e24c543c208f1500c..58dceadb2e533d07bf221d60325356985c5bf745 100644 (file)
--- a/opcodes/lm32-desc.h
+++ b/opcodes/lm32-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH lm32
 
 /* Given symbol S, return lm32_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) lm32##_cgen_##s
-#else
-#define CGEN_SYM(s) lm32/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/lm32-opc.c b/opcodes/lm32-opc.c
index fe1115de3d54cf2fc7a1da79a96f48491304800f..b4dbd079dd320926fda07f89d2975e58d67392f3 100644 (file)
--- a/opcodes/lm32-opc.c
+++ b/opcodes/lm32-opc.c
@@ -40,11 +40,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & lm32_cgen_ifld_table[LM32_##f]
-#else
-#define F(f) & lm32_cgen_ifld_table[LM32_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -139,16 +135,8 @@ static const CGEN_IFMT ifmt_addgotoff ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) LM32_OPERAND_##op
-#else
-#define OPERAND(op) LM32_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -715,25 +703,13 @@ static const CGEN_OPCODE lm32_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & lm32_cgen_ifld_table[LM32_##f]
-#else
-#define F(f) & lm32_cgen_ifld_table[LM32_/**/f]
-#endif
 #undef F
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) LM32_OPERAND_##op
-#else
-#define OPERAND(op) LM32_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/lm32-opinst.c b/opcodes/lm32-opinst.c
index 77d1b2c454c7ebee49f713ed864a875fe53a5713..f6ad59190a507b90c3efba9cc7a84bf1e4431936 100644 (file)
--- a/opcodes/lm32-opinst.c
+++ b/opcodes/lm32-opinst.c
@@ -31,11 +31,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 
 /* Operand references.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OP_ENT(op) LM32_OPERAND_##op
-#else
-#define OP_ENT(op) LM32_OPERAND_/**/op
-#endif
 #define INPUT CGEN_OPINST_INPUT
 #define OUTPUT CGEN_OPINST_OUTPUT
 #define END CGEN_OPINST_END

diff --git a/opcodes/m32c-desc.c b/opcodes/m32c-desc.c
index 6d0eb3c07eabce4ab62c81e7d52174b71b1465ea..39643915272c17f5d706188a6fcde13dc0bc9501 100644 (file)
--- a/opcodes/m32c-desc.c
+++ b/opcodes/m32c-desc.c
@@ -697,11 +697,7 @@ CGEN_KEYWORD m32c_cgen_opval_h_shimm =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY m32c_cgen_hw_table[] =
 {
@@ -788,11 +784,7 @@ const CGEN_HW_ENTRY m32c_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD m32c_cgen_ifld_table[] =
 {
@@ -1164,16 +1156,8 @@ const CGEN_MAYBE_MULTI_IFLD M32C_F_COND32J_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32C_OPERAND_##op
-#else
-#define OPERAND(op) M32C_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND m32c_cgen_operand_table[] =
 {
@@ -2718,11 +2702,7 @@ const CGEN_OPERAND m32c_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE m32c_cgen_insn_table[MAX_INSNS] =
 {
@@ -63077,11 +63057,7 @@ m32c_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 m32c_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/m32c-desc.h b/opcodes/m32c-desc.h
index 274fc0b66cb3f353a79d4e757a0b8622c05a8791..31cd2b3ec8843ef424db2605c030c5e61bbfef04 100644 (file)
--- a/opcodes/m32c-desc.h
+++ b/opcodes/m32c-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH m32c
 
 /* Given symbol S, return m32c_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) m32c##_cgen_##s
-#else
-#define CGEN_SYM(s) m32c/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */
@@ -60,8 +56,6 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 /* Maximum number of fields in an instruction.  */
 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 13
 
-/* Enums.  */
-
 /* Attributes.  */
 
 /* Enum declaration for machine type selection.  */

diff --git a/opcodes/m32c-opc.c b/opcodes/m32c-opc.c
index 00bace8fffc5562a3b21ae6318dffd19872ec022..2f5ed073d811bf22988d0b63ce0c23ac67a0f2b8 100644 (file)
--- a/opcodes/m32c-opc.c
+++ b/opcodes/m32c-opc.c
@@ -64,11 +64,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
-#else
-#define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -7871,16 +7867,8 @@ static const CGEN_IFMT ifmt_stzx16_imm8_imm8_abs16 ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32C_OPERAND_##op
-#else
-#define OPERAND(op) M32C_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -80069,11 +80057,7 @@ static const CGEN_OPCODE m32c_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
-#else
-#define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
-#endif
 static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED = {
   16, 16, 0xfff0, { { F (F_0_4) }, { F (F_4_4) }, { F (F_8_4) }, { F (F_IMM_12_S4) }, { 0 } }
 };
@@ -80082,16 +80066,8 @@ static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32C_OPERAND_##op
-#else
-#define OPERAND(op) M32C_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/m32r-desc.c b/opcodes/m32r-desc.c
index cb19d62cd82fce74fbac59203c007fa28c59fa7f..0aa757f82a866ad00746fff01edb1506d3970964 100644 (file)
--- a/opcodes/m32r-desc.c
+++ b/opcodes/m32r-desc.c
@@ -227,11 +227,7 @@ CGEN_KEYWORD m32r_cgen_opval_h_accums =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY m32r_cgen_hw_table[] =
 {
@@ -261,11 +257,7 @@ const CGEN_HW_ENTRY m32r_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD m32r_cgen_ifld_table[] =
 {
@@ -314,16 +306,8 @@ const CGEN_IFLD m32r_cgen_ifld_table[] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32R_OPERAND_##op
-#else
-#define OPERAND(op) M32R_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND m32r_cgen_operand_table[] =
 {
@@ -451,11 +435,7 @@ const CGEN_OPERAND m32r_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE m32r_cgen_insn_table[MAX_INSNS] =
 {
@@ -1410,11 +1390,7 @@ m32r_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 m32r_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/m32r-desc.h b/opcodes/m32r-desc.h
index 338cba5a8e07e3be2831b3a9e596b3d5e7012e21..ac3595887850321e1762c02202eb9ca2b006750d 100644 (file)
--- a/opcodes/m32r-desc.h
+++ b/opcodes/m32r-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH m32r
 
 /* Given symbol S, return m32r_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) m32r##_cgen_##s
-#else
-#define CGEN_SYM(s) m32r/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/m32r-opc.c b/opcodes/m32r-opc.c
index 2061364851bfb8962e5de91964de460a88b2533d..fdc9f50ed863614a2f7fd3ee6792b7611c0ef10a 100644 (file)
--- a/opcodes/m32r-opc.c
+++ b/opcodes/m32r-opc.c
@@ -63,11 +63,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & m32r_cgen_ifld_table[M32R_##f]
-#else
-#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -210,16 +206,8 @@ static const CGEN_IFMT ifmt_btst ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32R_OPERAND_##op
-#else
-#define OPERAND(op) M32R_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -1128,11 +1116,7 @@ static const CGEN_OPCODE m32r_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & m32r_cgen_ifld_table[M32R_##f]
-#else
-#define F(f) & m32r_cgen_ifld_table[M32R_/**/f]
-#endif
 static const CGEN_IFMT ifmt_bc8r ATTRIBUTE_UNUSED = {
   16, 16, 0xff00, { { F (F_OP1) }, { F (F_R1) }, { F (F_DISP8) }, { 0 } }
 };
@@ -1281,16 +1265,8 @@ static const CGEN_IFMT ifmt_push ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) M32R_OPERAND_##op
-#else
-#define OPERAND(op) M32R_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/m32r-opinst.c b/opcodes/m32r-opinst.c
index 0e46e91cb0b75acedb2ca6a9d559778ff2d2e38d..3814be894c164ffd37fae82e4755ca1f7775ce9b 100644 (file)
--- a/opcodes/m32r-opinst.c
+++ b/opcodes/m32r-opinst.c
@@ -31,11 +31,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 
 /* Operand references.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OP_ENT(op) M32R_OPERAND_##op
-#else
-#define OP_ENT(op) M32R_OPERAND_/**/op
-#endif
 #define INPUT CGEN_OPINST_INPUT
 #define OUTPUT CGEN_OPINST_OUTPUT
 #define END CGEN_OPINST_END

diff --git a/opcodes/mep-desc.c b/opcodes/mep-desc.c
index 858f75e1691e1bad22f771b010622cdcbe6c665e..c72f038911f6485156100da65fee279758414b5f 100644 (file)
--- a/opcodes/mep-desc.c
+++ b/opcodes/mep-desc.c
@@ -556,11 +556,7 @@ CGEN_KEYWORD mep_cgen_opval_h_ccr_ivc2 =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY mep_cgen_hw_table[] =
 {
@@ -587,11 +583,7 @@ const CGEN_HW_ENTRY mep_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD mep_cgen_ifld_table[] =
 {
@@ -881,16 +873,8 @@ const CGEN_MAYBE_MULTI_IFLD MEP_F_IVC2_CRNX_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MEP_OPERAND_##op
-#else
-#define OPERAND(op) MEP_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND mep_cgen_operand_table[] =
 {
@@ -1486,11 +1470,7 @@ const CGEN_OPERAND mep_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE mep_cgen_insn_table[MAX_INSNS] =
 {
@@ -6270,11 +6250,7 @@ mep_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 mep_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/mep-desc.h b/opcodes/mep-desc.h
index 68377025a4fa8cdf6cf6e2c7059925827b8f8d55..97adde8231ede393f9c14bf50922af683a0f4e17 100644 (file)
--- a/opcodes/mep-desc.h
+++ b/opcodes/mep-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH mep
 
 /* Given symbol S, return mep_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) mep##_cgen_##s
-#else
-#define CGEN_SYM(s) mep/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/mep-opc.c b/opcodes/mep-opc.c
index 72fe8b2c546970a1290704aaa4900b5dc518d7ef..9b09dd748381cb567a786be52288fed5cf8a3039 100644 (file)
--- a/opcodes/mep-opc.c
+++ b/opcodes/mep-opc.c
@@ -187,11 +187,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & mep_cgen_ifld_table[MEP_##f]
-#else
-#define F(f) & mep_cgen_ifld_table[MEP_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -586,16 +582,8 @@ static const CGEN_IFMT ifmt_cpfmulia1u_b_P1 ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MEP_OPERAND_##op
-#else
-#define OPERAND(op) MEP_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -6094,11 +6082,7 @@ static const CGEN_OPCODE mep_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & mep_cgen_ifld_table[MEP_##f]
-#else
-#define F(f) & mep_cgen_ifld_table[MEP_/**/f]
-#endif
 static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
   16, 16, 0xffff, { { F (F_MAJOR) }, { F (F_RN) }, { F (F_RM) }, { F (F_SUB4) }, { 0 } }
 };
@@ -6155,16 +6139,8 @@ static const CGEN_IFMT ifmt_lmcp16_0 ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MEP_OPERAND_##op
-#else
-#define OPERAND(op) MEP_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/mt-desc.c b/opcodes/mt-desc.c
index 64fda6176351ac54166539400c8d97ef812e227e..e14d1f0811fc7e9bf30418888fda191dc51ef4c8 100644 (file)
--- a/opcodes/mt-desc.c
+++ b/opcodes/mt-desc.c
@@ -186,11 +186,7 @@ CGEN_KEYWORD mt_cgen_opval_h_spr =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY mt_cgen_hw_table[] =
 {
@@ -209,11 +205,7 @@ const CGEN_HW_ENTRY mt_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD mt_cgen_ifld_table[] =
 {
@@ -311,16 +303,8 @@ const CGEN_IFLD mt_cgen_ifld_table[] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MT_OPERAND_##op
-#else
-#define OPERAND(op) MT_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND mt_cgen_operand_table[] =
 {
@@ -556,11 +540,7 @@ const CGEN_OPERAND mt_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE mt_cgen_insn_table[MAX_INSNS] =
 {
@@ -1190,11 +1170,7 @@ mt_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 mt_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/mt-desc.h b/opcodes/mt-desc.h
index 813bd923a3d833b01612746a70ab1f6c25ed369b..12d0a5f1a238b86ff885774330890347a2809c6c 100644 (file)
--- a/opcodes/mt-desc.h
+++ b/opcodes/mt-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH mt
 
 /* Given symbol S, return mt_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) mt##_cgen_##s
-#else
-#define CGEN_SYM(s) mt/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/mt-opc.c b/opcodes/mt-opc.c
index 73b70b92980b4062125822bec541ea8c78abedc3..498eeacbc6ffb7946852f60d5bd15f2a3975a927 100644 (file)
--- a/opcodes/mt-opc.c
+++ b/opcodes/mt-opc.c
@@ -75,11 +75,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & mt_cgen_ifld_table[MT_##f]
-#else
-#define F(f) & mt_cgen_ifld_table[MT_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -258,16 +254,8 @@ static const CGEN_IFMT ifmt_dfbr ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MT_OPERAND_##op
-#else
-#define OPERAND(op) MT_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -786,25 +774,13 @@ static const CGEN_OPCODE mt_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & mt_cgen_ifld_table[MT_##f]
-#else
-#define F(f) & mt_cgen_ifld_table[MT_/**/f]
-#endif
 #undef F
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) MT_OPERAND_##op
-#else
-#define OPERAND(op) MT_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/openrisc-desc.c b/opcodes/openrisc-desc.c
index 5f092a20188c968f406d5c969ee155e97449a3a4..2be68f9bdb5d002a510bf2686177bd3d44f9696c 100644 (file)
--- a/opcodes/openrisc-desc.c
+++ b/opcodes/openrisc-desc.c
@@ -183,11 +183,7 @@ CGEN_KEYWORD openrisc_cgen_opval_h_gr =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY openrisc_cgen_hw_table[] =
 {
@@ -211,11 +207,7 @@ const CGEN_HW_ENTRY openrisc_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD openrisc_cgen_ifld_table[] =
 {
@@ -272,16 +264,8 @@ const CGEN_MAYBE_MULTI_IFLD OPENRISC_F_I16NC_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) OPENRISC_OPERAND_##op
-#else
-#define OPERAND(op) OPENRISC_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND openrisc_cgen_operand_table[] =
 {
@@ -361,11 +345,7 @@ const CGEN_OPERAND openrisc_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE openrisc_cgen_insn_table[MAX_INSNS] =
 {
@@ -900,11 +880,7 @@ openrisc_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 openrisc_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/openrisc-desc.h b/opcodes/openrisc-desc.h
index 4d6742fed8cf49eb708fb83b06f1f9b91b15ca27..c31826a2af5fd471ecc9f8832b6e27a78c5a00e6 100644 (file)
--- a/opcodes/openrisc-desc.h
+++ b/opcodes/openrisc-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH openrisc
 
 /* Given symbol S, return openrisc_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) openrisc##_cgen_##s
-#else
-#define CGEN_SYM(s) openrisc/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/openrisc-opc.c b/opcodes/openrisc-opc.c
index 4f62da88a528d8bb00801be58c4948dd7023d089..e6b75a378654fa452464752490ec64a747e8863b 100644 (file)
--- a/opcodes/openrisc-opc.c
+++ b/opcodes/openrisc-opc.c
@@ -42,11 +42,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
-#else
-#define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -113,16 +109,8 @@ static const CGEN_IFMT ifmt_l_sfgtui ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) OPENRISC_OPERAND_##op
-#else
-#define OPERAND(op) OPENRISC_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -527,11 +515,7 @@ static const CGEN_OPCODE openrisc_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & openrisc_cgen_ifld_table[OPENRISC_##f]
-#else
-#define F(f) & openrisc_cgen_ifld_table[OPENRISC_/**/f]
-#endif
 static const CGEN_IFMT ifmt_l_ret ATTRIBUTE_UNUSED = {
   32, 32, 0xffffffff, { { F (F_CLASS) }, { F (F_SUB) }, { F (F_OP3) }, { F (F_OP4) }, { F (F_R2) }, { F (F_UIMM16) }, { 0 } }
 };
@@ -540,16 +524,8 @@ static const CGEN_IFMT ifmt_l_ret ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) OPENRISC_OPERAND_##op
-#else
-#define OPERAND(op) OPENRISC_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/xc16x-desc.c b/opcodes/xc16x-desc.c
index aebf815cc48536cde53073c2850c580a330ca54e..422a08a76099bb0825af473904f34c25fa164f85 100644 (file)
--- a/opcodes/xc16x-desc.c
+++ b/opcodes/xc16x-desc.c
@@ -622,11 +622,7 @@ CGEN_KEYWORD xc16x_cgen_opval_memgr8_names =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY xc16x_cgen_hw_table[] =
 {
@@ -662,11 +658,7 @@ const CGEN_HW_ENTRY xc16x_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD xc16x_cgen_ifld_table[] =
 {
@@ -739,16 +731,8 @@ const CGEN_IFLD xc16x_cgen_ifld_table[] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XC16X_OPERAND_##op
-#else
-#define OPERAND(op) XC16X_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND xc16x_cgen_operand_table[] =
 {
@@ -1024,11 +1008,7 @@ const CGEN_OPERAND xc16x_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE xc16x_cgen_insn_table[MAX_INSNS] =
 {
@@ -3393,11 +3373,7 @@ xc16x_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 xc16x_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/xc16x-desc.h b/opcodes/xc16x-desc.h
index 0278ecee509c51b2f3793484c5f578334f7a40a0..ff89a998f688e7029ac5d7f66576015f45afd4b1 100644 (file)
--- a/opcodes/xc16x-desc.h
+++ b/opcodes/xc16x-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH xc16x
 
 /* Given symbol S, return xc16x_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) xc16x##_cgen_##s
-#else
-#define CGEN_SYM(s) xc16x/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/xc16x-opc.c b/opcodes/xc16x-opc.c
index 092760c3e2f6fb82bb0060662499d17dcb84cb63..7a5abc05343fdd92a0846f0f54c1a83c524c2169 100644 (file)
--- a/opcodes/xc16x-opc.c
+++ b/opcodes/xc16x-opc.c
@@ -43,11 +43,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & xc16x_cgen_ifld_table[XC16X_##f]
-#else
-#define F(f) & xc16x_cgen_ifld_table[XC16X_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -302,16 +298,8 @@ static const CGEN_IFMT ifmt_cmpd1ri ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XC16X_OPERAND_##op
-#else
-#define OPERAND(op) XC16X_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -2912,25 +2900,13 @@ static const CGEN_OPCODE xc16x_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & xc16x_cgen_ifld_table[XC16X_##f]
-#else
-#define F(f) & xc16x_cgen_ifld_table[XC16X_/**/f]
-#endif
 #undef F
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XC16X_OPERAND_##op
-#else
-#define OPERAND(op) XC16X_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 

diff --git a/opcodes/xstormy16-desc.c b/opcodes/xstormy16-desc.c
index a6eadc4393e9b82cd6015967a5cd3adafc60cc01..902e9bc79ab57c4c175a9ae5b704951fec3865b3 100644 (file)
--- a/opcodes/xstormy16-desc.c
+++ b/opcodes/xstormy16-desc.c
@@ -218,11 +218,7 @@ CGEN_KEYWORD xstormy16_cgen_opval_h_wordsize =
 
 /* The hardware table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_HW_##a)
-#else
-#define A(a) (1 << CGEN_HW_/**/a)
-#endif
 
 const CGEN_HW_ENTRY xstormy16_cgen_hw_table[] =
 {
@@ -253,11 +249,7 @@ const CGEN_HW_ENTRY xstormy16_cgen_hw_table[] =
 
 /* The instruction field table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_IFLD_##a)
-#else
-#define A(a) (1 << CGEN_IFLD_/**/a)
-#endif
 
 const CGEN_IFLD xstormy16_cgen_ifld_table[] =
 {
@@ -321,16 +313,8 @@ const CGEN_MAYBE_MULTI_IFLD XSTORMY16_F_ABS24_MULTI_IFIELD [] =
 
 /* The operand table.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_OPERAND_##a)
-#else
-#define A(a) (1 << CGEN_OPERAND_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XSTORMY16_OPERAND_##op
-#else
-#define OPERAND(op) XSTORMY16_OPERAND_/**/op
-#endif
 
 const CGEN_OPERAND xstormy16_cgen_operand_table[] =
 {
@@ -502,11 +486,7 @@ const CGEN_OPERAND xstormy16_cgen_operand_table[] =
 /* The instruction table.  */
 
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
 
 static const CGEN_IBASE xstormy16_cgen_insn_table[MAX_INSNS] =
 {
@@ -1361,11 +1341,7 @@ xstormy16_cgen_rebuild_tables (CGEN_CPU_TABLE *cd)
    CGEN_CPU_OPEN_END:     terminates arguments
 
    ??? Simultaneous multiple isas might not make sense, but it's not (yet)
-   precluded.
-
-   ??? We only support ISO C stdargs here, not K&R.
-   Laziness, plus experiment to see if anything requires K&R - eventually
-   K&R will no longer be supported - e.g. GDB is currently trying this.  */
+   precluded.  */
 
 CGEN_CPU_DESC
 xstormy16_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)

diff --git a/opcodes/xstormy16-desc.h b/opcodes/xstormy16-desc.h
index b93f05182eb9b07cdda3bf9e06e009237ff612ac..8136df280663f0ca376bde65b4e7f316f08bb5ec 100644 (file)
--- a/opcodes/xstormy16-desc.h
+++ b/opcodes/xstormy16-desc.h
@@ -28,11 +28,7 @@ This file is part of the GNU Binutils and/or GDB, the GNU debugger.
 #define CGEN_ARCH xstormy16
 
 /* Given symbol S, return xstormy16_cgen_<S>.  */
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define CGEN_SYM(s) xstormy16##_cgen_##s
-#else
-#define CGEN_SYM(s) xstormy16/**/_cgen_/**/s
-#endif
 
 
 /* Selected cpu families.  */

diff --git a/opcodes/xstormy16-opc.c b/opcodes/xstormy16-opc.c
index f54d138296676fc077ce6ac8a4b33bb5f8cd8944..59659b3b32d937639f9f5702c78698dfffd1af17 100644 (file)
--- a/opcodes/xstormy16-opc.c
+++ b/opcodes/xstormy16-opc.c
@@ -40,11 +40,7 @@ static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
 
 /* Instruction formats.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
-#else
-#define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_/**/f]
-#endif
 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
   0, 0, 0x0, { { 0 } }
 };
@@ -163,16 +159,8 @@ static const CGEN_IFMT ifmt_iret ATTRIBUTE_UNUSED = {
 
 #undef F
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XSTORMY16_OPERAND_##op
-#else
-#define OPERAND(op) XSTORMY16_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
 
@@ -961,11 +949,7 @@ static const CGEN_OPCODE xstormy16_cgen_insn_opcode_table[MAX_INSNS] =
 
 /* Formats for ALIAS macro-insns.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
-#else
-#define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_/**/f]
-#endif
 static const CGEN_IFMT ifmt_movimm8 ATTRIBUTE_UNUSED = {
   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
 };
@@ -990,16 +974,8 @@ static const CGEN_IFMT ifmt_decgr ATTRIBUTE_UNUSED = {
 
 /* Each non-simple macro entry points to an array of expansion possibilities.  */
 
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define A(a) (1 << CGEN_INSN_##a)
-#else
-#define A(a) (1 << CGEN_INSN_/**/a)
-#endif
-#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 #define OPERAND(op) XSTORMY16_OPERAND_##op
-#else
-#define OPERAND(op) XSTORMY16_OPERAND_/**/op
-#endif
 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))