platforms/genesys2: use openocd_genesys2.cfg.

diff --git a/litex/boards/platforms/genesys2.py b/litex/boards/platforms/genesys2.py
index 0dc8a5e32d9610497fb7cde276d4dd023d517c24..f81b13280d6fa1d54685069153e19a7d07a93213 100644 (file)
--- a/litex/boards/platforms/genesys2.py
+++ b/litex/boards/platforms/genesys2.py
@@ -134,7 +134,7 @@ class Platform(XilinxPlatform):
         XilinxPlatform.__init__(self, "xc7k325t-ffg900-2", _io, _connectors, toolchain="vivado")
 
     def create_programmer(self):
-        return OpenOCD("openocd_xc7_ft2232.cfg", "bscan_spi_xc7a325t.bit")
+        return OpenOCD("openocd_genesys2.cfg", "bscan_spi_xc7a325t.bit")
 
     def do_finalize(self, fragment):
         XilinxPlatform.do_finalize(self, fragment)