uint32_t alphaBlendCount = 0;
};
- struct MemoryStats
- {
- struct MemoryTrackerKey
- {
- uint64_t address;
- uint64_t mask;
- };
-
- struct MemoryTrackerData
- {
- uint32_t accessCountRead;
- uint32_t accessCountWrite;
- uint32_t totalSizeRead;
- uint32_t totalSizeWrite;
- uint64_t tscMin;
- uint64_t tscMax;
- };
-
- struct AddressRangeComparator
- {
- bool operator()(MemoryTrackerKey a, MemoryTrackerKey b) const
- {
- return (a.address & a.mask) < (b.address & b.mask);
- }
- };
-
- typedef std::map<MemoryTrackerKey, MemoryTrackerData, AddressRangeComparator> MemoryTrackerMap;
- MemoryTrackerMap trackedMemory = {};
-
- void TrackMemoryAccess(uint64_t address, uint64_t addressMask, uint8_t isRead, uint64_t tsc, uint32_t size)
- {
- MemoryTrackerKey key;
- key.address = address;
- key.mask = addressMask;
-
- MemoryTrackerMap::iterator i = trackedMemory.lower_bound(key);
- if (i != trackedMemory.end() && !(trackedMemory.key_comp()(key, i->first)))
- {
- // already in map
- if (isRead)
- {
- i->second.accessCountRead++;
- i->second.totalSizeRead += size;
- }
- else
- {
- i->second.accessCountWrite++;
- i->second.totalSizeWrite += size;
- }
- i->second.tscMax = tsc;
- }
- else
- {
- // new entry
- MemoryTrackerData data;
- if (isRead)
- {
- data.accessCountRead = 1;
- data.totalSizeRead = size;
- data.accessCountWrite = 0;
- data.totalSizeWrite = 0;
- }
- else
- {
- data.accessCountRead = 0;
- data.totalSizeRead = 0;
- data.accessCountWrite = 1;
- data.totalSizeWrite = size;
- }
- data.tscMin = tsc;
- data.tscMax = tsc;
- trackedMemory.insert(i, MemoryTrackerMap::value_type(key, data));
- }
- }
- };
//////////////////////////////////////////////////////////////////////////
/// @brief Event handler that handles API thread events. This is shared
EventHandlerWorkerStats(uint32_t id) : EventHandlerFile(id), mNeedFlush(false)
{
memset(mShaderStats, 0, sizeof(mShaderStats));
-
- // compute address mask for memory tracking
- mAddressMask = 0;
- uint64_t addressRangeBytes = 4096;
- while (addressRangeBytes > 0)
- {
- mAddressMask = (mAddressMask << 1) | 1;
- addressRangeBytes = addressRangeBytes >> 1;
- }
- mMemGranularity = mAddressMask + 1;
- mAddressMask = ~mAddressMask;
}
virtual void Handle(const EarlyDepthStencilInfoSingleSample& event)
mGS = {};
}
- virtual void Handle(const MemoryAccessEvent& event)
- {
- uint64_t trackAddr = event.data.ptr;
- uint64_t nextAddr = (trackAddr & mAddressMask);
- uint32_t sizeTracked = 0;
-
- while (sizeTracked < event.data.size)
- {
- nextAddr += mMemGranularity;
- uint32_t size = nextAddr - trackAddr;
- size = std::min(event.data.size, size);
- mMemoryStats.TrackMemoryAccess(trackAddr, mAddressMask, event.data.isRead, event.data.tsc, size);
- sizeTracked += size;
- trackAddr = nextAddr;
- }
- }
-
- virtual void Handle(const MemoryStatsEndEvent& event)
- {
- MemoryStats::MemoryTrackerMap::iterator i = mMemoryStats.trackedMemory.begin();
- while (i != mMemoryStats.trackedMemory.end())
- {
- MemoryStatsEvent mse(event.data.drawId,
- i->first.address & mAddressMask,
- i->second.accessCountRead,
- i->second.accessCountWrite,
- i->second.totalSizeRead,
- i->second.totalSizeWrite,
- i->second.tscMin,
- i->second.tscMax);
- EventHandlerFile::Handle(mse);
- i++;
- }
- mMemoryStats.trackedMemory.clear();
- }
-
virtual void Handle(const GSPrimInfo& event)
{
mGS.inputPrimCount += event.data.inputPrimCount;
SWR_SHADER_STATS mShaderStats[NUM_SHADER_TYPES];
- MemoryStats mMemoryStats = {};
- uint64_t mAddressMask = 0;
- uint64_t mMemGranularity = 0;
-
};
static EventManager* FromHandle(HANDLE hThreadContext)
{
};
-event SwrApi::DrawInfoEvent
+///@brief Used as a helper event to indicate end of frame. Does not gaurantee to capture end of frame on all APIs
+event ApiSwr::FrameEndEvent
{
- uint32_t drawId;
- AR_DRAW_TYPE type;
- uint32_t topology;
- uint32_t numVertices;
- uint32_t numIndices;
- int32_t indexOffset;
- int32_t baseVertex;
- uint32_t numInstances;
- uint32_t startInstance;
- uint32_t tsEnable;
- uint32_t gsEnable;
- uint32_t soEnable;
- uint32_t soTopology;
- uint32_t splitId; // Split draw count or id.
+ uint32_t frameId; // current frame id
+ uint32_t nextDrawId; // next draw id (always incremental - does not reset)
};
-event SwrApi::DispatchEvent
+///@brief Synchonization event.
+event ApiSwr::SwrSyncEvent
{
uint32_t drawId;
- uint32_t threadGroupCountX;
- uint32_t threadGroupCountY;
- uint32_t threadGroupCountZ;
};
-event SwrApi::FrameEndEvent
+///@brief Invalidate hot tiles (i.e. tile cache)
+event ApiSwr::SwrInvalidateTilesEvent
{
- uint32_t frameId;
- uint32_t nextDrawId;
+ uint32_t drawId;
};
-///@brief API Stat: Synchonization event.
-event SwrApi::SwrSyncEvent
+///@brief Invalidate and discard hot tiles within pixel region
+event ApiSwr::SwrDiscardRectEvent
{
uint32_t drawId;
};
-///@brief API Stat: Invalidate hot tiles (i.e. tile cache)
-event SwrApi::SwrInvalidateTilesEvent
+///@brief Flush tiles out to memory that is typically owned by driver (e.g. Flush RT cache)
+event ApiSwr::SwrStoreTilesEvent
{
uint32_t drawId;
};
-///@brief API Stat: Invalidate and discard hot tiles within pixel region
-event SwrApi::SwrDiscardRectEvent
+event PipelineStats::DrawInfoEvent
{
uint32_t drawId;
+ AR_DRAW_TYPE type; // type of draw (indexed, instanced, etc)
+ uint32_t topology; // topology of draw
+ uint32_t numVertices; // number of vertices for draw
+ uint32_t numIndices; // number of indices for draw
+ int32_t indexOffset; // offset into index buffer
+ int32_t baseVertex; // which vertex to start with
+ uint32_t numInstances; // number of instances to draw
+ uint32_t startInstance; // which instance to start fetching
+ uint32_t tsEnable; // tesselation enabled
+ uint32_t gsEnable; // geometry shader enabled
+ uint32_t soEnable; // stream-out enabled
+ uint32_t soTopology; // topology of stream-out
+ uint32_t splitId; // split draw count or id
};
-///@brief API Stat: Flush tiles out to memory that is typically owned by driver (e.g. Flush RT cache)
-event SwrApi::SwrStoreTilesEvent
+event PipelineStats::DispatchEvent
{
uint32_t drawId;
+ uint32_t threadGroupCountX; // num thread groups in X dimension
+ uint32_t threadGroupCountY; // num thread groups in Y dimension
+ uint32_t threadGroupCountZ; // num thread groups in Z dimension
};
-event Pipeline::FrontendStatsEvent
+event PipelineStats::FrontendStatsEvent
{
uint32_t drawId;
- uint64_t counter IaVertices;
- uint64_t counter IaPrimitives;
- uint64_t counter VsInvocations;
- uint64_t counter HsInvocations;
- uint64_t counter DsInvocations;
- uint64_t counter GsInvocations;
- uint64_t counter GsPrimitives;
- uint64_t counter CInvocations;
- uint64_t counter CPrimitives;
- uint64_t counter SoPrimStorageNeeded0;
- uint64_t counter SoPrimStorageNeeded1;
- uint64_t counter SoPrimStorageNeeded2;
- uint64_t counter SoPrimStorageNeeded3;
- uint64_t counter SoNumPrimsWritten0;
- uint64_t counter SoNumPrimsWritten1;
- uint64_t counter SoNumPrimsWritten2;
- uint64_t counter SoNumPrimsWritten3;
+ uint64_t IaVertices;
+ uint64_t IaPrimitives;
+ uint64_t VsInvocations;
+ uint64_t HsInvocations;
+ uint64_t DsInvocations;
+ uint64_t GsInvocations;
+ uint64_t GsPrimitives;
+ uint64_t CInvocations;
+ uint64_t CPrimitives;
+ uint64_t SoPrimStorageNeeded0;
+ uint64_t SoPrimStorageNeeded1;
+ uint64_t SoPrimStorageNeeded2;
+ uint64_t SoPrimStorageNeeded3;
+ uint64_t SoNumPrimsWritten0;
+ uint64_t SoNumPrimsWritten1;
+ uint64_t SoNumPrimsWritten2;
+ uint64_t SoNumPrimsWritten3;
};
-event Pipeline::BackendStatsEvent
+event PipelineStats::BackendStatsEvent
{
uint32_t drawId;
- uint64_t counter DepthPassCount;
- uint64_t counter PsInvocations;
- uint64_t counter CsInvocations;
+ uint64_t DepthPassCount;
+ uint64_t PsInvocations;
+ uint64_t CsInvocations;
};
-event Pipeline::EarlyZSingleSample
+event PipelineStats::EarlyZSingleSample
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateZSingleSample
+event PipelineStats::LateZSingleSample
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyStencilSingleSample
+event PipelineStats::EarlyStencilSingleSample
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateStencilSingleSample
+event PipelineStats::LateStencilSingleSample
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyZSampleRate
+event PipelineStats::EarlyZSampleRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateZSampleRate
+event PipelineStats::LateZSampleRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyStencilSampleRate
+event PipelineStats::EarlyStencilSampleRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateStencilSampleRate
+event PipelineStats::LateStencilSampleRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
// Total Early-Z counts, SingleSample and SampleRate
-event Pipeline::EarlyZ
+event PipelineStats::EarlyZ
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
// Total LateZ counts, SingleSample and SampleRate
-event Pipeline::LateZ
+event PipelineStats::LateZ
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
// Total EarlyStencil counts, SingleSample and SampleRate
-event Pipeline::EarlyStencil
+event PipelineStats::EarlyStencil
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
// Total LateStencil counts, SingleSample and SampleRate
-event Pipeline::LateStencil
+event PipelineStats::LateStencil
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyZNullPS
+event PipelineStats::EarlyZNullPS
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyStencilNullPS
+event PipelineStats::EarlyStencilNullPS
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyZPixelRate
+event PipelineStats::EarlyZPixelRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateZPixelRate
+event PipelineStats::LateZPixelRate
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyOmZ
+event PipelineStats::EarlyOmZ
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::EarlyOmStencil
+event PipelineStats::EarlyOmStencil
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateOmZ
+event PipelineStats::LateOmZ
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::LateOmStencil
+event PipelineStats::LateOmStencil
{
uint32_t drawId;
- uint64_t counter passCount;
- uint64_t counter failCount;
+ uint64_t passCount;
+ uint64_t failCount;
};
-event Pipeline::GSInputPrims
+event PipelineStats::GSInputPrims
{
uint32_t drawId;
- uint64_t counter inputPrimCount;
+ uint64_t inputPrimCount;
};
-event Pipeline::GSPrimsGen
+event PipelineStats::GSPrimsGen
{
uint32_t drawId;
- uint64_t counter primGeneratedCount;
+ uint64_t primGeneratedCount;
};
-event Pipeline::GSVertsInput
+event PipelineStats::GSVertsInput
{
uint32_t drawId;
- uint64_t counter vertsInput;
+ uint64_t vertsInput;
};
-event Pipeline::TessPrims
+event PipelineStats::TessPrims
{
uint32_t drawId;
- uint64_t counter primCount;
+ uint64_t primCount;
};
-event Pipeline::RasterTiles
+event PipelineStats::RasterTiles
{
uint32_t drawId;
- uint32_t counter rastTileCount;
+ uint32_t rastTileCount;
};
-event Pipeline::ClipperEvent
+event PipelineStats::ClipperEvent
{
uint32_t drawId;
- uint32_t counter trivialRejectCount;
- uint32_t counter trivialAcceptCount;
- uint32_t counter mustClipCount;
+ uint32_t trivialRejectCount;
+ uint32_t trivialAcceptCount;
+ uint32_t mustClipCount;
};
-event Pipeline::CullEvent
+event PipelineStats::CullEvent
{
uint32_t drawId;
- uint64_t counter backfacePrimCount;
- uint64_t counter degeneratePrimCount;
+ uint64_t backfacePrimCount;
+ uint64_t degeneratePrimCount;
};
-event Pipeline::AlphaEvent
+event PipelineStats::AlphaEvent
{
uint32_t drawId;
- uint32_t counter alphaTestCount;
- uint32_t counter alphaBlendCount;
+ uint32_t alphaTestCount;
+ uint32_t alphaBlendCount;
};
-event Shader::VSInfo
+event ShaderStats::VSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event Shader::HSInfo
+event ShaderStats::HSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event Shader::DSInfo
+event ShaderStats::DSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event Shader::GSInfo
+event ShaderStats::GSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event Shader::PSInfo
+event ShaderStats::PSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event Shader::CSInfo
+event ShaderStats::CSInfo
{
uint32_t drawId;
- uint32_t counter numInstExecuted;
- uint32_t counter numSampleExecuted;
- uint32_t counter numSampleLExecuted;
- uint32_t counter numSampleBExecuted;
- uint32_t counter numSampleCExecuted;
- uint32_t counter numSampleCLZExecuted;
- uint32_t counter numSampleCDExecuted;
- uint32_t counter numGather4Executed;
- uint32_t counter numGather4CExecuted;
- uint32_t counter numGather4CPOExecuted;
- uint32_t counter numGather4CPOCExecuted;
- uint32_t counter numLodExecuted;
-};
-
-event SWTagApi::SWTagEndFrameEvent
-{
- uint64_t frameCount;
- uint32_t renderpassCount;
- uint32_t drawOrDispatchCount;
- uint32_t drawCount;
- uint32_t dispatchCount;
-};
-
-event SWTagApi::SWTagRenderpassEvent
-{
- uint64_t frameCount;
- uint32_t renderpassCount;
- uint32_t drawOrDispatchCount;
- uint32_t drawCount;
- uint32_t dispatchCount;
-};
-
-event SWTagApi::SWTagDrawEvent
-{
- uint64_t frameCount;
- uint32_t renderpassCount;
- uint32_t drawOrDispatchCount;
- uint32_t drawCount;
- uint32_t dispatchCount;
+ uint32_t numInstExecuted;
+ uint32_t numSampleExecuted;
+ uint32_t numSampleLExecuted;
+ uint32_t numSampleBExecuted;
+ uint32_t numSampleCExecuted;
+ uint32_t numSampleCLZExecuted;
+ uint32_t numSampleCDExecuted;
+ uint32_t numGather4Executed;
+ uint32_t numGather4CExecuted;
+ uint32_t numGather4CPOExecuted;
+ uint32_t numGather4CPOCExecuted;
+ uint32_t numLodExecuted;
};
-event SWTagApi::SWTagDispatchEvent
-{
- uint64_t frameCount;
- uint32_t renderpassCount;
- uint32_t drawOrDispatchCount;
- uint32_t drawCount;
- uint32_t dispatchCount;
-};
-
-event SWTagApi::SWTagDriverCallEvent
-{
- char cmd[256];
-};
-
-event SWTag::SWTagFlushEvent
-{
- uint32_t count;
- char reason[256];
- uint32_t type;
-};
-
-event Memory::MemoryStatsEvent
-{
- uint32_t drawId;
- uint64_t baseAddr;
- uint32_t accessCountRead;
- uint32_t accessCountWrite;
- uint32_t totalSizeRead;
- uint32_t totalSizeWrite;
- uint64_t tscMin;
- uint64_t tscMax;
-};
projects / mesa.git / commitdiff