Re: [libre-riscv-dev] processor and soc naming
authorImmanuel, Yehowshua U <yimmanuel3@gatech.edu>
Wed, 11 Mar 2020 22:17:06 +0000 (22:17 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Wed, 11 Mar 2020 22:17:18 +0000 (22:17 +0000)
3e/18120edea1933ebf3d52f24bcd03ee284bf3e8 [new file with mode: 0644]

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+From: "Immanuel, Yehowshua U" <yimmanuel3@gatech.edu>
+To: Libre-RISCV General Development <libre-riscv-dev@lists.libre-riscv.org>
+Thread-Topic: [libre-riscv-dev] processor and soc naming
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+Date: Wed, 11 Mar 2020 22:17:06 +0000
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+Subject: Re: [libre-riscv-dev] processor and soc naming
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