i965/miptree: Drop miptree_array_layout in get_isl_dim_layout()
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Thu, 29 Jun 2017 05:18:24 +0000 (08:18 +0300)
committerTopi Pohjolainen <topi.pohjolainen@intel.com>
Fri, 21 Jul 2017 21:14:16 +0000 (00:14 +0300)
This was only needed for checking gen6 stencil which is already
using isl. One could delete GEN6_HIZ_STENCIL layout altogether
but that will be gone with the rest after a while anyway.

The dim_layout converter is needed even after transition to isl
when setting up surface states - see brw_emit_surface_state().
Hence dropping the unneeded argument separately.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.h

index 45ac106f3f42502781241dcc5bf0c10b5af77bea..e9a50b89eb949ad81e152ae8e6e114ae83748884 100644 (file)
@@ -88,9 +88,10 @@ get_isl_surf(struct brw_context *brw, struct intel_mipmap_tree *mt,
       surf->dim = get_isl_surf_dim(target);
    }
 
+   assert(mt->array_layout != GEN6_HIZ_STENCIL);
+
    const enum isl_dim_layout dim_layout =
-      get_isl_dim_layout(&brw->screen->devinfo, mt->surf.tiling, target,
-                         mt->array_layout);
+      get_isl_dim_layout(&brw->screen->devinfo, mt->surf.tiling, target);
 
    if (surf->dim_layout == dim_layout)
       return;
index 73637b0fc52799fce087c0f380180924a5f4a104..3a2395b030d42875879b47297d727028336e5242 100644 (file)
@@ -3819,12 +3819,8 @@ get_isl_surf_dim(GLenum target)
 
 enum isl_dim_layout
 get_isl_dim_layout(const struct gen_device_info *devinfo,
-                   enum isl_tiling tiling, GLenum target,
-                   enum miptree_array_layout array_layout)
+                   enum isl_tiling tiling, GLenum target)
 {
-   if (array_layout == GEN6_HIZ_STENCIL)
-      return ISL_DIM_LAYOUT_GEN6_STENCIL_HIZ;
-
    switch (target) {
    case GL_TEXTURE_1D:
    case GL_TEXTURE_1D_ARRAY:
@@ -3865,10 +3861,11 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
                            const struct intel_mipmap_tree *mt,
                            struct isl_surf *surf)
 {
+   assert(mt->array_layout != GEN6_HIZ_STENCIL);
+
    surf->dim = get_isl_surf_dim(mt->target);
    surf->dim_layout = get_isl_dim_layout(&brw->screen->devinfo,
-                                         mt->surf.tiling, mt->target,
-                                         mt->array_layout);
+                                         mt->surf.tiling, mt->target);
    surf->msaa_layout = mt->surf.msaa_layout;
    surf->tiling = intel_miptree_get_isl_tiling(mt);
    surf->row_pitch = mt->surf.row_pitch;
index e7872ff96cf657c0af34292efcfd478a75258fea..7de7f86eeeef3b53dcc8f2792fc4c29f366f7a34 100644 (file)
@@ -668,8 +668,7 @@ get_isl_surf_dim(GLenum target);
 
 enum isl_dim_layout
 get_isl_dim_layout(const struct gen_device_info *devinfo,
-                   enum isl_tiling tiling,
-                   GLenum target, enum miptree_array_layout array_layout);
+                   enum isl_tiling tiling, GLenum target);
 
 enum isl_tiling
 intel_miptree_get_isl_tiling(const struct intel_mipmap_tree *mt);