opcodes: xtensa: implement styled disassembly

opcodes/
	* xtensa-dis.c (print_xtensa_operand)
	(print_insn_xtensa): Replace fprintf_func with
	fprintf_styled_func.

diff --git a/opcodes/xtensa-dis.c b/opcodes/xtensa-dis.c
index 8a26fd7c12399633418c36fe11c758ca24b59e35..3631f7fad7156ab3056b532b2d6746ee3d93dac6 100644 (file)
--- a/opcodes/xtensa-dis.c
+++ b/opcodes/xtensa-dis.c
@@ -238,24 +238,28 @@ print_xtensa_operand (bfd_vma memaddr,
       else
        {
          if ((signed_operand_val > -256) && (signed_operand_val < 256))
-           (*info->fprintf_func) (info->stream, "%d", signed_operand_val);
+           (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+                                         "%d", signed_operand_val);
          else
-           (*info->fprintf_func) (info->stream, "0x%x", signed_operand_val);
+           (*info->fprintf_styled_func) (info->stream, dis_style_immediate,
+                                         "0x%x", signed_operand_val);
        }
     }
   else
     {
       int i = 1;
       xtensa_regfile opnd_rf = xtensa_operand_regfile (isa, opc, opnd);
-      (*info->fprintf_func) (info->stream, "%s%u",
-                            xtensa_regfile_shortname (isa, opnd_rf),
-                            operand_val);
+      (*info->fprintf_styled_func) (info->stream, dis_style_register,
+                                   "%s%u",
+                                   xtensa_regfile_shortname (isa, opnd_rf),
+                                   operand_val);
       while (i < xtensa_operand_num_regs (isa, opc, opnd))
        {
          operand_val++;
-         (*info->fprintf_func) (info->stream, ":%s%u",
-                                xtensa_regfile_shortname (isa, opnd_rf),
-                                operand_val);
+         (*info->fprintf_styled_func) (info->stream, dis_style_register,
+                                       ":%s%u",
+                                       xtensa_regfile_shortname (isa, opnd_rf),
+                                       operand_val);
          i++;
        }
     }
@@ -404,7 +408,13 @@ print_insn_xtensa (bfd_vma memaddr, struct disassemble_info *info)
        }
       else
        {
-         (*info->fprintf_func) (info->stream, ".byte %#02x", priv.byte_buf[0]);
+         (*info->fprintf_styled_func) (info->stream,
+                                       dis_style_assembler_directive,
+                                       ".byte");
+         (*info->fprintf_func) (info->stream, "\t");
+         (*info->fprintf_styled_func) (info->stream,
+                                       dis_style_immediate,
+                                       "%#02x", priv.byte_buf[0]);
          return 1;
        }
     }
@@ -425,8 +435,9 @@ print_insn_xtensa (bfd_vma memaddr, struct disassemble_info *info)
 
       xtensa_format_get_slot (isa, fmt, n, insn_buffer, slot_buffer);
       opc = xtensa_opcode_decode (isa, fmt, n, slot_buffer);
-      (*info->fprintf_func) (info->stream, "%s",
-                            xtensa_opcode_name (isa, opc));
+      (*info->fprintf_styled_func) (info->stream,
+                                   dis_style_mnemonic, "%s",
+                                   xtensa_opcode_name (isa, opc));
 
       if (xtensa_opcode_is_branch (isa, opc))
        info->insn_type = dis_condbranch;