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diff --git a/openpower/sv/executive_summary.mdwn b/openpower/sv/executive_summary.mdwn
index 985e13d24dcc52b02da9be22a0a37c9160102088..9844a50c430dedbb0727cc81ababd3722d74fc8d 100644 (file)
--- a/openpower/sv/executive_summary.mdwn
+++ b/openpower/sv/executive_summary.mdwn
@@ -1,5 +1,6 @@
 Simple-V is a Scalable Vector ISA Extension specifically tailored
-for the uniquely powerful capabilities of the Power ISA.
+for the uniquely powerful capabilities of the Power ISA. SVP64
+is the instruction set format.
 
 **Simple-V does not modify harm or corrupt the existing Power ISA** and
 does not interfere with an existing system.  It needs only a small
@@ -33,9 +34,10 @@ Scalable Vectors in mind in the first place.  Contrast with RISC-V which was
 designed over a 7 year period with Cray-style Vectors right from the start.*
 
 Even with this amount of time spent, SVP64 exceeds the capability of RVV.
-RISC-V could have been significanyly enhanced if Simple V had been applied
+RISC-V could have been significantly enhanced if Simple V had been applied
 to it: this possibility was investigated very early but the decision was
-Made to go with Power ISA instead.
+made to go with Power ISA instead.
+
 Therefore it is crucial to note that
 Simple-V is **not RISC-V and is not RISC-V Vectors**.
 [NEC SX Aurora](https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf),