+2015-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ * config/aarch64/aarch64.h (TARGET_CPU_CPP_BUILTINS): Define
+ __ARM_ARCH_8A directly rather than with cpp_define_formatted.
+ * config/aarch64/aarch64.c (struct processor): Add arch field.
+ (all_architectures): Handle above, move above all_cores.
+ (all_cores): Handle above.
+ (aarch64_parse_arch): Handle above changes.
+ * config/aarch64/aarch64-arches.def (armv8-a): Extend according to
+ above. Update comments.
+ (armv8.1-a): Likewise.
+ * config/aarch64/aarch64-cores.def: Update according to above.
+ * config/aarch64/aarch64-opts.h (aarch64_arch): New enum.
+ * config/aarch64/driver-aarch64.c (struct aarch64_arch): Rename to
+ aarch64_arch_driver_info.
+
2015-08-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/aarch64/aarch64.c (struct processor): Add ident field.
/* Before using #include to read this file, define a macro:
- AARCH64_ARCH(NAME, CORE, ARCH, FLAGS)
+ AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS)
The NAME is the name of the architecture, represented as a string
constant. The CORE is the identifier for a core representative of
- this architecture. ARCH is the architecture revision. FLAGS are
- the flags implied by the architecture. */
+ this architecture. ARCH_IDENT is the architecture identifier. It must be
+ unique and be syntactically valid to appear as part of an enum identifier.
+ ARCH_REV is an integer specifying the architecture major revision.
+ FLAGS are the flags implied by the architecture.
+ Due to the assumptions about the positions of these fields in config.gcc,
+ the NAME should be kept as the first argument and FLAGS as the last. */
+
+AARCH64_ARCH("armv8-a", generic, 8A, 8, AARCH64_FL_FOR_ARCH8)
+AARCH64_ARCH("armv8.1-a", generic, 8_1A, 8, AARCH64_FL_FOR_ARCH8_1)
-AARCH64_ARCH("armv8-a", generic, 8, AARCH64_FL_FOR_ARCH8)
-AARCH64_ARCH("armv8.1-a", generic, 8, AARCH64_FL_FOR_ARCH8_1)
Before using #include to read this file, define a macro:
- AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHEDULER_IDENT, ARCH, FLAGS, COSTS, IMP, PART)
+ AARCH64_CORE(CORE_NAME, CORE_IDENT, SCHEDULER_IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART)
The CORE_NAME is the name of the core, represented as a string constant.
The CORE_IDENT is the name of the core, represented as an identifier.
The SCHEDULER_IDENT is the name of the core for which scheduling decisions
will be made, represented as an identifier.
- ARCH is the architecture revision implemented by the chip.
+ ARCH_IDENT is the architecture implemented by the chip as specified in
+ aarch64-arches.def.
FLAGS are the bitwise-or of the traits that apply to that core.
This need not include flags implied by the architecture.
COSTS is the name of the rtx_costs routine to use.
/* V8 Architecture Processors. */
-AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03")
-AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07")
-AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
-AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, "0x53", "0x001")
-AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1")
-AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
+AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53, "0x41", "0xd03")
+AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07")
+AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08")
+AARCH64_CORE("exynos-m1", exynosm1, cortexa57, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, cortexa72, "0x53", "0x001")
+AARCH64_CORE("thunderx", thunderx, thunderx, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx, "0x43", "0x0a1")
+AARCH64_CORE("xgene1", xgene1, xgene1, 8A, AARCH64_FL_FOR_ARCH8, xgene1, "0x50", "0x000")
/* V8 big.LITTLE implementations. */
-AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03")
-AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08.0xd03")
+AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57, "0x41", "0xd07.0xd03")
+AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08.0xd03")
+
aarch64_none
};
+enum aarch64_arch
+{
+#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
+ AARCH64_ARCH_##ARCH_IDENT,
+#include "aarch64-arches.def"
+#undef AARCH64_ARCH
+ aarch64_no_arch
+};
+
/* TLS types. */
enum aarch64_tls_type {
TLS_TRADITIONAL,
const char *const name;
enum aarch64_processor ident;
enum aarch64_processor sched_core;
- const char *arch;
+ enum aarch64_arch arch;
unsigned architecture_version;
const unsigned long flags;
const struct tune_params *const tune;
};
+/* Architectures implementing AArch64. */
+static const struct processor all_architectures[] =
+{
+#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
+ {NAME, CORE, CORE, AARCH64_ARCH_##ARCH_IDENT, ARCH_REV, FLAGS, NULL},
+#include "aarch64-arches.def"
+#undef AARCH64_ARCH
+ {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
+};
+
/* Processor cores implementing AArch64. */
static const struct processor all_cores[] =
{
#define AARCH64_CORE(NAME, IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
- {NAME, IDENT, SCHED, #ARCH, ARCH, FLAGS, &COSTS##_tunings},
+ {NAME, IDENT, SCHED, AARCH64_ARCH_##ARCH, \
+ all_architectures[AARCH64_ARCH_##ARCH].architecture_version, \
+ FLAGS, &COSTS##_tunings},
#include "aarch64-cores.def"
#undef AARCH64_CORE
- {"generic", generic, cortexa53, "8", 8,
- AARCH64_FL_FOR_ARCH8, &generic_tunings},
- {NULL, aarch64_none, aarch64_none, NULL, 0, 0, NULL}
+ {"generic", generic, cortexa53, AARCH64_ARCH_8A, 8,
+ AARCH64_FL_FOR_ARCH8, &generic_tunings},
+ {NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
};
-/* Architectures implementing AArch64. */
-static const struct processor all_architectures[] =
-{
-#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \
- {NAME, CORE, CORE, #ARCH, ARCH, FLAGS, NULL},
-#include "aarch64-arches.def"
-#undef AARCH64_ARCH
- {NULL, aarch64_none, aarch64_none, NULL, 0, 0, NULL}
-};
/* Target specification. These are populated as commandline arguments
are processed, or NULL if not specified. */
aarch64_parse_extension (ext);
}
- if (strcmp (selected_arch->arch, selected_cpu->arch))
+ if (selected_arch->arch != selected_cpu->arch)
{
warning (0, "switch -mcpu=%s conflicts with -march=%s switch",
- selected_cpu->name, selected_arch->name);
+ all_architectures[selected_cpu->arch].name,
+ selected_arch->name);
}
return;
("__ARM_ALIGN_MAX_STACK_PWR", 16); \
builtin_define_with_int_value \
("__ARM_ARCH", aarch64_architecture_version); \
- cpp_define_formatted \
- (parse_in, "__ARM_ARCH_%dA", aarch64_architecture_version); \
+ builtin_define ("__ARM_ARCH_8A"); \
builtin_define ("__ARM_ARCH_ISA_A64"); \
builtin_define_with_int_value \
("__ARM_ARCH_PROFILE", 'A'); \
#undef AARCH64_CORE
-struct aarch64_arch
+struct aarch64_arch_driver_info
{
const char* id;
const char* name;
};
-#define AARCH64_ARCH(NAME, CORE, ARCH, FLAGS) \
- { #ARCH, NAME },
+#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
+ { #ARCH_IDENT, NAME },
-static struct aarch64_arch aarch64_arches [] =
+static struct aarch64_arch_driver_info aarch64_arches [] =
{
#include "aarch64-arches.def"
{NULL, NULL}
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