if (R200_DEBUG & DEBUG_SYNC) {
fprintf(stderr, "%s: Syncing\n", __FUNCTION__);
- r200Finish( rmesa->radeon.glCtx );
+ radeonFinish( rmesa->radeon.glCtx );
}
}
return;
}
- r200Flush( ctx );
+ radeonFlush( ctx );
if ( mask & BUFFER_BIT_FRONT_LEFT ) {
flags |= RADEON_FRONT;
extern void r200EmitAOS(r200ContextPtr rmesa, GLuint nr, GLuint offset);
-extern void r200Flush( GLcontext *ctx );
-extern void r200Finish( GLcontext *ctx );
extern void r200InitIoctlFuncs( struct dd_function_table *functions );
extern void *r200AllocateMemoryMESA( __DRIscreen *screen, GLsizei size, GLfloat readfreq,
}
UNLOCK_HARDWARE( &rmesa->radeon );
- r200Finish( ctx ); /* required by GL */
+ radeonFinish( ctx ); /* required by GL */
#endif
return GL_TRUE;
}
if (ret == RADEON_CS_SPACE_OP_TO_BIG)
return GL_FALSE;
if (ret == RADEON_CS_SPACE_FLUSH) {
- r200Flush(ctx);
+ radeonFlush(ctx);
if (flushed)
return GL_FALSE;
flushed = 1;