sim: ft32: correct simulation of MEMCPY and MEMSET

The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.

diff --git a/sim/ft32/ChangeLog b/sim/ft32/ChangeLog
index 47218b4e65203ba78353be2b1eab4af488f7fa8a..f5b14ec15ad14c034235b45b782695733318ee33 100644 (file)
--- a/sim/ft32/ChangeLog
+++ b/sim/ft32/ChangeLog
@@ -1,3 +1,8 @@
+2015-09-29  James Bowman  <james.bowman@ftdichip.com>
+
+       * interp.c (step_once): Correct length for MEMSET and MEMCPY
+       instructions.
+
 2015-09-29  James Bowman  <james.bowman@ftdichip.com>
 
        * interp.c (cpu_mem_write): Do no write PM when locked.

diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c
index c769ff7a3be8651f315a30a1e8b09422f8f0d557..f7daf1c1679893b59f2340eac831828cd7eb7808 100644 (file)
--- a/sim/ft32/interp.c
+++ b/sim/ft32/interp.c
@@ -602,7 +602,7 @@ step_once (SIM_DESC sd)
            uint32_t src = r_1v;
            uint32_t dst = cpu->state.regs[r_d];
            uint32_t i;
-           for (i = 0; i < rimmv; i++)
+           for (i = 0; i < (rimmv & 0x7fff); i++)
              PUT_BYTE (dst + i, GET_BYTE (src + i));
          }
          break;
@@ -621,7 +621,7 @@ step_once (SIM_DESC sd)
            /* memset instruction.  */
            uint32_t dst = cpu->state.regs[r_d];
            uint32_t i;
-           for (i = 0; i < rimmv; i++)
+           for (i = 0; i < (rimmv & 0x7fff); i++)
              PUT_BYTE (dst + i, r_1v);
          }
          break;