[NDS32] Add intrinsic function for ffb, ffmism and flmism.
authorMonk Chiang <sh.chiang04@gmail.com>
Sun, 11 Mar 2018 07:48:48 +0000 (07:48 +0000)
committerChung-Ju Wu <jasonwucj@gcc.gnu.org>
Sun, 11 Mar 2018 07:48:48 +0000 (07:48 +0000)
gcc/
* config/nds32/constants.md (unspec_element): Add UNSPEC_FFB,
UNSPEC_FFMISM and UNSPEC_FLMISM.
* config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description
for ffb, ffmism and flmism.
* config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern.
(unspec_ffmism): Ditto.
(unspec_flmism): Ditto.
(nds32_expand_builtin_impl): Check if string extension is available.
* config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB,
NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM.

Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
Co-Authored-By: Kito Cheng <kito.cheng@gmail.com>
From-SVN: r258424

gcc/ChangeLog
gcc/config/nds32/constants.md
gcc/config/nds32/nds32-intrinsic.c
gcc/config/nds32/nds32-intrinsic.md
gcc/config/nds32/nds32.h

index 3c84ccbe190df33718361b7ec527791560b631d3..0cdc24fdbc5ddfba0a6b8f59a8c434f9014a519b 100644 (file)
@@ -1,3 +1,18 @@
+2018-03-11  Monk Chiang  <sh.chiang04@gmail.com>
+           Kito Cheng  <kito.cheng@gmail.com>
+           Chung-Ju Wu  <jasonwucj@gmail.com>
+
+       * config/nds32/constants.md (unspec_element): Add UNSPEC_FFB,
+       UNSPEC_FFMISM and UNSPEC_FLMISM.
+       * config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description
+       for ffb, ffmism and flmism.
+       * config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern.
+       (unspec_ffmism): Ditto.
+       (unspec_flmism): Ditto.
+       (nds32_expand_builtin_impl): Check if string extension is available.
+       * config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB,
+       NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM.
+
 2018-03-10  Vladimir Makarov  <vmakarov@redhat.com>
 
        Reverting patch:
index 803534bb4ad8b8cf2af9ad1abe55b64d3f998215..482e39ecfbaca56a15efd9e8fffdaf71f4c711df 100644 (file)
@@ -32,6 +32,9 @@
 
 ;; The unpec operation index.
 (define_c_enum "unspec_element" [
+  UNSPEC_FFB
+  UNSPEC_FFMISM
+  UNSPEC_FLMISM
   UNSPEC_UALOAD_HW
   UNSPEC_UALOAD_W
   UNSPEC_UALOAD_DW
index bf51154c8ca10248f1c2517ed143240bb0a7603d..636b1d1139fe2f9546169fdae6dce83b321ae66e 100644 (file)
@@ -257,6 +257,9 @@ static struct builtin_description bdesc_1argimm[] =
 /* Intrinsics that take two arguments.  */
 static struct builtin_description bdesc_2arg[] =
 {
+  NDS32_BUILTIN(unspec_ffb, "ffb", FFB)
+  NDS32_BUILTIN(unspec_ffmism, "ffmsim", FFMISM)
+  NDS32_BUILTIN(unspec_flmism, "flmism", FLMISM)
   NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtsr, "mtsr", MTSR)
   NDS32_NO_TARGET_BUILTIN(unspec_volatile_mtusr, "mtusr", MTUSR)
   NDS32_NO_TARGET_BUILTIN(unaligned_store_hw, "unaligned_store_hw", UASTORE_HW)
@@ -277,6 +280,23 @@ nds32_expand_builtin_impl (tree exp,
   unsigned i;
   struct builtin_description *d;
 
+  switch (fcode)
+    {
+    /* String Extension  */
+    case NDS32_BUILTIN_FFB:
+    case NDS32_BUILTIN_FFMISM:
+    case NDS32_BUILTIN_FLMISM:
+      if (!TARGET_EXT_STRING)
+       {
+         error ("don't support string extension instructions");
+         return NULL_RTX;
+       }
+      break;
+
+    default:
+      break;
+    }
+
   /* Since there are no result and operands, we can simply emit this rtx.  */
   switch (fcode)
     {
index a4a32ceea95437266b6eb66e8d017b5d0a267dc1..5a07f89fa55bd02655276158a9b7766890bea035 100644 (file)
   [(set_attr "type" "misc")]
 )
 
+;; String Extension
+
+(define_insn "unspec_ffb"
+  [(set (match_operand:SI 0 "register_operand" "=r, r")
+       (unspec:SI [(match_operand:SI 1 "register_operand" "r, r")
+                   (match_operand:SI 2 "nonmemory_operand" "Iu08, r")] UNSPEC_FFB))]
+  ""
+  "@
+  ffbi\t%0, %1, %2
+  ffb\t%0, %1, %2"
+  [(set_attr "type" "alu")
+   (set_attr "length" "4")]
+)
+
+(define_insn "unspec_ffmism"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+       (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+                   (match_operand:SI 2 "register_operand" "r")] UNSPEC_FFMISM))]
+  ""
+  "ffmism\t%0, %1, %2"
+  [(set_attr "type" "alu")
+   (set_attr "length" "4")]
+)
+
+(define_insn "unspec_flmism"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+       (unspec:SI [(match_operand:SI 1 "register_operand" "r")
+                   (match_operand:SI 2 "register_operand" "r")] UNSPEC_FLMISM))]
+  ""
+  "flmism\t%0, %1, %2"
+  [(set_attr "type" "alu")
+   (set_attr "length" "4")]
+)
+
 ;;Unaligned Load/Store
 
 (define_expand "unaligned_load_hw"
index 6e67165ae11f7f3d99e1192821ca21344475d06b..1c812f77579fafbc7a2290fa6d4fc466c74624ca 100644 (file)
@@ -346,6 +346,9 @@ enum nds32_builtins
   NDS32_BUILTIN_MTUSR,
   NDS32_BUILTIN_SETGIE_EN,
   NDS32_BUILTIN_SETGIE_DIS,
+  NDS32_BUILTIN_FFB,
+  NDS32_BUILTIN_FFMISM,
+  NDS32_BUILTIN_FLMISM,
   NDS32_BUILTIN_UALOAD_HW,
   NDS32_BUILTIN_UALOAD_W,
   NDS32_BUILTIN_UALOAD_DW,