#include "arch/alpha/ev5.hh"
#include "arch/alpha/faults.hh"
#include "arch/alpha/tlb.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/base.hh"
#include "base/trace.hh"
+#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#if !FULL_SYSTEM
-#include "sim/process.hh"
#include "mem/page_table.hh"
+#include "sim/process.hh"
#endif
namespace AlphaISA {
#ifndef __ARCH_ALPHA_ISA_HH__
#define __ARCH_ALPHA_ISA_HH__
-#include <string.h>
-
-#include <string>
+#include <cstring>
#include <iostream>
+#include <string>
#include "arch/alpha/registers.hh"
#include "arch/alpha/types.hh"
//
output header {{
-#include <sstream>
-#include <iostream>
#include <iomanip>
+#include <iostream>
+#include <sstream>
#include "arch/alpha/faults.hh"
#include "arch/alpha/types.hh"
#include "config/ss_compatible_fp.hh"
#include "cpu/static_inst.hh"
-#include "mem/request.hh" // some constructors use MemReq flags
#include "mem/packet.hh"
+#include "mem/request.hh" // some constructors use MemReq flags
}};
output decoder {{
#include "arch/alpha/registers.hh"
#include "arch/alpha/regredir.hh"
+#include "base/loader/symtab.hh"
#include "base/cprintf.hh"
#include "base/fenv.hh"
-#include "base/loader/symtab.hh"
#include "config/ss_compatible_fp.hh"
#include "cpu/thread_context.hh" // for Jump::branchTarget()
#include "mem/packet.hh"
output exec {{
#include <math.h>
+#include "arch/alpha/registers.hh"
#include "arch/alpha/regredir.hh"
#include "base/cp_annotate.hh"
-#include "sim/pseudo_inst.hh"
-#include "arch/alpha/registers.hh"
#include "base/fenv.hh"
#include "config/ss_compatible_fp.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
+#include "sim/pseudo_inst.hh"
#include "sim/sim_exit.hh"
using namespace AlphaISA;
* up boot time.
*/
-#include "arch/vtophys.hh"
-#include "arch/alpha/idle_event.hh"
#include "arch/alpha/linux/system.hh"
#include "arch/alpha/linux/threadinfo.hh"
+#include "arch/alpha/idle_event.hh"
#include "arch/alpha/system.hh"
+#include "arch/vtophys.hh"
#include "base/loader/symtab.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "dev/platform.hh"
-#include "kern/linux/printk.hh"
#include "kern/linux/events.hh"
+#include "kern/linux/printk.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/arguments.hh"
* ISA-specific helper functions for multithreaded execution.
*/
+#include <iostream>
+
#include "arch/isa_traits.hh"
#include "base/bitfield.hh"
-#include "base/trace.hh"
#include "base/misc.hh"
-
-#include <iostream>
+#include "base/trace.hh"
using namespace std;
namespace AlphaISA
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/process.hh"
-#include "base/loader/object_file.hh"
#include "base/loader/elf_object.hh"
+#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
#endif
#include "arch/alpha/kgdb.h"
-#include "arch/alpha/utility.hh"
#include "arch/alpha/regredir.hh"
#include "arch/alpha/remote_gdb.hh"
+#include "arch/alpha/utility.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/system.hh"
#include <map>
-#include "arch/alpha/types.hh"
#include "arch/alpha/kgdb.h"
-#include "base/remote_gdb.hh"
-#include "cpu/pc_event.hh"
+#include "arch/alpha/types.hh"
#include "base/pollevent.hh"
+#include "base/remote_gdb.hh"
#include "base/socket.hh"
+#include "cpu/pc_event.hh"
class System;
class ThreadContext;
#include <string>
#include <vector>
+#include "arch/alpha/faults.hh"
#include "arch/alpha/pagetable.hh"
#include "arch/alpha/tlb.hh"
-#include "arch/alpha/faults.hh"
#include "base/inifile.hh"
#include "base/str.hh"
#include "base/trace.hh"
* Ali Saidi
*/
+#include "arch/alpha/tru64/process.hh"
#include "arch/alpha/tru64/tru64.hh"
#include "arch/alpha/isa_traits.hh"
-#include "arch/alpha/tru64/process.hh"
#include "cpu/thread_context.hh"
#include "kern/tru64/tru64.hh"
#include "sim/byteswap.hh"
#ifndef __ARCH_ALPHA_TYPES_HH__
#define __ARCH_ALPHA_TYPES_HH__
-#include "base/types.hh"
#include "arch/generic/types.hh"
+#include "base/types.hh"
namespace AlphaISA {
#ifndef __ARCH_ALPHA_UTILITY_HH__
#define __ARCH_ALPHA_UTILITY_HH__
-#include "arch/alpha/types.hh"
#include "arch/alpha/isa_traits.hh"
#include "arch/alpha/registers.hh"
+#include "arch/alpha/types.hh"
#include "base/misc.hh"
#include "config/full_system.hh"
#include "cpu/static_inst.hh"
*/
#include "arch/arm/faults.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/base.hh"
#include "base/trace.hh"
+#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
namespace ArmISA
{
#include "arch/arm/miscregs.hh"
#include "arch/arm/types.hh"
+#include "base/misc.hh"
#include "config/full_system.hh"
#include "sim/faults.hh"
-#include "base/misc.hh"
// The design of the "name" and "vect" functions is in sim/faults.hh
* Authors: Stephen Hines
*/
+#include <sstream>
+
#include "arch/arm/insts/macromem.hh"
#include "arch/arm/decoder.hh"
-#include <sstream>
using namespace std;
using namespace ArmISAInst;
* Authors: Stephen Hines
*/
-#include "arch/arm/faults.hh"
#include "arch/arm/insts/static_inst.hh"
+#include "arch/arm/faults.hh"
+#include "base/loader/symtab.hh"
#include "base/condcodes.hh"
#include "base/cprintf.hh"
-#include "base/loader/symtab.hh"
namespace ArmISA
{
#ifndef __ARCH_ARM_INSTS_VFP_HH__
#define __ARCH_ARM_INSTS_VFP_HH__
-#include "arch/arm/insts/misc.hh"
-#include "arch/arm/miscregs.hh"
#include <fenv.h>
+
#include <cmath>
+#include "arch/arm/insts/misc.hh"
+#include "arch/arm/miscregs.hh"
+
namespace ArmISA
{
* Authors: Gabe Black
*/
-#include <assert.h>
+#include <cassert>
#ifndef __ARCH_ARM_INTREGS_HH__
#define __ARCH_ARM_INTREGS_HH__
//
output header {{
-#include <sstream>
#include <iostream>
+#include <sstream>
#include "arch/arm/insts/branch.hh"
#include "arch/arm/insts/macromem.hh"
#include "arch/arm/intregs.hh"
#include "arch/arm/isa_traits.hh"
#include "arch/arm/utility.hh"
-#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "cpu/thread_context.hh"
using namespace ArmISA;
}};
output exec {{
+#include <cmath>
+
#include "arch/arm/faults.hh"
#include "arch/arm/isa_traits.hh"
#include "arch/arm/utility.hh"
#include "base/condcodes.hh"
#include "sim/pseudo_inst.hh"
-
-#include <cmath>
#if defined(linux)
#include <fenv.h>
#endif
#include <cstring>
#include <string>
+
#include "base/types.hh"
enum {
* Authors: Stephen Hines
*/
-#include "arch/arm/linux/linux.hh"
-
#include <fcntl.h>
+#include "arch/arm/linux/linux.hh"
+
// open(2) flags translation table
OpenFlagTransTable ArmLinux::openFlagTable[] = {
#ifdef _MSC_VER
#include "arch/arm/linux/linux.hh"
#include "arch/arm/linux/process.hh"
#include "arch/arm/isa_traits.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
-
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
#include "sim/system.hh"
#include "arch/arm/process.hh"
-
/// A process with emulated Arm/Linux syscalls.
class ArmLinuxProcess : public ArmLiveProcess
{
* Authors: Ali Saidi
*/
-#include "arch/arm/isa_traits.hh"
#include "arch/arm/linux/atag.hh"
#include "arch/arm/linux/system.hh"
+#include "arch/arm/isa_traits.hh"
#include "arch/arm/utility.hh"
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "arch/arm/miscregs.hh"
#include "mem/request.hh"
-
namespace ArmISA
{
template <class XC>
#include "arch/arm/utility.hh"
#include "arch/arm/vtophys.hh"
#include "config/full_system.hh"
-
#include "sim/serialize.hh"
namespace ArmISA {
#include <cassert>
-#include "arch/arm/types.hh"
#include "arch/arm/miscregs.hh"
+#include "arch/arm/types.hh"
#include "base/types.hh"
class ThreadContext;
#include <string>
#include <vector>
+
#include "base/loader/object_file.hh"
#include "sim/process.hh"
#ifndef __ARCH_ARM_REGISTERS_HH__
#define __ARCH_ARM_REGISTERS_HH__
-#include "arch/arm/max_inst_regs.hh"
#include "arch/arm/intregs.hh"
+#include "arch/arm/max_inst_regs.hh"
#include "arch/arm/miscregs.hh"
namespace ArmISA {
#include "arch/arm/vtophys.hh"
#endif
-#include "arch/arm/utility.hh"
-#include "arch/arm/remote_gdb.hh"
+#include "arch/arm/pagetable.hh"
#include "arch/arm/registers.hh"
+#include "arch/arm/remote_gdb.hh"
+#include "arch/arm/utility.hh"
#include "arch/arm/vtophys.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
+#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "cpu/thread_state.hh"
-#include "cpu/static_inst.hh"
+#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/system.hh"
-#include "arch/arm/pagetable.hh"
-#include "mem/page_table.hh"
using namespace std;
using namespace ArmISA;
* Authors: Ali Saidi
*/
-#include "arch/arm/system.hh"
#include <iostream>
+#include "arch/arm/system.hh"
+
using namespace std;
using namespace Linux;
#include <string>
#include <vector>
+#include "kern/linux/events.hh"
#include "params/ArmSystem.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"
-#include "kern/linux/events.hh"
class ArmSystem : public System
{
#include "arch/arm/faults.hh"
#include "arch/arm/table_walker.hh"
#include "arch/arm/tlb.hh"
-#include "dev/io_device.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
+#include "dev/io_device.hh"
#include "sim/system.hh"
using namespace ArmISA;
#include "arch/arm/tlb.hh"
#include "mem/mem_object.hh"
#include "mem/request.hh"
-#include "mem/request.hh"
#include "params/ArmTableWalker.hh"
#include "sim/eventq.hh"
#include "sim/fault_fwd.hh"
#include <map>
#include "arch/arm/isa_traits.hh"
+#include "arch/arm/pagetable.hh"
#include "arch/arm/utility.hh"
#include "arch/arm/vtophys.hh"
-#include "arch/arm/pagetable.hh"
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/ArmTLB.hh"
#include "arch/arm/isa_traits.hh"
#include "arch/arm/utility.hh"
-
class ThreadContext;
class FunctionalPort;
#ifndef __ARCH_GENERIC_DEBUGFAULTS_HH__
#define __ARCH_GENERIC_DEBUGFAULTS_HH__
+#include <string>
+
#include "base/misc.hh"
#include "sim/faults.hh"
-#include <string>
-
namespace GenericISA
{
class M5DebugFault : public FaultBase
#include <iostream>
-#include "base/types.hh"
#include "base/trace.hh"
+#include "base/types.hh"
#include "sim/serialize.hh"
namespace GenericISA
* Authors: Brett Miller
*/
-#include "arch/mips/isa_traits.hh"
#include "arch/mips/dsp.hh"
+#include "arch/mips/isa_traits.hh"
+#include "base/bitfield.hh"
+#include "base/misc.hh"
#include "config/full_system.hh"
#include "cpu/static_inst.hh"
#include "sim/serialize.hh"
-#include "base/bitfield.hh"
-#include "base/misc.hh"
using namespace MipsISA;
using namespace std;
#ifndef __ARCH_MIPS_DSP_HH__
#define __ARCH_MIPS_DSP_HH__
-#include "arch/mips/types.hh"
#include "arch/mips/isa_traits.hh"
+#include "arch/mips/types.hh"
#include "base/misc.hh"
#include "base/types.hh"
#include "config/full_system.hh"
*/
#include "arch/mips/isa.hh"
-#include "arch/mips/mt_constants.hh"
#include "arch/mips/mt.hh"
+#include "arch/mips/mt_constants.hh"
#include "arch/mips/pra_constants.hh"
#include "base/bitfield.hh"
#include "cpu/base.hh"
#ifndef __ARCH_MIPS_ISA_HH__
#define __ARCH_MIPS_ISA_HH__
-#include <string>
#include <queue>
+#include <string>
#include <vector>
#include "arch/mips/registers.hh"
//
output header {{
-#include <sstream>
-#include <iostream>
#include <iomanip>
+#include <iostream>
+#include <sstream>
#include "arch/mips/isa_traits.hh"
#include "arch/mips/types.hh"
}};
output decoder {{
-#include "arch/mips/isa_traits.hh"
-#include "base/cprintf.hh"
-#include "base/loader/symtab.hh"
-#include "cpu/thread_context.hh"
+#include <math.h>
+
+#include "arch/mips/dsp.hh"
+#include "arch/mips/dt_constants.hh"
#include "arch/mips/faults.hh"
#include "arch/mips/isa_traits.hh"
-#include "arch/mips/pra_constants.hh"
-#include "arch/mips/dt_constants.hh"
#include "arch/mips/mt_constants.hh"
+#include "arch/mips/pra_constants.hh"
#include "arch/mips/utility.hh"
-#include "arch/mips/dsp.hh"
+#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
+#include "cpu/thread_context.hh"
#include "mem/packet.hh"
-
-#include <math.h>
#if defined(linux)
#include <fenv.h>
#endif
}};
output exec {{
+#include <math.h>
+
+#include "arch/mips/dsp.hh"
+#include "arch/mips/dt_constants.hh"
#include "arch/mips/faults.hh"
#include "arch/mips/isa_traits.hh"
-#include "arch/mips/utility.hh"
-#include "arch/mips/dsp.hh"
#include "arch/mips/mt.hh"
-#include "arch/mips/pra_constants.hh"
-#include "arch/mips/dt_constants.hh"
#include "arch/mips/mt_constants.hh"
-
-#include <math.h>
+#include "arch/mips/pra_constants.hh"
+#include "arch/mips/utility.hh"
#if defined(linux)
#include <fenv.h>
#endif
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
-
#include "mem/packet.hh"
#include "mem/packet_access.hh"
-
-#include "sim/sim_exit.hh"
#include "sim/eventq.hh"
#include "sim/sim_events.hh"
+#include "sim/sim_exit.hh"
using namespace MipsISA;
}};
#ifndef __ARCH_MIPS_ISA_TRAITS_HH__
#define __ARCH_MIPS_ISA_TRAITS_HH__
-#include "arch/mips/types.hh"
#include "arch/mips/mips_core_specific.hh"
+#include "arch/mips/types.hh"
#include "base/types.hh"
#include "config/full_system.hh"
* Authors: Korey Sewell
*/
-#include "arch/mips/linux/linux.hh"
-
#include <fcntl.h>
+#include "arch/mips/linux/linux.hh"
+
// open(2) flags translation table
OpenFlagTransTable MipsLinux::openFlagTable[] = {
#ifdef _MSC_VER
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
+#include "sim/eventq.hh"
#include "sim/process.hh"
-#include "sim/system.hh"
#include "sim/syscall_emul.hh"
-#include "sim/eventq.hh"
+#include "sim/system.hh"
using namespace std;
using namespace MipsISA;
#ifndef __MIPS_LINUX_PROCESS_HH__
#define __MIPS_LINUX_PROCESS_HH__
-#include "arch/mips/process.hh"
#include "arch/mips/linux/linux.hh"
+#include "arch/mips/process.hh"
#include "sim/eventq.hh"
/// A process with emulated Mips/Linux syscalls.
* up boot time.
*/
-#include "arch/vtophys.hh"
-#include "arch/mips/idle_event.hh"
#include "arch/mips/linux/system.hh"
#include "arch/mips/linux/threadinfo.hh"
+#include "arch/mips/idle_event.hh"
#include "arch/mips/system.hh"
+#include "arch/vtophys.hh"
#include "base/loader/symtab.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "dev/platform.hh"
-#include "kern/linux/printk.hh"
#include "kern/linux/events.hh"
+#include "kern/linux/printk.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include "sim/arguments.hh"
* ISA-specific helper functions for multithreaded execution.
*/
+#include <iostream>
+
#include "arch/mips/faults.hh"
#include "arch/mips/isa_traits.hh"
#include "arch/mips/mt_constants.hh"
#include "arch/mips/pra_constants.hh"
#include "arch/mips/registers.hh"
#include "base/bitfield.hh"
-#include "base/trace.hh"
#include "base/misc.hh"
-
-#include <iostream>
+#include "base/trace.hh"
namespace MipsISA
{
#include "arch/mips/isa_traits.hh"
#include "arch/mips/process.hh"
-#include "base/loader/object_file.hh"
#include "base/loader/elf_object.hh"
+#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
#include <string>
#include <vector>
+
#include "sim/process.hh"
class LiveProcess;
#include "arch/mips/system.hh"
#include "arch/vtophys.hh"
-#include "base/loader/object_file.hh"
#include "base/loader/hex_file.hh"
+#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
#include "mem/physical.hh"
#include "params/MipsSystem.hh"
#include "sim/byteswap.hh"
-
using namespace LittleEndianGuest;
MipsSystem::MipsSystem(Params *p) : System(p)
#include <string>
#include <vector>
-#include "sim/system.hh"
-#include "base/loader/symtab.hh"
#include "base/loader/hex_file.hh"
+#include "base/loader/symtab.hh"
#include "cpu/pc_event.hh"
#include "kern/system_events.hh"
#include "params/MipsSystem.hh"
#include "sim/sim_object.hh"
+#include "sim/system.hh"
class MipsSystem : public System
{
#include <string>
#include <vector>
-#include "arch/mips/pra_constants.hh"
+#include "arch/mips/faults.hh"
#include "arch/mips/pagetable.hh"
+#include "arch/mips/pra_constants.hh"
#include "arch/mips/tlb.hh"
-#include "arch/mips/faults.hh"
#include "arch/mips/utility.hh"
#include "base/inifile.hh"
#include "base/str.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
-#include "sim/process.hh"
#include "mem/page_table.hh"
#include "params/MipsTLB.hh"
+#include "sim/process.hh"
using namespace std;
using namespace MipsISA;
#include <map>
#include "arch/mips/isa_traits.hh"
+#include "arch/mips/pagetable.hh"
#include "arch/mips/utility.hh"
#include "arch/mips/vtophys.hh"
-#include "arch/mips/pagetable.hh"
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/MipsTLB.hh"
#include "sim/fault_fwd.hh"
-#include "sim/tlb.hh"
#include "sim/sim_object.hh"
+#include "sim/tlb.hh"
class ThreadContext;
#include "arch/mips/isa_traits.hh"
#include "arch/mips/utility.hh"
+#include "base/bitfield.hh"
+#include "base/misc.hh"
#include "config/full_system.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "sim/serialize.hh"
-#include "base/bitfield.hh"
-#include "base/misc.hh"
#if FULL_SYSTEM
#include "arch/mips/registers.hh"
#ifndef __ARCH_MIPS_UTILITY_HH__
#define __ARCH_MIPS_UTILITY_HH__
-#include "config/full_system.hh"
-#include "arch/mips/types.hh"
#include "arch/mips/isa_traits.hh"
+#include "arch/mips/types.hh"
#include "base/misc.hh"
#include "base/types.hh"
#include "config/full_system.hh"
#include "arch/mips/isa_traits.hh"
#include "arch/mips/utility.hh"
-
class ThreadContext;
class FunctionalPort;
#define __ARCH_POWER_INSTS_FLOATING_HH__
#include "arch/power/insts/static_inst.hh"
-#include "base/cprintf.hh"
#include "base/bitfield.hh"
+#include "base/cprintf.hh"
namespace PowerISA
{
#define __ARCH_POWER_INSTS_INTEGER_HH__
#include "arch/power/insts/static_inst.hh"
-#include "base/cprintf.hh"
#include "base/bitfield.hh"
+#include "base/cprintf.hh"
namespace PowerISA
{
//
output header {{
-#include <sstream>
-#include <iostream>
#include <iomanip>
+#include <iostream>
+#include <sstream>
#include "arch/power/insts/branch.hh"
-#include "arch/power/insts/mem.hh"
-#include "arch/power/insts/integer.hh"
-#include "arch/power/insts/floating.hh"
#include "arch/power/insts/condition.hh"
+#include "arch/power/insts/floating.hh"
+#include "arch/power/insts/integer.hh"
+#include "arch/power/insts/mem.hh"
#include "arch/power/insts/misc.hh"
#include "arch/power/insts/static_inst.hh"
#include "arch/power/isa_traits.hh"
#include "arch/power/faults.hh"
#include "arch/power/isa_traits.hh"
#include "arch/power/utility.hh"
-#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "cpu/thread_context.hh"
using namespace PowerISA;
}};
output exec {{
+#include <cmath>
+
#include "arch/power/faults.hh"
#include "arch/power/isa_traits.hh"
#include "arch/power/utility.hh"
-
-#include <cmath>
#if defined(linux)
#include <fenv.h>
#endif
* Authors: Timothy M. Jones
*/
-#include "arch/power/linux/linux.hh"
-
#include <fcntl.h>
+#include "arch/power/linux/linux.hh"
+
// open(2) flags translation table
OpenFlagTransTable PowerLinux::openFlagTable[] = {
#ifdef _MSC_VER
#include "arch/power/linux/linux.hh"
#include "arch/power/linux/process.hh"
#include "arch/power/isa_traits.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
-
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
#include "sim/system.hh"
#include "arch/power/process.hh"
-
/// A process with emulated PPC/Linux syscalls.
class PowerLinuxProcess : public PowerLiveProcess
{
#include <string>
#include <vector>
+
#include "sim/process.hh"
class LiveProcess;
#include <map>
#include "arch/power/isa_traits.hh"
+#include "arch/power/pagetable.hh"
#include "arch/power/utility.hh"
#include "arch/power/vtophys.hh"
-#include "arch/power/pagetable.hh"
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/PowerTLB.hh"
#include "arch/power/isa_traits.hh"
#include "arch/power/utility.hh"
-
class ThreadContext;
class FunctionalPort;
#ifndef __ARCH_SPARC_ISA_HH__
#define __ARCH_SPARC_ISA_HH__
+#include <ostream>
+#include <string>
+
#include "arch/sparc/registers.hh"
#include "arch/sparc/types.hh"
#include "config/full_system.hh"
#include "cpu/cpuevent.hh"
-#include <string>
-#include <ostream>
-
class Checkpoint;
class EventManager;
class ThreadContext;
output header {{
#include <cstring>
-#include <sstream>
#include <iostream>
+#include <sstream>
#include "arch/sparc/faults.hh"
#include "arch/sparc/isa_traits.hh"
}};
output decoder {{
-#include "base/cprintf.hh"
+#include <algorithm>
+
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
+#include "base/fenv.hh"
#include "cpu/thread_context.hh" // for Jump::branchTarget()
#include "mem/packet.hh"
-#include "base/fenv.hh"
-#include <algorithm>
-
using namespace SparcISA;
}};
#include "sim/pseudo_inst.hh"
#endif
+#include <cmath>
#include <limits>
-#include <cmath>
#include "arch/sparc/asi.hh"
#include "base/bigint.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
-#include "sim/sim_exit.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
+#include "sim/sim_exit.hh"
using namespace SparcISA;
using namespace std;
#ifndef __ARCH_SPARC_ISA_TRAITS_HH__
#define __ARCH_SPARC_ISA_TRAITS_HH__
-#include "arch/sparc/types.hh"
#include "arch/sparc/sparc_traits.hh"
+#include "arch/sparc/types.hh"
#include "base/types.hh"
#include "config/full_system.hh"
* Authors: Gabe Black
*/
-#include "arch/sparc/linux/linux.hh"
#include <fcntl.h>
+#include "arch/sparc/linux/linux.hh"
+
// open(2) flags translation table
OpenFlagTransTable SparcLinux::openFlagTable[] = {
#ifdef _MSC_VER
* Ali Saidi
*/
-#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/linux/process.hh"
+#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
-
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
#include "mem/request.hh"
-
namespace SparcISA
{
template <class XC>
* ISA-specific helper functions for memory mapped IPR accesses.
*/
+#include "arch/sparc/tlb.hh"
#include "config/full_system.hh"
#include "cpu/thread_context.hh"
#include "mem/packet.hh"
-#include "arch/sparc/tlb.hh"
-
namespace SparcISA
{
*/
#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/registers.hh"
#include "arch/sparc/nativetrace.hh"
+#include "arch/sparc/registers.hh"
#include "cpu/thread_context.hh"
#include "params/SparcNativeTrace.hh"
#include "sim/byteswap.hh"
#include "arch/sparc/asi.hh"
#include "arch/sparc/handlers.hh"
#include "arch/sparc/isa_traits.hh"
-#include "arch/sparc/registers.hh"
#include "arch/sparc/process.hh"
+#include "arch/sparc/registers.hh"
#include "arch/sparc/types.hh"
-#include "base/loader/object_file.hh"
#include "base/loader/elf_object.hh"
+#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
-#include "sim/process_impl.hh"
#include "mem/translating_port.hh"
+#include "sim/process_impl.hh"
#include "sim/system.hh"
using namespace std;
#include <string>
#include <vector>
+
#include "sim/byteswap.hh"
#include "sim/process.hh"
*/
#include <sys/signal.h>
+#include <unistd.h>
#include <string>
-#include <unistd.h>
-#include "arch/vtophys.hh"
#include "arch/sparc/remote_gdb.hh"
+#include "arch/vtophys.hh"
#include "base/intmath.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
#include "config/full_system.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/port.hh"
#include <map>
#include "arch/sparc/types.hh"
+#include "base/pollevent.hh"
#include "base/remote_gdb.hh"
#include "cpu/pc_event.hh"
-#include "base/pollevent.hh"
class System;
class ThreadContext;
* Authors: Ali Saidi
*/
-#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/solaris/process.hh"
+#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/solaris/solaris.hh"
-
#include "sim/process.hh"
#include "sim/syscall_emul.hh"
* Authors: Ali Saidi
*/
-#include "arch/sparc/solaris/solaris.hh"
-
#include <fcntl.h>
+#include "arch/sparc/solaris/solaris.hh"
+
// open(2) flags translation table
OpenFlagTransTable SparcSolaris::openFlagTable[] = {
#ifdef _MSC_VER
#include "params/SparcSystem.hh"
#include "sim/byteswap.hh"
-
using namespace BigEndianGuest;
SparcSystem::SparcSystem(Params *p)
#include "arch/sparc/tlb.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/system.hh"
#ifndef __ARCH_SPARC_TLB_MAP_HH__
#define __ARCH_SPARC_TLB_MAP_HH__
-#include "arch/sparc/pagetable.hh"
#include <map>
+#include "arch/sparc/pagetable.hh"
+
namespace SparcISA
{
#ifndef __ARCH_SPARC_TYPES_HH__
#define __ARCH_SPARC_TYPES_HH__
+#include "arch/generic/types.hh"
#include "base/bigint.hh"
#include "base/types.hh"
-#include "arch/generic/types.hh"
namespace SparcISA
{
#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/registers.hh"
#include "arch/sparc/tlb.hh"
-#include "base/misc.hh"
#include "base/bitfield.hh"
+#include "base/misc.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "sim/fault_fwd.hh"
#include <string>
-#include "arch/sparc/vtophys.hh"
#include "arch/sparc/tlb.hh"
-#include "base/compiler.hh"
+#include "arch/sparc/vtophys.hh"
#include "base/chunk_generator.hh"
+#include "base/compiler.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "mem/vport.hh"
#include "arch/x86/bios/acpi.hh"
#include "mem/port.hh"
-#include "sim/byteswap.hh"
-#include "sim/sim_object.hh"
-
#include "params/X86ACPIRSDP.hh"
-
-#include "params/X86ACPISysDescTable.hh"
#include "params/X86ACPIRSDT.hh"
+#include "params/X86ACPISysDescTable.hh"
#include "params/X86ACPIXSDT.hh"
+#include "sim/byteswap.hh"
+#include "sim/sim_object.hh"
using namespace std;
#include <vector>
#include "base/bitfield.hh"
-#include "sim/sim_object.hh"
-
#include "enums/X86IntelMPAddressType.hh"
#include "enums/X86IntelMPInterruptType.hh"
#include "enums/X86IntelMPPolarity.hh"
#include "enums/X86IntelMPRangeList.hh"
#include "enums/X86IntelMPTriggerMode.hh"
+#include "sim/sim_object.hh"
class FunctionalPort;
#ifndef __ARCH_X86_EMULENV_HH__
#define __ARCH_X86_EMULENV_HH__
-#include "arch/x86/registers.hh"
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/segment.hh"
+#include "arch/x86/registers.hh"
#include "arch/x86/types.hh"
namespace X86ISA
#ifndef __ARCH_X86_FAULTS_HH__
#define __ARCH_X86_FAULTS_HH__
+#include <string>
+
#include "base/bitunion.hh"
#include "base/misc.hh"
#include "sim/faults.hh"
#include "sim/tlb.hh"
-#include <string>
-
namespace X86ISA
{
// Base class for all x86 "faults" where faults is in the m5 sense
*/
#include "arch/x86/insts/badmicroop.hh"
-#include "arch/x86/isa_traits.hh"
#include "arch/x86/decoder.hh"
+#include "arch/x86/isa_traits.hh"
namespace X86ISA
{
#ifndef __ARCH_X86_INSTS_MACROOP_HH__
#define __ARCH_X86_INSTS_MACROOP_HH__
-#include "arch/x86/emulenv.hh"
#include "arch/x86/insts/badmicroop.hh"
-#include "arch/x86/types.hh"
#include "arch/x86/insts/static_inst.hh"
+#include "arch/x86/emulenv.hh"
+#include "arch/x86/types.hh"
namespace X86ISA
{
* Authors: Gabe Black
*/
+#include <string>
+
#include "arch/x86/insts/microfpop.hh"
#include "arch/x86/regs/misc.hh"
-#include <string>
namespace X86ISA
{
* Authors: Gabe Black
*/
-#include "arch/x86/insts/microldstop.hh"
#include <string>
+#include "arch/x86/insts/microldstop.hh"
+
namespace X86ISA
{
std::string LdStOp::generateDisassembly(Addr pc,
* Authors: Gabe Black
*/
+#include <string>
+
#include "arch/x86/insts/micromediaop.hh"
#include "arch/x86/regs/misc.hh"
-#include <string>
namespace X86ISA
{
* Authors: Gabe Black
*/
+#include "arch/x86/regs/apic.hh"
#include "arch/x86/interrupts.hh"
#include "arch/x86/intmessage.hh"
-#include "arch/x86/regs/apic.hh"
#include "cpu/base.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/pc.hh"
#ifndef __ARCH_X86_INTERRUPTS_HH__
#define __ARCH_X86_INTERRUPTS_HH__
+#include "arch/x86/regs/apic.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/intmessage.hh"
-#include "arch/x86/regs/apic.hh"
#include "base/bitfield.hh"
#include "cpu/thread_context.hh"
-#include "dev/io_device.hh"
#include "dev/x86/intdev.hh"
+#include "dev/io_device.hh"
#include "params/X86LocalApic.hh"
#include "sim/eventq.hh"
#ifndef __ARCH_X86_ISA_HH__
#define __ARCH_X86_ISA_HH__
-#include "arch/x86/registers.hh"
+#include <iostream>
+#include <string>
+
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/misc.hh"
+#include "arch/x86/registers.hh"
#include "base/types.hh"
-#include <string>
-#include <iostream>
-
class Checkpoint;
class EventManager;
class ThreadContext;
output header {{
#include <cstring>
-#include <sstream>
#include <iostream>
+#include <sstream>
#include "arch/generic/debugfaults.hh"
-#include "arch/x86/emulenv.hh"
#include "arch/x86/insts/macroop.hh"
#include "arch/x86/insts/microfpop.hh"
#include "arch/x86/insts/microldstop.hh"
#include "arch/x86/insts/micromediaop.hh"
#include "arch/x86/insts/microregop.hh"
#include "arch/x86/insts/static_inst.hh"
+#include "arch/x86/emulenv.hh"
#include "arch/x86/isa_traits.hh"
#include "arch/x86/registers.hh"
#include "arch/x86/types.hh"
}};
output decoder {{
-#include "arch/x86/faults.hh"
-#include "arch/x86/microcode_rom.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/misc.hh"
#include "arch/x86/regs/segment.hh"
+#include "arch/x86/faults.hh"
+#include "arch/x86/microcode_rom.hh"
#include "arch/x86/tlb.hh"
-#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "base/misc.hh"
#include "cpu/thread_context.hh" // for Jump::branchTarget()
#include "mem/packet.hh"
#include "sim/pseudo_inst.hh"
#endif
+#include <cmath>
#include <limits>
-#include <cmath>
+#include "arch/x86/regs/misc.hh"
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
-#include "arch/x86/regs/misc.hh"
#include "arch/x86/tlb.hh"
#include "base/bigint.hh"
#include "base/compiler.hh"
#include "base/condcodes.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
-#include "sim/sim_exit.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/pseudo_inst.hh"
+#include "sim/sim_exit.hh"
using namespace X86ISA;
using namespace std;
* Authors: Gabe Black
*/
-#include "arch/x86/linux/linux.hh"
#include <fcntl.h>
+#include "arch/x86/linux/linux.hh"
+
// open(2) flags translation table
OpenFlagTransTable X86Linux64::openFlagTable[] = {
#ifdef _MSC_VER
* Authors: Gabe Black
*/
-#include "arch/x86/isa_traits.hh"
#include "arch/x86/linux/process.hh"
+#include "arch/x86/isa_traits.hh"
#include "arch/x86/registers.hh"
-
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/linux.hh"
-
#include "sim/process.hh"
using namespace std;
#ifndef __X86_LINUX_PROCESS_HH__
#define __X86_LINUX_PROCESS_HH__
-#include "sim/process.hh"
#include "arch/x86/linux/linux.hh"
#include "arch/x86/process.hh"
+#include "sim/process.hh"
namespace X86ISA {
* Authors: Gabe Black
*/
-#include "arch/x86/linux/process.hh"
#include "arch/x86/linux/linux.hh"
+#include "arch/x86/linux/process.hh"
#include "arch/x86/regs/misc.hh"
#include "kern/linux/linux.hh"
#include "sim/syscall_emul.hh"
* Authors: Gabe Black
*/
-#include "arch/x86/isa_traits.hh"
#include "arch/x86/linux/system.hh"
#include "arch/x86/regs/int.hh"
+#include "arch/x86/isa_traits.hh"
#include "arch/vtophys.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "params/LinuxX86System.hh"
#include "sim/byteswap.hh"
-
using namespace LittleEndianGuest;
using namespace X86ISA;
#include <string>
#include <vector>
-#include "params/LinuxX86System.hh"
#include "arch/x86/bios/e820.hh"
#include "arch/x86/system.hh"
+#include "params/LinuxX86System.hh"
class LinuxX86System : public X86System
{
#ifndef __ARCH_X86_MICROCODE_ROM_HH__
#define __ARCH_X86_MICROCODE_ROM_HH__
-#include "arch/x86/emulenv.hh"
#include "arch/x86/insts/badmicroop.hh"
+#include "arch/x86/emulenv.hh"
#include "cpu/static_inst.hh"
namespace X86ISAInst
* Authors: Gabe Black
*/
-#include "arch/x86/isa_traits.hh"
-#include "arch/x86/nativetrace.hh"
#include "arch/x86/regs/float.hh"
#include "arch/x86/regs/int.hh"
+#include "arch/x86/isa_traits.hh"
+#include "arch/x86/nativetrace.hh"
#include "cpu/thread_context.hh"
#include "params/X86NativeTrace.hh"
#include "sim/byteswap.hh"
#include "arch/x86/tlb.hh"
#include "arch/x86/vtophys.hh"
#include "base/bitfield.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#include "sim/system.hh"
#include "arch/x86/pagetable.hh"
#include "arch/x86/tlb.hh"
-#include "base/types.hh"
#include "base/fast_alloc.hh"
+#include "base/types.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "params/X86PagetableWalker.hh"
#include <cassert>
-#include "arch/x86/types.hh"
#include "arch/x86/regs/misc.hh"
+#include "arch/x86/types.hh"
#include "base/bitfield.hh"
#include "base/misc.hh"
#include "base/trace.hh"
* Ali Saidi
*/
-#include "arch/x86/isa_traits.hh"
-#include "arch/x86/process.hh"
#include "arch/x86/regs/misc.hh"
#include "arch/x86/regs/segment.hh"
+#include "arch/x86/isa_traits.hh"
+#include "arch/x86/process.hh"
#include "arch/x86/types.hh"
-#include "base/loader/object_file.hh"
#include "base/loader/elf_object.hh"
+#include "base/loader/object_file.hh"
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include <string>
#include <vector>
+
#include "sim/process.hh"
class SyscallDesc;
#ifndef __ARCH_X86_REGISTERS_HH__
#define __ARCH_X86_REGISTERS_HH__
-#include "arch/x86/max_inst_regs.hh"
#include "arch/x86/regs/int.hh"
#include "arch/x86/regs/misc.hh"
+#include "arch/x86/max_inst_regs.hh"
#include "arch/x86/x86_traits.hh"
namespace X86ISA
*/
#include <sys/signal.h>
+#include <unistd.h>
#include <string>
-#include <unistd.h>
-#include "arch/vtophys.hh"
#include "arch/x86/remote_gdb.hh"
+#include "arch/vtophys.hh"
#include "base/remote_gdb.hh"
#include "base/socket.hh"
#include "base/trace.hh"
* Authors: Gabe Black
*/
-#include "arch/x86/bios/smbios.hh"
#include "arch/x86/bios/intelmp.hh"
-#include "arch/x86/isa_traits.hh"
+#include "arch/x86/bios/smbios.hh"
#include "arch/x86/regs/misc.hh"
+#include "arch/x86/isa_traits.hh"
#include "arch/x86/system.hh"
#include "arch/vtophys.hh"
-#include "base/intmath.hh"
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
+#include "base/intmath.hh"
#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "mem/physical.hh"
#include "params/X86System.hh"
#include "sim/byteswap.hh"
-
using namespace LittleEndianGuest;
using namespace X86ISA;
#include <cstring>
-#include "config/full_system.hh"
-
-#include "arch/x86/faults.hh"
#include "arch/x86/insts/microldstop.hh"
-#include "arch/x86/pagetable.hh"
#include "arch/x86/regs/misc.hh"
+#include "arch/x86/faults.hh"
+#include "arch/x86/pagetable.hh"
#include "arch/x86/tlb.hh"
#include "arch/x86/x86_traits.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "config/full_system.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "mem/packet_access.hh"
#include "mem/request.hh"
#define __ARCH_X86_TLB_HH__
#include <list>
-#include <vector>
#include <string>
+#include <vector>
-#include "arch/x86/pagetable.hh"
#include "arch/x86/regs/segment.hh"
+#include "arch/x86/pagetable.hh"
#include "config/full_system.hh"
#include "mem/mem_object.hh"
#include "mem/request.hh"
#include "params/X86TLB.hh"
#include "sim/fault_fwd.hh"
-#include "sim/tlb.hh"
#include "sim/sim_object.hh"
+#include "sim/tlb.hh"
class ThreadContext;
class Packet;
* Authors: Ali Saidi
*/
-#include "arch/utility.hh"
#include "arch/alpha/linux/threadinfo.hh"
-#include "base/cp_annotate.hh"
-#include "base/callback.hh"
+#include "arch/utility.hh"
#include "base/loader/object_file.hh"
+#include "base/callback.hh"
+#include "base/cp_annotate.hh"
#include "base/output.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
#ifndef __BASE__CP_ANNOTATE_HH__
#define __BASE__CP_ANNOTATE_HH__
-#include <string>
#include <list>
-#include <vector>
#include <map>
+#include <string>
+#include <vector>
-#include "base/hashmap.hh"
#include "base/loader/symtab.hh"
+#include "base/hashmap.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "config/cp_annotate.hh"
#include <list>
#include <string>
-#include "base/varargs.hh"
#include "base/cprintf_formats.hh"
+#include "base/varargs.hh"
namespace cp {
*/
#include <sys/types.h>
-#include <signal.h>
#include <unistd.h>
+#include <csignal>
+
#include "base/cprintf.hh"
void
// collapse the destructor call chain back up the inheritance
// hierarchy.
-#include "config/no_fast_alloc.hh"
-#include "config/force_fast_alloc.hh"
#include "config/fast_alloc_stats.hh"
+#include "config/force_fast_alloc.hh"
+#include "config/no_fast_alloc.hh"
// By default, we want to enable FastAlloc in any build other than
// m5.debug. (FastAlloc's reuse policies can mask allocation bugs, so
*/
#include <assert.h>
-#include <stdlib.h>
#include <fenv.h>
+#include <stdlib.h>
void m5_fesetround(int rm);
int m5_fegetround();
* Authors: Nathan Binkert
*/
-#include <ctype.h>
-#include <errno.h>
-#include <math.h>
#include <unistd.h>
-#include <stdio.h>
+#include <cctype>
+#include <cerrno>
+#include <cmath>
+#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <string>
#include "base/range.hh"
#include "base/types.hh"
#include "dev/etherpkt.hh"
-
#include "dnet/os.h"
#include "dnet/eth.h"
#include "dnet/ip.h"
#include <fstream>
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "base/inifile.hh"
#include "base/str.hh"
#include <string>
#include "base/loader/aout_object.hh"
+#include "base/loader/exec_aout.h"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
-#include "base/loader/exec_aout.h"
using namespace std;
#include <cassert>
#include <string>
-#include "gelf.h"
-
-#include "base/bitfield.hh"
#include "base/loader/elf_object.hh"
#include "base/loader/symtab.hh"
+#include "base/bitfield.hh"
#include "base/misc.hh"
#include "base/trace.hh"
#include "sim/byteswap.hh"
+#include "gelf.h"
using namespace std;
#ifndef __ELF_OBJECT_HH__
#define __ELF_OBJECT_HH__
-#include "base/loader/object_file.hh"
#include <set>
#include <vector>
+#include "base/loader/object_file.hh"
+
class ElfObject : public ObjectFile
{
protected:
#include <list>
#include <string>
-#include "base/cprintf.hh"
#include "base/loader/hex_file.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "mem/translating_port.hh"
using namespace std;
* Steve Reinhardt
*/
-#include <list>
-#include <string>
-
-#include <sys/types.h>
#include <sys/mman.h>
+#include <sys/types.h>
#include <fcntl.h>
-#include <stdio.h>
#include <unistd.h>
-#include "base/cprintf.hh"
-#include "base/loader/object_file.hh"
-#include "base/loader/symtab.hh"
+#include <cstdio>
+#include <list>
+#include <string>
-#include "base/loader/ecoff_object.hh"
#include "base/loader/aout_object.hh"
+#include "base/loader/ecoff_object.hh"
#include "base/loader/elf_object.hh"
+#include "base/loader/object_file.hh"
#include "base/loader/raw_object.hh"
-
+#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "mem/translating_port.hh"
using namespace std;
* Authors: Nathan Binkert
*/
-#include <iostream>
#include <fstream>
+#include <iostream>
#include <string>
#include <vector>
* Authors: Nathan Binkert
*/
+#include <zlib.h>
+
#include <cstdlib>
#include <iostream>
#include <string>
-#include <zlib.h>
#include "base/cprintf.hh"
#include "base/hostinfo.hh"
#define TO_BE_INCLUDED_LATER 0
+#include <mysql.h>
+#include <mysql_version.h>
+
#include <cassert>
#include <iosfwd>
-#include <mysql_version.h>
-#include <mysql.h>
-#include <string>
#include <sstream>
+#include <string>
namespace MySQL {
* Authors: Nathan Binkert
*/
-#include <errno.h>
-#include <limits.h>
-#include <stdlib.h>
#include <sys/stat.h>
#include <sys/types.h>
+#include <cerrno>
+#include <climits>
+#include <cstdlib>
#include <fstream>
#include <gzstream.hh>
#endif
#include <fcntl.h>
-#include <signal.h>
#include <unistd.h>
+#include <csignal>
+
#include "base/misc.hh"
#include "base/pollevent.hh"
#include "base/types.hh"
#ifndef __POLLEVENT_H__
#define __POLLEVENT_H__
-#include <vector>
#include <poll.h>
+
+#include <vector>
+
#include "sim/core.hh"
class Checkpoint;
#ifndef __BASE_RANGE_MAP_HH__
#define __BASE_RANGE_MAP_HH__
-#include "base/range.hh"
-
#include <map>
+#include "base/range.hh"
+
template <class T,class V>
class range_map
{
*/
#include <sys/signal.h>
+#include <unistd.h>
#include <cstdio>
#include <string>
-#include <unistd.h>
#include "config/full_system.hh"
#include "base/socket.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
#include "sim/system.hh"
#ifndef __REMOTE_GDB_HH__
#define __REMOTE_GDB_HH__
-#include <map>
#include <sys/signal.h>
+#include <map>
+
#include "arch/types.hh"
-#include "cpu/pc_event.hh"
#include "base/pollevent.hh"
#include "base/socket.hh"
+#include "cpu/pc_event.hh"
class System;
class ThreadContext;
* Authors: Nathan Binkert
*/
-#include <sys/types.h>
-#include <sys/socket.h>
-
#include <netinet/in.h>
#include <netinet/tcp.h>
-
-#include <errno.h>
+#include <sys/socket.h>
+#include <sys/types.h>
#include <unistd.h>
-#include "base/types.hh"
+#include <cerrno>
+
#include "base/misc.hh"
#include "base/socket.hh"
+#include "base/types.hh"
using namespace std;
* Authors: Nathan Binkert
*/
-#include <iomanip>
#include <fstream>
+#include <iomanip>
#include <list>
#include <map>
#include <string>
#include <algorithm>
#include <cassert>
#ifdef __SUNPRO_CC
-#include <math.h>
+#include <cmath>
#endif
#include <cmath>
#include <functional>
#include <string>
#include <vector>
+#include "base/stats/info.hh"
+#include "base/stats/types.hh"
+#include "base/stats/visit.hh"
#include "base/cast.hh"
#include "base/cprintf.hh"
#include "base/intmath.hh"
#include "base/refcnt.hh"
-#include "base/stats/info.hh"
-#include "base/stats/types.hh"
-#include "base/stats/visit.hh"
#include "base/str.hh"
#include "base/types.hh"
#ifndef __BASE_STATS_INFO_HH__
#define __BASE_STATS_INFO_HH__
-#include "base/flags.hh"
#include "base/stats/types.hh"
+#include "base/flags.hh"
namespace Stats {
#include <string>
#include <vector>
-#include "base/misc.hh"
-#include "base/mysql.hh"
-#include "base/statistics.hh"
#include "base/stats/info.hh"
#include "base/stats/mysql.hh"
#include "base/stats/mysql_run.hh"
#include "base/stats/types.hh"
+#include "base/misc.hh"
+#include "base/mysql.hh"
+#include "base/statistics.hh"
#include "base/str.hh"
#include "base/types.hh"
#include "base/userinfo.hh"
#include <list>
-#include "base/statistics.hh"
#include "base/stats/output.hh"
+#include "base/statistics.hh"
#include "base/types.hh"
#include "sim/eventq.hh"
#endif
#if defined(__sun)
-#include <math.h>
+#include <cmath>
#endif
#include <cassert>
#ifdef __SUNPRO_CC
-#include <math.h>
+#include <cmath>
#endif
#include <cmath>
+#include <fstream>
#include <iostream>
#include <sstream>
-#include <fstream>
#include <string>
-#include "base/cast.hh"
-#include "base/misc.hh"
-#include "base/str.hh"
#include "base/stats/info.hh"
#include "base/stats/text.hh"
#include "base/stats/visit.hh"
+#include "base/cast.hh"
+#include "base/misc.hh"
+#include "base/str.hh"
using namespace std;
#include <iosfwd>
#include <string>
-#include "base/output.hh"
#include "base/stats/output.hh"
+#include "base/output.hh"
namespace Stats {
#ifndef __STR_HH__
#define __STR_HH__
+#include <cctype>
#include <sstream>
#include <string>
#include <vector>
-#include <ctype.h>
-
template<class> class Hash;
template<>
class Hash<std::string> {
#define __BASE_TIME_HH__
#include <sys/time.h>
-
#include <inttypes.h>
#include <cmath>
* Steve Reinhardt
*/
-#include <ctype.h>
+#include <cctype>
#include <fstream>
#include <iostream>
#include <list>
#include <cassert>
-#include "base/misc.hh"
#include "base/vnc/convert.hh"
+#include "base/misc.hh"
/** @file
* This file provides conversion functions for a variety of video modes
* Implementiation of a VNC server
*/
-#include <cstdio>
-
#include <sys/ioctl.h>
#include <sys/termios.h>
-#include <errno.h>
#include <poll.h>
#include <unistd.h>
+#include <cerrno>
+#include <cstdio>
+
+#include "base/vnc/vncserver.hh"
#include "base/atomicio.hh"
#include "base/misc.hh"
#include "base/socket.hh"
#include "base/trace.hh"
-#include "base/vnc/vncserver.hh"
#include "sim/byteswap.hh"
using namespace std;
#include <iostream>
+#include "base/vnc/convert.hh"
#include "base/circlebuf.hh"
#include "base/pollevent.hh"
#include "base/socket.hh"
-#include "base/vnc/convert.hh"
#include "cpu/intr_control.hh"
-#include "sim/sim_object.hh"
#include "params/VncServer.hh"
+#include "sim/sim_object.hh"
/**
* A device that expects to receive input from the vnc server should derrive
#include <string>
-#include "cpu/timebuf.hh"
#include "cpu/activity.hh"
+#include "cpu/timebuf.hh"
using namespace std;
#ifndef __CPU_ACTIVITY_HH__
#define __CPU_ACTIVITY_HH__
-#include "cpu/timebuf.hh"
#include "base/trace.hh"
+#include "cpu/timebuf.hh"
/**
* ActivityRecorder helper class that informs the CPU if it can switch
*/
#include <iostream>
-#include <string>
#include <sstream>
+#include <string>
#include "arch/tlb.hh"
-#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "base/misc.hh"
#include "base/output.hh"
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/cpuevent.hh"
-#include "cpu/thread_context.hh"
#include "cpu/profile.hh"
+#include "cpu/thread_context.hh"
#include "params/BaseCPU.hh"
-#include "sim/sim_exit.hh"
#include "sim/process.hh"
#include "sim/sim_events.hh"
+#include "sim/sim_exit.hh"
#include "sim/system.hh"
// Hack
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
+#include "mem/mem_object.hh"
#include "sim/eventq.hh"
#include "sim/insttracer.hh"
-#include "mem/mem_object.hh"
#if FULL_SYSTEM
#include "arch/interrupts.hh"
#include <iostream>
#include <set>
-#include <string>
#include <sstream>
+#include <string>
#include "base/cprintf.hh"
#include "base/trace.hh"
#include <list>
#include <string>
-#include "cpu/base.hh"
#include "cpu/checker/cpu.hh"
+#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#define __CPU_CHECKER_CPU_HH__
#include <list>
-#include <queue>
#include <map>
+#include <queue>
#include "arch/types.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "cpu/base.hh"
#include "cpu/base_dyn_inst.hh"
-#include "cpu/simple_thread.hh"
#include "cpu/pc_event.hh"
+#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "sim/eventq.hh"
#include "base/refcnt.hh"
#include "config/the_isa.hh"
-#include "cpu/base_dyn_inst.hh"
#include "cpu/checker/cpu.hh"
+#include "cpu/base_dyn_inst.hh"
#include "cpu/simple_thread.hh"
-#include "cpu/thread_context.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
#define __CPU_CPUEVENT_HH__
#include <vector>
+
#include "sim/eventq.hh"
class ThreadContext;
#include "arch/isa_traits.hh"
#include "arch/utility.hh"
#include "base/loader/symtab.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
-#include "config/the_isa.hh"
#include "enums/OpClass.hh"
using namespace std;
#include <vector>
#include "cpu/op_class.hh"
-#include "params/OpDesc.hh"
#include "params/FUDesc.hh"
+#include "params/OpDesc.hh"
#include "sim/sim_object.hh"
////////////////////////////////////////////////////////////////////////////
#include "arch/utility.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "cpu/activity.hh"
-#include "cpu/base.hh"
-#include "cpu/exetrace.hh"
+#include "cpu/inorder/resources/resource_list.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/first_stage.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
-#include "cpu/inorder/resources/resource_list.hh"
#include "cpu/inorder/thread_context.hh"
#include "cpu/inorder/thread_state.hh"
+#include "cpu/activity.hh"
+#include "cpu/base.hh"
+#include "cpu/exetrace.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
#include "mem/translating_port.hh"
#include <vector>
#include "arch/isa_traits.hh"
-#include "arch/types.hh"
#include "arch/registers.hh"
+#include "arch/types.hh"
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "base/types.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "cpu/activity.hh"
-#include "cpu/base.hh"
-#include "cpu/simple_thread.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/pipeline_stage.hh"
-#include "cpu/inorder/thread_state.hh"
+#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/reg_dep_map.hh"
+#include "cpu/inorder/thread_state.hh"
#include "cpu/o3/dep_graph.hh"
#include "cpu/o3/rename_map.hh"
+#include "cpu/activity.hh"
+#include "cpu/base.hh"
+#include "cpu/simple_thread.hh"
+#include "cpu/timebuf.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
#include "mem/request.hh"
*/
#include "base/str.hh"
-#include "cpu/inorder/first_stage.hh"
#include "cpu/inorder/resources/resource_list.hh"
-#include "cpu/inorder/resource_pool.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/first_stage.hh"
+#include "cpu/inorder/resource_pool.hh"
#include "params/InOrderTrace.hh"
using namespace std;
#include <vector>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/comm.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/params.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/pipeline_stage.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/timebuf.hh"
class InOrderCPU;
#include <string>
-#include "cpu/base.hh"
-#include "cpu/inst_seq.hh"
-#include "cpu/static_inst.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/base.hh"
+#include "cpu/inst_seq.hh"
+#include "cpu/static_inst.hh"
#include "params/InOrderCPU.hh"
InOrderCPU *
#include <iostream>
#include <set>
-#include <string>
#include <sstream>
+#include <string>
#include "arch/faults.hh"
#include "base/cprintf.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/exetrace.hh"
#include "mem/request.hh"
using namespace std;
#include "base/types.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/inorder/inorder_trace.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource.hh"
#include "cpu/inorder/resource_sked.hh"
#include "cpu/inorder/thread_state.hh"
+#include "cpu/exetrace.hh"
#include "cpu/inst_seq.hh"
#include "cpu/op_class.hh"
#include "cpu/static_inst.hh"
#include <iomanip>
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/inorder/inorder_trace.hh"
-#include "cpu/static_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/exetrace.hh"
+#include "cpu/static_inst.hh"
#include "cpu/thread_context.hh"
#include "params/InOrderTrace.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/pipeline_stage.hh"
#include "cpu/inorder/resource_pool.hh"
-#include "cpu/inorder/cpu.hh"
using namespace std;
using namespace ThePipeline;
#include <vector>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/comm.hh"
-#include "params/InOrderCPU.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/timebuf.hh"
+#include "params/InOrderCPU.hh"
class InOrderCPU;
*
*/
-#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
#include "arch/isa_traits.hh"
#include "cpu/inorder/params.hh"
-
class InOrderDynInst;
/* This Namespace contains constants, typedefs, functions and
*
*/
-#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
#define __CPU_INORDER_PIPELINE_IMPL_HH__
#include <list>
+#include <map>
#include <queue>
#include <vector>
-#include <map>
#include "arch/isa_traits.hh"
#include "cpu/inorder/params.hh"
-
class InOrderDynInst;
/* This Namespace contains constants, typedefs, functions and
*
*/
-#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
#define __CPU_INORDER_PIPELINE_IMPL_HH__
#include <list>
+#include <map>
#include <queue>
#include <vector>
-#include <map>
#include "arch/isa_traits.hh"
#include "cpu/inorder/params.hh"
-
class InOrderDynInst;
/* This Namespace contains constants, typedefs, functions and
#include "arch/isa_traits.hh"
#include "cpu/base.hh"
-
#include "params/InOrderCPU.hh"
class InOrderDynInst;
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
+#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/reg_dep_map.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/cpu.hh"
using namespace std;
using namespace TheISA;
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "base/str.hh"
-#include "cpu/inorder/resource.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
using namespace std;
Resource::Resource(string res_name, int res_id, int res_width,
#ifndef __CPU_INORDER_RESOURCE_HH__
#define __CPU_INORDER_RESOURCE_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "base/types.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inst_seq.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
*
*/
-#include "cpu/inorder/resource_pool.hh"
-#include "cpu/inorder/resources/resource_list.hh"
-
-#include <vector>
#include <list>
+#include <vector>
+
+#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/resource_pool.hh"
using namespace std;
using namespace ThePipeline;
*
*/
-#include "cpu/inorder/resource_pool.hh"
-#include "cpu/inorder/resources/resource_list.hh"
-
-#include <vector>
#include <list>
+#include <vector>
+
+#include "cpu/inorder/resources/resource_list.hh"
+#include "cpu/inorder/resource_pool.hh"
using namespace std;
using namespace ThePipeline;
#ifndef __CPU_INORDER_RESOURCE_POOL_HH__
#define __CPU_INORDER_RESOURCE_POOL_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inst_seq.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/resource.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/params.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource.hh"
+#include "cpu/inst_seq.hh"
#include "params/InOrderCPU.hh"
-#include "cpu/inorder/cpu.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
*
*/
-#include "cpu/inorder/resource_sked.hh"
-#include "cpu/inorder/pipeline_traits.hh"
-
-#include <vector>
-#include <list>
#include <cstdio>
+#include <list>
+#include <vector>
+
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource_sked.hh"
using namespace std;
using namespace ThePipeline;
#ifndef __CPU_INORDER_RESOURCE_SKED_HH__
#define __CPU_INORDER_RESOURCE_SKED_HH__
-#include <vector>
-#include <list>
#include <cstdlib>
+#include <list>
+#include <vector>
/** ScheduleEntry class represents a single function that an instruction
wants to do at any pipeline stage. For example, if an instruction
#ifndef __CPU_INORDER_AGEN_UNIT_HH__
#define __CPU_INORDER_AGEN_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/params.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource.hh"
class AGENUnit : public Resource {
public:
#include "arch/isa_traits.hh"
#include "base/statistics.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource.hh"
#include "cpu/pred/btb.hh"
#include "cpu/pred/ras.hh"
#include "cpu/pred/tournament.hh"
+#include "cpu/inst_seq.hh"
#include "params/InOrderCPU.hh"
/**
#ifndef __CPU_INORDER_BRANCH_PREDICTOR_HH__
#define __CPU_INORDER_BRANCH_PREDICTOR_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
-#include "cpu/inorder/inorder_dyn_inst.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/bpred_unit.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/pipeline_traits.hh"
+#include "cpu/inorder/resource.hh"
class BranchPredictor : public Resource {
public:
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
-#include "arch/utility.hh"
#include "arch/predecoder.hh"
+#include "arch/utility.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/resources/cache_unit.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
#include "mem/request.hh"
#ifndef __CPU_INORDER_CACHE_UNIT_HH__
#define __CPU_INORDER_CACHE_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "arch/predecoder.hh"
#include "arch/tlb.hh"
#ifndef __CPU_INORDER_DECODE_UNIT_HH__
#define __CPU_INORDER_DECODE_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/reg_dep_map.hh"
+#include "cpu/inorder/resource.hh"
class DecodeUnit : public Resource {
public:
*
*/
-#include <vector>
#include <list>
+#include <vector>
+
#include "cpu/inorder/resources/execution_unit.hh"
-#include "cpu/inorder/resource_pool.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource_pool.hh"
using namespace std;
using namespace ThePipeline;
#ifndef __CPU_INORDER_EXECUTION_UNIT_HH__
#define __CPU_INORDER_EXECUTION_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/func_unit.hh"
#include "cpu/inorder/first_stage.hh"
-#include "cpu/inorder/resource.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/resource.hh"
+#include "cpu/func_unit.hh"
class ExecutionUnit : public Resource {
public:
#ifndef __CPU_INORDER_FETCH_SEQ_UNIT_HH__
#define __CPU_INORDER_FETCH_SEQ_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "config/the_isa.hh"
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
class FetchSeqUnit : public Resource {
public:
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "arch/isa_traits.hh"
#include "arch/locked_mem.hh"
-#include "arch/utility.hh"
#include "arch/predecoder.hh"
+#include "arch/utility.hh"
#include "config/the_isa.hh"
#include "cpu/inorder/resources/cache_unit.hh"
#include "cpu/inorder/resources/fetch_unit.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource_pool.hh"
#include "mem/request.hh"
#ifndef __CPU_INORDER_FETCH_UNIT_HH__
#define __CPU_INORDER_FETCH_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "arch/predecoder.hh"
#include "arch/tlb.hh"
#include "config/the_isa.hh"
+#include "cpu/inorder/resources/cache_unit.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resource.hh"
-#include "cpu/inorder/resources/cache_unit.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/port.hh"
#ifndef __CPU_INORDER_GRAD_UNIT_HH__
#define __CPU_INORDER_GRAD_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
class GraduationUnit : public Resource {
public:
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
using namespace TheISA;
#ifndef __CPU_INORDER_INST_BUFF_UNIT_HH__
#define __CPU_INORDER_INST_BUFF_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
class InstBuffer : public Resource {
public:
#ifndef __CPU_INORDER_MEM_DEP_UNIT_HH__
#define __CPU_INORDER_MEM_DEP_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/inorder/resource.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource.hh"
class MemDepUnit : public Resource {
public:
*
*/
-#include <vector>
#include <list>
+#include <vector>
+
#include "cpu/inorder/resources/mult_div_unit.hh"
-#include "cpu/inorder/resource_pool.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/resource_pool.hh"
#include "cpu/op_class.hh"
using namespace std;
#ifndef __CPU_INORDER_MULT_DIV_UNIT_HH__
#define __CPU_INORDER_MULT_DIV_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/func_unit.hh"
-#include "cpu/op_class.hh"
#include "cpu/inorder/first_stage.hh"
-#include "cpu/inorder/resource.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
+#include "cpu/inorder/resource.hh"
+#include "cpu/func_unit.hh"
+#include "cpu/op_class.hh"
class MDUEvent;
#ifndef CPU_INORDER_RESOURCE_LIST_HH
#define CPU_INORDER_RESOURCE_LIST_HH
+#include "cpu/inorder/resources/agen_unit.hh"
+#include "cpu/inorder/resources/branch_predictor.hh"
#include "cpu/inorder/resources/cache_unit.hh"
-#include "cpu/inorder/resources/fetch_unit.hh"
-#include "cpu/inorder/resources/execution_unit.hh"
-#include "cpu/inorder/resources/use_def.hh"
-#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/resources/decode_unit.hh"
-#include "cpu/inorder/resources/graduation_unit.hh"
-#include "cpu/inorder/resources/tlb_unit.hh"
+#include "cpu/inorder/resources/execution_unit.hh"
#include "cpu/inorder/resources/fetch_seq_unit.hh"
-#include "cpu/inorder/resources/branch_predictor.hh"
-#include "cpu/inorder/resources/agen_unit.hh"
+#include "cpu/inorder/resources/fetch_unit.hh"
+#include "cpu/inorder/resources/graduation_unit.hh"
+#include "cpu/inorder/resources/inst_buffer.hh"
#include "cpu/inorder/resources/mult_div_unit.hh"
+#include "cpu/inorder/resources/tlb_unit.hh"
+#include "cpu/inorder/resources/use_def.hh"
#endif
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/first_stage.hh"
#include "cpu/inorder/resources/tlb_unit.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/first_stage.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
using namespace TheISA;
#ifndef __CPU_INORDER_TLB_UNIT_HH__
#define __CPU_INORDER_TLB_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
#include "config/the_isa.hh"
#include "cpu/inorder/resources/inst_buffer.hh"
+#include "cpu/inorder/cpu.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
-#include "cpu/inorder/cpu.hh"
class TLBUnit : public Resource
{
*
*/
-#include <vector>
#include <list>
+#include <vector>
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/resources/use_def.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/pipeline_traits.hh"
using namespace std;
using namespace TheISA;
#ifndef __CPU_INORDER_USE_DEF_UNIT_HH__
#define __CPU_INORDER_USE_DEF_UNIT_HH__
-#include <vector>
#include <list>
#include <string>
+#include <vector>
-#include "cpu/func_unit.hh"
#include "cpu/inorder/first_stage.hh"
-#include "cpu/inorder/resource.hh"
#include "cpu/inorder/inorder_dyn_inst.hh"
#include "cpu/inorder/pipeline_traits.hh"
#include "cpu/inorder/reg_dep_map.hh"
+#include "cpu/inorder/resource.hh"
+#include "cpu/func_unit.hh"
class UseDefUnit : public Resource {
public:
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/inorder/thread_context.hh"
+#include "cpu/exetrace.hh"
using namespace TheISA;
#define __CPU_INORDER_THREAD_CONTEXT_HH__
#include "config/the_isa.hh"
+#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/thread_state.hh"
#include "cpu/exetrace.hh"
#include "cpu/thread_context.hh"
-#include "cpu/inorder/thread_state.hh"
-#include "cpu/inorder/cpu.hh"
class TranslatingPort;
*/
#include "arch/isa_traits.hh"
-#include "cpu/exetrace.hh"
-#include "cpu/inorder/thread_state.hh"
#include "cpu/inorder/cpu.hh"
+#include "cpu/inorder/thread_state.hh"
+#include "cpu/exetrace.hh"
using namespace TheISA;
#include "base/trace.hh"
#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
#include "cpu/intr_control.hh"
+#include "cpu/thread_context.hh"
#include "sim/sim_object.hh"
using namespace std;
#define __INTR_CONTROL_HH__
#include <vector>
+
#include "base/misc.hh"
#include "cpu/base.hh"
#include "params/IntrControl.hh"
#include "sim/sim_object.hh"
#include "sim/system.hh"
-
class IntrControl : public SimObject
{
public:
#ifndef __CPU_NATIVETRACE_HH__
#define __CPU_NATIVETRACE_HH__
-#include <errno.h>
#include <unistd.h>
+#include <cerrno>
+
#include "base/socket.hh"
#include "base/trace.hh"
#include "base/types.hh"
* Authors: Kevin Lim
*/
-#include "cpu/base_dyn_inst_impl.hh"
#include "cpu/o3/cpu.hh"
#include "cpu/o3/isa_specific.hh"
+#include "cpu/base_dyn_inst_impl.hh"
// Explicit instantiation
template class BaseDynInst<O3CPUImpl>;
#include "base/statistics.hh"
#include "base/types.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/pred/2bit_local.hh"
#include "cpu/pred/btb.hh"
#include "cpu/pred/ras.hh"
#include "cpu/pred/tournament.hh"
+#include "cpu/inst_seq.hh"
class DerivO3CPUParams;
#include <algorithm>
+#include "arch/isa_traits.hh"
#include "arch/types.hh"
#include "arch/utility.hh"
-#include "arch/isa_traits.hh"
#include "base/trace.hh"
#include "base/traceflags.hh"
#include "config/the_isa.hh"
#include <string>
#include "cpu/checker/cpu_impl.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/o3/alpha/dyn_inst.hh"
#include "cpu/o3/alpha/impl.hh"
+#include "cpu/inst_seq.hh"
#include "params/O3Checker.hh"
#include "sim/process.hh"
#include "sim/sim_object.hh"
* Authors: Kevin Lim
*/
-#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/commit_impl.hh"
+#include "cpu/o3/isa_specific.hh"
template class DefaultCommit<O3CPUImpl>;
#define __CPU_O3_COMMIT_HH__
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "cpu/exetrace.hh"
#include "cpu/inst_seq.hh"
+#include "cpu/timebuf.hh"
class DerivO3CPUParams;
#include <string>
#include "arch/utility.hh"
-#include "base/cp_annotate.hh"
#include "base/loader/symtab.hh"
-#include "cpu/timebuf.hh"
+#include "base/cp_annotate.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
-#include "cpu/exetrace.hh"
#include "cpu/o3/commit.hh"
#include "cpu/o3/thread_state.hh"
+#include "cpu/exetrace.hh"
+#include "cpu/timebuf.hh"
#include "params/DerivO3CPU.hh"
#if USE_CHECKER
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
+#include "cpu/o3/cpu.hh"
+#include "cpu/o3/isa_specific.hh"
+#include "cpu/o3/thread_context.hh"
#include "cpu/activity.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
-#include "cpu/o3/isa_specific.hh"
-#include "cpu/o3/cpu.hh"
-#include "cpu/o3/thread_context.hh"
#include "enums/MemoryMode.hh"
#include "sim/core.hh"
#include "sim/stat_control.hh"
#include "arch/types.hh"
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
-#include "cpu/activity.hh"
-#include "cpu/base.hh"
-#include "cpu/simple_thread.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/cpu_policy.hh"
#include "cpu/o3/scoreboard.hh"
#include "cpu/o3/thread_state.hh"
+#include "cpu/activity.hh"
+#include "cpu/base.hh"
+#include "cpu/simple_thread.hh"
+#include "cpu/timebuf.hh"
//#include "cpu/o3/thread_context.hh"
-#include "sim/process.hh"
-
#include "params/DerivO3CPU.hh"
+#include "sim/process.hh"
template <class>
class Checker;
#define __CPU_O3_CPU_POLICY_HH__
#include "cpu/o3/bpred_unit.hh"
+#include "cpu/o3/comm.hh"
+#include "cpu/o3/commit.hh"
+#include "cpu/o3/decode.hh"
+#include "cpu/o3/fetch.hh"
#include "cpu/o3/free_list.hh"
+#include "cpu/o3/iew.hh"
#include "cpu/o3/inst_queue.hh"
#include "cpu/o3/lsq.hh"
#include "cpu/o3/lsq_unit.hh"
#include "cpu/o3/mem_dep_unit.hh"
#include "cpu/o3/regfile.hh"
+#include "cpu/o3/rename.hh"
#include "cpu/o3/rename_map.hh"
#include "cpu/o3/rob.hh"
#include "cpu/o3/store_set.hh"
-#include "cpu/o3/commit.hh"
-#include "cpu/o3/decode.hh"
-#include "cpu/o3/fetch.hh"
-#include "cpu/o3/iew.hh"
-#include "cpu/o3/rename.hh"
-
-#include "cpu/o3/comm.hh"
-
/**
* Struct that defines the key classes to be used by the CPU. All
* classes use the typedefs defined here to determine what are the
* Authors: Kevin Lim
*/
-#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/decode_impl.hh"
+#include "cpu/o3/isa_specific.hh"
template class DefaultDecode<O3CPUImpl>;
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/base_dyn_inst.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/o3/cpu.hh"
#include "cpu/o3/isa_specific.hh"
+#include "cpu/base_dyn_inst.hh"
+#include "cpu/inst_seq.hh"
class Packet;
* Authors: Kevin Lim
*/
-#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/fetch_impl.hh"
+#include "cpu/o3/isa_specific.hh"
template class DefaultFetch<O3CPUImpl>;
#ifndef __CPU_O3_FETCH_HH__
#define __CPU_O3_FETCH_HH__
-#include "arch/utility.hh"
#include "arch/predecoder.hh"
+#include "arch/utility.hh"
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "config/the_isa.hh"
#include "cpu/pc_event.hh"
+#include "cpu/timebuf.hh"
#include "cpu/translation.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/checker/cpu.hh"
-#include "cpu/exetrace.hh"
#include "cpu/o3/fetch.hh"
+#include "cpu/exetrace.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
#include "params/DerivO3CPU.hh"
*/
#include "base/trace.hh"
-
#include "cpu/o3/free_list.hh"
SimpleFreeList::SimpleFreeList(ThreadID activeThreads,
#include <string>
#include <vector>
-#include "cpu/sched_list.hh"
#include "cpu/op_class.hh"
+#include "cpu/sched_list.hh"
#include "params/FUPool.hh"
#include "sim/sim_object.hh"
* Authors: Kevin Lim
*/
-#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/iew_impl.hh"
#include "cpu/o3/inst_queue.hh"
+#include "cpu/o3/isa_specific.hh"
template class DefaultIEW<O3CPUImpl>;
#include <queue>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "config/full_system.hh"
#include "cpu/o3/comm.hh"
-#include "cpu/o3/scoreboard.hh"
#include "cpu/o3/lsq.hh"
+#include "cpu/o3/scoreboard.hh"
+#include "cpu/timebuf.hh"
class DerivO3CPUParams;
class FUPool;
#include <queue>
-#include "cpu/timebuf.hh"
#include "config/the_isa.hh"
#include "cpu/o3/fu_pool.hh"
#include "cpu/o3/iew.hh"
+#include "cpu/timebuf.hh"
#include "params/DerivO3CPU.hh"
using namespace std;
#include "config/the_isa.hh"
#include "cpu/o3/cpu_policy.hh"
-
// Forward declarations.
template <class Impl>
class BaseO3DynInst;
* Authors: Kevin Lim
*/
-#include "cpu/o3/isa_specific.hh"
#include "cpu/o3/inst_queue_impl.hh"
+#include "cpu/o3/isa_specific.hh"
// Force instantiation of InstructionQueue.
template class InstructionQueue<O3CPUImpl>;
#include <vector>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "base/types.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/o3/dep_graph.hh"
+#include "cpu/inst_seq.hh"
#include "cpu/op_class.hh"
+#include "cpu/timebuf.hh"
#include "sim/eventq.hh"
class DerivO3CPUParams;
* Authors: Korey Sewell
*/
-#include "cpu/base.hh"
-
-#include "cpu/o3/impl.hh"
#include "cpu/o3/dyn_inst.hh"
+#include "cpu/o3/impl.hh"
+#include "cpu/base.hh"
#include <queue>
#include "config/full_system.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/o3/lsq_unit.hh"
+#include "cpu/inst_seq.hh"
#include "mem/port.hh"
#include "sim/sim_object.hh"
#include "arch/faults.hh"
#include "arch/locked_mem.hh"
-#include "config/full_system.hh"
-#include "config/the_isa.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
+#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
*/
#include "arch/locked_mem.hh"
+#include "base/str.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
#include "cpu/o3/lsq.hh"
#include "cpu/o3/lsq_unit.hh"
-#include "base/str.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
*/
#include "cpu/o3/isa_specific.hh"
-#include "cpu/o3/store_set.hh"
#include "cpu/o3/mem_dep_unit_impl.hh"
+#include "cpu/o3/store_set.hh"
// Force instantation of memory dependency unit using store sets and
// O3CPUImpl.
#include <list>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "config/the_isa.hh"
+#include "cpu/timebuf.hh"
class DerivO3CPUParams;
#include <iostream>
#include <utility>
#include <vector>
+
#include "base/trace.hh"
#include "base/traceflags.hh"
#include "cpu/o3/comm.hh"
* Authors: Kevin Lim
*/
+#include "cpu/o3/impl.hh"
#include "cpu/o3/thread_context.hh"
#include "cpu/o3/thread_context_impl.hh"
-#include "cpu/o3/impl.hh"
template class O3ThreadContext<O3CPUImpl>;
#define __CPU_O3_THREAD_CONTEXT_HH__
#include "config/the_isa.hh"
-#include "cpu/thread_context.hh"
#include "cpu/o3/isa_specific.hh"
+#include "cpu/thread_context.hh"
class EndQuiesceEvent;
namespace Kernel {
#include <queue>
#include <string>
-#include "sim/faults.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/rename_table.hh"
#include "cpu/ozone/thread_state.hh"
+#include "cpu/inst_seq.hh"
+#include "cpu/timebuf.hh"
#include "mem/request.hh"
#include "sim/eventq.hh"
+#include "sim/faults.hh"
class ThreadContext;
* Authors: Kevin Lim
*/
-#include "encumbered/cpu/full/op_class.hh"
#include "cpu/ozone/back_end.hh"
+#include "encumbered/cpu/full/op_class.hh"
template <class Impl>
BackEnd<Impl>::InstQueue::InstQueue(Params *params)
* Authors: Kevin Lim
*/
-#include "cpu/base_dyn_inst_impl.hh"
#include "cpu/ozone/ozone_impl.hh"
+#include "cpu/base_dyn_inst_impl.hh"
// Explicit instantiation
template class BaseDynInst<OzoneImpl>;
#include <string>
#include "cpu/checker/cpu_impl.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/dyn_inst.hh"
#include "cpu/ozone/ozone_impl.hh"
+#include "cpu/inst_seq.hh"
#include "params/OzoneChecker.hh"
#include "sim/process.hh"
#include "sim/sim_object.hh"
#include <set>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/rename_table.hh"
#include "cpu/ozone/thread_state.hh"
+#include "cpu/base.hh"
+#include "cpu/inst_seq.hh"
#include "cpu/pc_event.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
+#include "cpu/timebuf.hh"
#include "mem/page_table.hh"
#include "sim/eventq.hh"
#include <string>
#include "cpu/checker/cpu.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/cpu.hh"
#include "cpu/ozone/ozone_impl.hh"
#include "cpu/ozone/simple_params.hh"
+#include "cpu/inst_seq.hh"
#include "params/DerivOzoneCPU.hh"
#include "sim/process.hh"
#include "sim/sim_object.hh"
* Nathan Binkert
*/
-#include "config/full_system.hh"
-#include "config/use_checker.hh"
-
#include "arch/isa_traits.hh" // For MachInst
#include "base/trace.hh"
+#include "config/full_system.hh"
#include "config/the_isa.hh"
+#include "config/use_checker.hh"
+#include "cpu/ozone/cpu.hh"
#include "cpu/base.hh"
-#include "cpu/simple_thread.hh"
-#include "cpu/thread_context.hh"
#include "cpu/exetrace.hh"
-#include "cpu/ozone/cpu.hh"
#include "cpu/quiesce_event.hh"
+#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
#if FULL_SYSTEM
-#include "arch/faults.hh"
#include "arch/alpha/osfpal.hh"
+#include "arch/faults.hh"
+#include "arch/kernel_stats.hh"
#include "arch/tlb.hh"
#include "arch/types.hh"
-#include "arch/kernel_stats.hh"
#include "arch/vtophys.hh"
#include "base/callback.hh"
#include "cpu/profile.hh"
#ifndef __CPU_OZONE_DYN_INST_HH__
#define __CPU_OZONE_DYN_INST_HH__
+#include <list>
+#include <vector>
+
#include "arch/isa_traits.hh"
#include "arch/types.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "cpu/base_dyn_inst.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/cpu.hh" // MUST include this
#include "cpu/ozone/ozone_impl.hh"
-
-#include <list>
-#include <vector>
+#include "cpu/base_dyn_inst.hh"
+#include "cpu/inst_seq.hh"
template <class Impl>
class OzoneDynInst : public BaseDynInst<Impl>
* Authors: Kevin Lim
*/
-#include "sim/faults.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/dyn_inst.hh"
+#include "sim/faults.hh"
#if FULL_SYSTEM
#include "kern/kernel_stats.hh"
*/
#include "arch/isa_traits.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ooo_cpu/ea_list.hh"
+#include "cpu/inst_seq.hh"
void
EAList::addAddr(const InstSeqNum &new_sn, const Addr &new_ea)
#include <deque>
#include "arch/utility.hh"
-#include "cpu/timebuf.hh"
#include "config/the_isa.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/o3/bpred_unit.hh"
#include "cpu/ozone/rename_table.hh"
+#include "cpu/inst_seq.hh"
+#include "cpu/timebuf.hh"
#include "mem/port.hh"
#include "mem/request.hh"
#include "sim/eventq.hh"
* Authors: Kevin Lim
*/
-#include "sim/faults.hh"
#include "arch/isa_traits.hh"
#include "arch/utility.hh"
#include "base/statistics.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/exetrace.hh"
#include "cpu/ozone/front_end.hh"
+#include "cpu/exetrace.hh"
+#include "cpu/thread_context.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
#include "mem/request.hh"
+#include "sim/faults.hh"
#if USE_CHECKER
#include "cpu/checker/cpu.hh"
#include <list>
-#include "sim/faults.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/thread_context.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/rename_table.hh"
#include "cpu/ozone/thread_state.hh"
+#include "cpu/inst_seq.hh"
+#include "cpu/thread_context.hh"
+#include "cpu/timebuf.hh"
#include "mem/request.hh"
#include "sim/eventq.hh"
+#include "sim/faults.hh"
template <class Impl>
class InorderBackEnd
* Authors: Kevin Lim
*/
-#include "sim/faults.hh"
#include "arch/types.hh"
#include "config/the_isa.hh"
#include "cpu/ozone/inorder_back_end.hh"
#include "cpu/ozone/thread_state.hh"
+#include "sim/faults.hh"
template <class Impl>
InorderBackEnd<Impl>::InorderBackEnd(Params *params)
*/
#include "cpu/ozone/dyn_inst.hh"
+#include "cpu/ozone/inst_queue_impl.hh"
#include "cpu/ozone/ozone_impl.hh"
#include "cpu/ozone/simple_impl.hh"
-#include "cpu/ozone/inst_queue_impl.hh"
// Force instantiation of InstructionQueue.
template class InstQueue<SimpleImpl>;
#include <vector>
#include "base/statistics.hh"
-#include "cpu/timebuf.hh"
#include "base/types.hh"
#include "cpu/inst_seq.hh"
+#include "cpu/timebuf.hh"
class FUPool;
class MemInterface;
#include <vector>
-#include "sim/core.hh"
-
#include "cpu/ozone/inst_queue.hh"
+#include "sim/core.hh"
#if 0
template <class Impl>
InstQueue<Impl>::FUCompletion::FUCompletion(DynInstPtr &_inst,
* Authors: Kevin Lim
*/
-#include "cpu/ozone/ozone_impl.hh"
#include "cpu/ozone/lsq_unit_impl.hh"
+#include "cpu/ozone/ozone_impl.hh"
// Force the instantiation of LDSTQ for all the implementations we care about.
template class OzoneLSQ<OzoneImpl>;
#ifndef __CPU_OZONE_LSQ_UNIT_HH__
#define __CPU_OZONE_LSQ_UNIT_HH__
+#include <algorithm>
#include <map>
#include <queue>
-#include <algorithm>
#include "arch/faults.hh"
#include "arch/types.hh"
+#include "base/hashmap.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "base/hashmap.hh"
#include "cpu/inst_seq.hh"
#include "mem/mem_interface.hh"
//#include "mem/page_table.hh"
#include <set>
#include <string>
-#include "sim/faults.hh"
-#include "cpu/timebuf.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/rename_table.hh"
#include "cpu/ozone/thread_state.hh"
+#include "cpu/inst_seq.hh"
+#include "cpu/timebuf.hh"
#include "mem/request.hh"
#include "sim/eventq.hh"
+#include "sim/faults.hh"
template <class>
class Checker;
* Authors: Kevin Lim
*/
-#include "cpu/ozone/ozone_impl.hh"
#include "cpu/ozone/lw_lsq_impl.hh"
+#include "cpu/ozone/ozone_impl.hh"
// Force the instantiation of LDSTQ for all the implementations we care about.
template class OzoneLWLSQ<OzoneImpl>;
#ifndef __CPU_OZONE_LW_LSQ_HH__
#define __CPU_OZONE_LW_LSQ_HH__
+#include <algorithm>
#include <list>
#include <map>
#include <queue>
-#include <algorithm>
#include "arch/faults.hh"
#include "arch/types.hh"
-#include "config/full_system.hh"
-#include "config/the_isa.hh"
#include "base/fast_alloc.hh"
#include "base/hashmap.hh"
+#include "config/full_system.hh"
+#include "config/the_isa.hh"
#include "cpu/inst_seq.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
#include "base/str.hh"
#include "config/the_isa.hh"
#include "config/use_checker.hh"
-#include "cpu/ozone/lw_lsq.hh"
#include "cpu/checker/cpu.hh"
+#include "cpu/ozone/lw_lsq.hh"
template<class Impl>
OzoneLWLSQ<Impl>::WritebackEvent::WritebackEvent(DynInstPtr &_inst, PacketPtr _pkt,
* Authors: Kevin Lim
*/
-#include "cpu/base_dyn_inst_impl.hh"
#include "cpu/ozone/ozone_impl.hh"
+#include "cpu/base_dyn_inst_impl.hh"
// Explicit instantiation
template class BaseDynInst<OzoneImpl>;
#define __CPU_OZONE_OZONE_IMPL_HH__
#include "cpu/o3/bpred_unit.hh"
+#include "cpu/ozone/dyn_inst.hh"
#include "cpu/ozone/front_end.hh"
#include "cpu/ozone/inst_queue.hh"
-#include "cpu/ozone/lw_lsq.hh"
#include "cpu/ozone/lw_back_end.hh"
+#include "cpu/ozone/lw_lsq.hh"
#include "cpu/ozone/null_predictor.hh"
-#include "cpu/ozone/dyn_inst.hh"
#include "cpu/ozone/simple_params.hh"
template <class Impl>
* Authors: Kevin Lim
*/
-#include "cpu/ozone/rename_table_impl.hh"
#include "cpu/ozone/ozone_impl.hh"
+#include "cpu/ozone/rename_table_impl.hh"
//#include "cpu/ozone/simple_impl.hh"
template class RenameTable<OzoneImpl>;
* Authors: Kevin Lim
*/
-#include "cpu/base_dyn_inst_impl.hh"
#include "cpu/ozone/simple_impl.hh"
+#include "cpu/base_dyn_inst_impl.hh"
// Explicit instantiation
template class BaseDynInst<SimpleImpl>;
#include <string>
#include "cpu/checker/cpu.hh"
-#include "cpu/inst_seq.hh"
#include "cpu/ozone/cpu_impl.hh"
#include "cpu/ozone/simple_impl.hh"
#include "cpu/ozone/simple_params.hh"
+#include "cpu/inst_seq.hh"
#include "mem/cache/base.hh"
#include "sim/SimpleOzoneCPU.hh"
#include "sim/process.hh"
#include "cpu/o3/bpred_unit.hh"
#include "cpu/ozone/cpu.hh"
+#include "cpu/ozone/dyn_inst.hh"
#include "cpu/ozone/front_end.hh"
#include "cpu/ozone/inorder_back_end.hh"
#include "cpu/ozone/null_predictor.hh"
-#include "cpu/ozone/dyn_inst.hh"
#include "cpu/ozone/simple_params.hh"
//template <class Impl>
#include "base/trace.hh"
#include "config/full_system.hh"
#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
#include "cpu/pc_event.hh"
+#include "cpu/thread_context.hh"
#include "sim/core.hh"
#include "sim/system.hh"
#include <string>
+#include "base/loader/symtab.hh"
#include "base/bitfield.hh"
#include "base/callback.hh"
#include "base/statistics.hh"
#include "base/trace.hh"
-#include "base/loader/symtab.hh"
#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
#include "cpu/profile.hh"
+#include "cpu/thread_context.hh"
using namespace std;
#include <map>
#include "arch/stacktrace.hh"
+#include "base/types.hh"
#include "config/the_isa.hh"
#include "cpu/static_inst.hh"
-#include "base/types.hh"
class ThreadContext;
*/
#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
#include "cpu/quiesce_event.hh"
+#include "cpu/thread_context.hh"
EndQuiesceEvent::EndQuiesceEvent(ThreadContext *_tc)
: tc(_tc)
#define SCHED_LIST_HH
#include <list>
+
#include "base/intmath.hh"
#include "base/misc.hh"
-
// Any types you use this class for must be covered here...
namespace {
void ClearEntry(int &i) { i = 0; };
#include "arch/utility.hh"
#include "base/bigint.hh"
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/simple/atomic.hh"
+#include "cpu/exetrace.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/AtomicSimpleCPU.hh"
#include "arch/faults.hh"
#include "arch/utility.hh"
+#include "base/loader/symtab.hh"
#include "base/cp_annotate.hh"
#include "base/cprintf.hh"
#include "base/inifile.hh"
-#include "base/loader/symtab.hh"
#include "base/misc.hh"
#include "base/pollevent.hh"
#include "base/range.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
+#include "cpu/simple/base.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "cpu/profile.hh"
-#include "cpu/simple/base.hh"
#include "cpu/simple_thread.hh"
#include "cpu/smt.hh"
#include "cpu/static_inst.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
-#include "cpu/simple_thread.hh"
#include "cpu/pc_event.hh"
+#include "cpu/simple_thread.hh"
#include "cpu/static_inst.hh"
#include "mem/packet.hh"
#include "mem/port.hh"
#include "arch/utility.hh"
#include "base/bigint.hh"
#include "config/the_isa.hh"
-#include "cpu/exetrace.hh"
#include "cpu/simple/timing.hh"
+#include "cpu/exetrace.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/TimingSimpleCPU.hh"
#include "cpu/simple/base.hh"
#include "cpu/translation.hh"
-
#include "params/TimingSimpleCPU.hh"
class TimingSimpleCPU : public BaseSimpleCPU
#else // !FULL_SYSTEM
-#include "sim/process.hh"
#include "mem/page_table.hh"
+#include "sim/process.hh"
class TranslatingPort;
#endif // FULL_SYSTEM
*/
#include <iostream>
+
#include "cpu/static_inst.hh"
#include "sim/core.hh"
#include <string>
#include "arch/isa_traits.hh"
-#include "arch/types.hh"
#include "arch/registers.hh"
-#include "config/the_isa.hh"
+#include "arch/types.hh"
#include "base/hashmap.hh"
#include "base/misc.hh"
#include "base/refcnt.hh"
#include "base/types.hh"
+#include "config/the_isa.hh"
#include "cpu/op_class.hh"
#include "sim/fault_fwd.hh"
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "cpu/testers/directedtest/DirectedGenerator.hh"
#include "cpu/testers/directedtest/InvalidateGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
InvalidateGenerator::InvalidateGenerator(const Params *p)
: DirectedGenerator(p)
#ifndef __CPU_DIRECTEDTEST_INVALIDATEGENERATOR_HH__
#define __CPU_DIRECTEDTEST_INVALIDATEGENERATOR_HH__
-#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "cpu/testers/directedtest/DirectedGenerator.hh"
+#include "cpu/testers/directedtest/RubyDirectedTester.hh"
#include "mem/protocol/InvalidateGeneratorStatus.hh"
#include "params/InvalidateGenerator.hh"
#define __CPU_DIRECTEDTEST_RUBYDIRECTEDTESTER_HH__
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
-#include "mem/mem_object.hh"
-#include "mem/packet.hh"
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/RubyPort.hh"
+#include "mem/mem_object.hh"
+#include "mem/packet.hh"
#include "params/RubyDirectedTester.hh"
class DirectedGenerator;
#include "base/statistics.hh"
#include "cpu/testers/memtest/memtest.hh"
#include "mem/mem_object.hh"
-#include "mem/port.hh"
#include "mem/packet.hh"
+#include "mem/port.hh"
#include "mem/request.hh"
#include "sim/sim_events.hh"
#include "sim/stats.hh"
#include <set>
-#include "base/statistics.hh"
#include "base/fast_alloc.hh"
+#include "base/statistics.hh"
+#include "mem/mem_object.hh"
+#include "mem/port.hh"
#include "params/MemTest.hh"
#include "sim/eventq.hh"
#include "sim/sim_exit.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
-#include "mem/mem_object.hh"
-#include "mem/port.hh"
class Packet;
class MemTest : public MemObject
* Authors: Tushar Krishna
*/
+#include <cmath>
#include <iomanip>
#include <set>
#include <string>
#include <vector>
-#include <cmath>
#include "base/misc.hh"
#include "base/statistics.hh"
#include "cpu/testers/networktest/networktest.hh"
#include "mem/mem_object.hh"
-#include "mem/port.hh"
#include "mem/packet.hh"
+#include "mem/port.hh"
#include "mem/request.hh"
#include "sim/sim_events.hh"
#include "sim/stats.hh"
#include <set>
-#include "base/statistics.hh"
#include "base/fast_alloc.hh"
+#include "base/statistics.hh"
+#include "mem/mem_object.hh"
+#include "mem/port.hh"
#include "params/NetworkTest.hh"
#include "sim/eventq.hh"
#include "sim/sim_exit.hh"
#include "sim/sim_object.hh"
#include "sim/stats.hh"
-#include "mem/mem_object.hh"
-#include "mem/port.hh"
class Packet;
class NetworkTest : public MemObject
#include "base/intmath.hh"
#include "cpu/testers/rubytest/Check.hh"
#include "cpu/testers/rubytest/CheckTable.hh"
-#include "cpu/testers/rubytest/CheckTable.hh"
CheckTable::CheckTable(int _num_cpu_sequencers, RubyTester* _tester)
: m_num_cpu_sequencers(_num_cpu_sequencers), m_tester_ptr(_tester)
#define __CPU_RUBYTEST_RUBYTESTER_HH__
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "cpu/testers/rubytest/CheckTable.hh"
-#include "mem/mem_object.hh"
-#include "mem/packet.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
#include "mem/ruby/system/RubyPort.hh"
+#include "mem/mem_object.hh"
+#include "mem/packet.hh"
#include "params/RubyTester.hh"
class RubyTester : public MemObject
#ifndef __CPU_THREAD_CONTEXT_HH__
#define __CPU_THREAD_CONTEXT_HH__
-#include <string>
#include <iostream>
+#include <string>
#include "arch/registers.hh"
#include "arch/types.hh"
#include "arch/types.hh"
#include "config/the_isa.hh"
+#include "cpu/base.hh"
#include "cpu/profile.hh"
#include "cpu/thread_context.hh"
-#include "cpu/base.hh"
#if !FULL_SYSTEM
#include "mem/mem_object.hh"
#include <algorithm> // For heap functions.
-#include "cpu/trace/opt_cpu.hh"
#include "cpu/trace/reader/mem_trace_reader.hh"
+#include "cpu/trace/opt_cpu.hh"
#include "params/OptCPU.hh"
#include "sim/sim_events.hh"
#ifndef __IBM_READER_HH__
#define __IBM_READER_HH__
-#include <stdio.h>
+#include <cstdio>
+
#include "cpu/trace/reader/mem_trace_reader.hh"
#include "mem/mem_req.hh"
#ifndef __ITX_READER_HH__
#define __ITX_READER_HH__
-#include <stdio.h>
+#include <cstdio>
#include <string>
#include "cpu/trace/reader/mem_trace_reader.hh"
#include "mem/mem_req.hh"
-
/**
* A memory trace reader for the Intel ITX memory trace format.
*/
#ifndef __MEM_TRACE_READER_HH__
#define __MEM_TRACE_READER_HH__
-#include "sim/sim_object.hh"
#include "mem/mem_req.hh" // For MemReqPtr
+#include "sim/sim_object.hh"
/**
* Pure virtual base class for memory trace readers.
#include <algorithm> // For min
-#include "cpu/trace/trace_cpu.hh"
#include "cpu/trace/reader/mem_trace_reader.hh"
+#include "cpu/trace/trace_cpu.hh"
#include "mem/base_mem.hh" // For PARAM constructor
#include "mem/mem_interface.hh"
#include "params/TraceCPU.hh"
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
+#include "dev/alpha/tsunami.hh"
#include "dev/alpha/tsunami_cchip.hh"
-#include "dev/alpha/tsunami_pchip.hh"
#include "dev/alpha/tsunami_io.hh"
-#include "dev/alpha/tsunami.hh"
+#include "dev/alpha/tsunami_pchip.hh"
#include "dev/terminal.hh"
#include "sim/system.hh"
#include "base/time.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "dev/rtcreg.h"
-#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami.hh"
+#include "dev/alpha/tsunami_cchip.hh"
#include "dev/alpha/tsunami_io.hh"
#include "dev/alpha/tsunamireg.h"
+#include "dev/rtcreg.h"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/port.hh"
#include "base/range.hh"
#include "dev/alpha/tsunami.hh"
#include "dev/intel_8254_timer.hh"
-#include "dev/mc146818.hh"
#include "dev/io_device.hh"
+#include "dev/mc146818.hh"
#include "params/TsunamiIO.hh"
#include "sim/eventq.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "dev/alpha/tsunami.hh"
#include "dev/alpha/tsunami_pchip.hh"
#include "dev/alpha/tsunamireg.h"
-#include "dev/alpha/tsunami.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/system.hh"
*/
#include "base/trace.hh"
-#include "dev/arm/amba_fake.hh"
#include "dev/arm/amba_device.hh"
+#include "dev/arm/amba_fake.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#define __DEV_ARM_AMBA_DEVICE_HH__
#include "base/range.hh"
-#include "dev/io_device.hh"
#include "dev/arm/gic.hh"
+#include "dev/io_device.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "params/AmbaDevice.hh"
-#include "params/AmbaIntDevice.hh"
#include "params/AmbaDmaDevice.hh"
+#include "params/AmbaIntDevice.hh"
namespace AmbaDev {
* William Wang
*/
-#include "base/trace.hh"
#include "base/vnc/vncserver.hh"
+#include "base/trace.hh"
#include "dev/arm/amba_device.hh"
#include "dev/arm/kmi.hh"
#include "dev/ps2.hh"
#include <list>
-#include "base/range.hh"
#include "base/vnc/vncserver.hh"
+#include "base/range.hh"
#include "dev/arm/amba_device.hh"
#include "params/Pl050.hh"
* Ali Saidi
*/
+#include "base/vnc/vncserver.hh"
#include "base/bitmap.hh"
#include "base/output.hh"
#include "base/trace.hh"
-#include "base/vnc/vncserver.hh"
#include "dev/arm/amba_device.hh"
#include "dev/arm/gic.hh"
#include "dev/arm/pl111.hh"
#include <sys/types.h>
#include <sys/uio.h>
-#include <errno.h>
#include <unistd.h>
+#include <cerrno>
#include <cstring>
#include <fstream>
#include <string>
#include "base/misc.hh"
#include "base/trace.hh"
#include "dev/disk_image.hh"
-#include "sim/sim_exit.hh"
#include "sim/byteswap.hh"
+#include "sim/sim_exit.hh"
using namespace std;
#include <fstream>
#include "base/hashmap.hh"
-#include "sim/sim_object.hh"
-#include "params/DiskImage.hh"
#include "params/CowDiskImage.hh"
+#include "params/DiskImage.hh"
#include "params/RawDiskImage.hh"
+#include "sim/sim_object.hh"
#define SectorSize (512)
#ifndef __ETHERBUS_H__
#define __ETHERBUS_H__
-#include "sim/eventq.hh"
-#include "dev/etherpkt.hh"
#include "dev/etherobject.hh"
+#include "dev/etherpkt.hh"
#include "params/EtherBus.hh"
+#include "sim/eventq.hh"
#include "sim/sim_object.hh"
-#include "params/EtherBus.hh"
class EtherDump;
class EtherInt;
#define __ETHERDUMP_H__
#include <fstream>
+
#include "dev/etherpkt.hh"
-#include "sim/sim_object.hh"
#include "params/EtherDump.hh"
+#include "sim/sim_object.hh"
/*
* Simple object for creating a simple pcap style packet trace
* Authors: Nathan Binkert
*/
-#include "dev/etherint.hh"
#include "base/misc.hh"
+#include "dev/etherint.hh"
#include "sim/sim_object.hh"
void
#include "dev/etherlink.hh"
#include "dev/etherpkt.hh"
#include "params/EtherLink.hh"
+#include "sim/core.hh"
#include "sim/serialize.hh"
#include "sim/system.hh"
-#include "sim/core.hh"
using namespace std;
#include "dev/etherobject.hh"
#include "dev/etherpkt.hh"
#include "params/EtherLink.hh"
-#include "params/EtherLink.hh"
#include "sim/eventq.hh"
#include "sim/sim_object.hh"
#include <sys/param.h>
#endif
#include <netinet/in.h>
-
#include <unistd.h>
#include <deque>
#include <string>
#include "base/pollevent.hh"
-#include "dev/etherobject.hh"
#include "dev/etherint.hh"
+#include "dev/etherobject.hh"
#include "dev/etherpkt.hh"
#include "params/EtherTap.hh"
#include "sim/eventq.hh"
#define __IDE_CTRL_HH__
#include "base/bitunion.hh"
+#include "dev/io_device.hh"
#include "dev/pcidev.hh"
#include "dev/pcireg.h"
-#include "dev/io_device.hh"
#include "params/IdeController.hh"
class IdeDisk;
#include <string>
#include "arch/isa_traits.hh"
-#include "config/the_isa.hh"
#include "base/chunk_generator.hh"
#include "base/cprintf.hh" // csprintf
#include "base/trace.hh"
+#include "config/the_isa.hh"
#include "dev/disk_image.hh"
#include "dev/ide_ctrl.hh"
#include "dev/ide_disk.hh"
#include "dev/ide_ctrl.hh"
#include "dev/ide_wdcreg.h"
#include "dev/io_device.hh"
-#include "sim/eventq.hh"
#include "params/IdeDisk.hh"
-
+#include "sim/eventq.hh"
class ChunkGenerator;
#ifndef __DEV_8254_HH__
#define __DEV_8254_HH__
-#include <string>
#include <iostream>
+#include <string>
#include "base/bitunion.hh"
#include "base/types.hh"
#include "dev/io_device.hh"
#include "sim/system.hh"
-
PioPort::PioPort(PioDevice *dev, System *s, std::string pname)
: SimpleTimingPort(dev->name() + pname, dev), device(dev)
{ }
#include "base/range.hh"
#include "dev/io_device.hh"
// #include "dev/alpha/tsunami.hh"
-#include "params/IsaFake.hh"
#include "mem/packet.hh"
+#include "params/IsaFake.hh"
/**
* IsaFake is a device that returns, BadAddr, 1 or 0 on all reads and
*/
#include <sys/time.h>
-#include <time.h>
+#include <ctime>
#include <string>
#include "base/bitfield.hh"
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
+#include "dev/mips/malta.hh"
#include "dev/mips/malta_cchip.hh"
-#include "dev/mips/malta_pchip.hh"
#include "dev/mips/malta_io.hh"
-#include "dev/mips/malta.hh"
+#include "dev/mips/malta_pchip.hh"
#include "dev/terminal.hh"
#include "params/Malta.hh"
#include "sim/system.hh"
#ifndef __MALTA_CCHIP_HH__
#define __MALTA_CCHIP_HH__
-#include "dev/mips/malta.hh"
#include "base/range.hh"
+#include "dev/mips/malta.hh"
#include "dev/io_device.hh"
#include "params/MaltaCChip.hh"
#include "base/time.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "dev/rtcreg.h"
-#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta.hh"
+#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta_io.hh"
#include "dev/mips/maltareg.h"
+#include "dev/rtcreg.h"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "mem/port.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "dev/mips/malta.hh"
#include "dev/mips/malta_pchip.hh"
#include "dev/mips/maltareg.h"
-#include "dev/mips/malta.hh"
#include "mem/packet.hh"
#include "mem/packet_access.hh"
#include "sim/system.hh"
#ifndef __MALTA_PCHIP_HH__
#define __MALTA_PCHIP_HH__
-#include "dev/mips/malta.hh"
#include "base/range.hh"
+#include "dev/mips/malta.hh"
#include "dev/io_device.hh"
#include "params/MaltaPChip.hh"
#ifndef __PCICONFIGALL_HH__
#define __PCICONFIGALL_HH__
-#include "dev/pcireg.h"
#include "base/range.hh"
#include "dev/io_device.hh"
+#include "dev/pcireg.h"
#include "params/PciConfigAll.hh"
-
/**
* PCI Config Space
* All of PCI config space needs to return -1 on Tsunami, except
#include <bitset>
#include <set>
-#include "sim/sim_object.hh"
#include "params/Platform.hh"
+#include "sim/sim_object.hh"
class PciConfigAll;
class IntrControl;
*/
#include <list>
-#include "x11keysym/keysym.h"
#include "base/misc.hh"
#include "dev/ps2.hh"
-
+#include "x11keysym/keysym.h"
namespace Ps2 {
#ifndef __DEV_SIMPLE_DISK_HH__
#define __DEV_SIMPLE_DISK_HH__
-#include "sim/sim_object.hh"
#include "params/SimpleDisk.hh"
+#include "sim/sim_object.hh"
class DiskImage;
class System;
#include <cstring>
-#include "arch/sparc/isa_traits.hh"
#include "arch/sparc/faults.hh"
+#include "arch/sparc/isa_traits.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "cpu/intr_control.hh"
#include "dev/sparc/iob.hh"
#include "dev/platform.hh"
-#include "mem/port.hh"
#include "mem/packet_access.hh"
+#include "mem/port.hh"
#include "sim/faults.hh"
#include "sim/system.hh"
#define __DEV_SPARC_IOB_HH__
#include "base/range.hh"
-#include "dev/io_device.hh"
#include "dev/disk_image.hh"
+#include "dev/io_device.hh"
#include "params/Iob.hh"
class IntrControl;
#include "base/trace.hh"
#include "dev/sparc/mm_disk.hh"
#include "dev/platform.hh"
-#include "mem/port.hh"
#include "mem/packet_access.hh"
+#include "mem/port.hh"
#include "sim/byteswap.hh"
#include "sim/system.hh"
#define __DEV_SPARC_MM_DISK_HH__
#include "base/range.hh"
-#include "dev/io_device.hh"
#include "dev/disk_image.hh"
+#include "dev/io_device.hh"
#include "params/MmDisk.hh"
class MmDisk : public BasicPioDevice
#include <sys/ioctl.h>
#include <sys/termios.h>
-#include <errno.h>
#include <poll.h>
#include <unistd.h>
#include <cctype>
-#include <iostream>
+#include <cerrno>
#include <fstream>
+#include <iostream>
#include <sstream>
#include <string>
#include <iostream>
#include "base/circlebuf.hh"
-#include "cpu/intr_control.hh"
#include "base/pollevent.hh"
#include "base/socket.hh"
-#include "sim/sim_object.hh"
+#include "cpu/intr_control.hh"
#include "params/Terminal.hh"
+#include "sim/sim_object.hh"
class TerminalListener;
class Uart;
#ifndef __DEV_X86_I8042_HH__
#define __DEV_X86_I8042_HH__
-#include "dev/io_device.hh"
+#include <queue>
+
#include "dev/x86/intdev.hh"
+#include "dev/io_device.hh"
#include "params/I8042.hh"
-#include <queue>
-
namespace X86ISA
{
#ifndef __DEV_X86_I82094AA_HH__
#define __DEV_X86_I82094AA_HH__
+#include <map>
+
#include "base/bitunion.hh"
#include "base/range_map.hh"
-#include "dev/io_device.hh"
#include "dev/x86/intdev.hh"
+#include "dev/io_device.hh"
#include "params/I82094AA.hh"
-#include <map>
-
namespace X86ISA
{
#ifndef __DEV_X86_I8259_HH__
#define __DEV_X86_I8259_HH__
-#include "dev/io_device.hh"
#include "dev/x86/intdev.hh"
-#include "params/I8259.hh"
+#include "dev/io_device.hh"
#include "enums/X86I8259CascadeMode.hh"
+#include "params/I8259.hh"
namespace X86ISA
{
#define __DEV_X86_INTDEV_HH__
#include <cassert>
+#include <list>
#include <string>
-#include "arch/x86/x86_traits.hh"
#include "arch/x86/intmessage.hh"
+#include "arch/x86/x86_traits.hh"
#include "mem/mem_object.hh"
#include "mem/mport.hh"
-#include "sim/sim_object.hh"
-#include "params/X86IntSourcePin.hh"
-#include "params/X86IntSinkPin.hh"
#include "params/X86IntLine.hh"
-
-#include <list>
+#include "params/X86IntSinkPin.hh"
+#include "params/X86IntSourcePin.hh"
+#include "sim/sim_object.hh"
namespace X86ISA {
#include "arch/x86/x86_traits.hh"
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
-#include "dev/terminal.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/i8254.hh"
#include "dev/x86/i8259.hh"
#include "dev/x86/pc.hh"
#include "dev/x86/south_bridge.hh"
+#include "dev/terminal.hh"
#include "sim/system.hh"
using namespace std;
#ifndef __DEV_X86_SOUTH_BRIDGE_HH__
#define __DEV_X86_SOUTH_BRIDGE_HH__
-#include "sim/sim_object.hh"
#include "params/SouthBridge.hh"
+#include "sim/sim_object.hh"
namespace X86ISA
{
#include "base/trace.hh"
#include "cpu/thread_context.hh"
-#include "kern/kernel_stats.hh"
#include "kern/tru64/tru64_syscalls.hh"
+#include "kern/kernel_stats.hh"
#include "sim/system.hh"
using namespace std;
#include <string>
#include "cpu/static_inst.hh"
-#include "sim/stats.hh"
#include "sim/serialize.hh"
+#include "sim/stats.hh"
class BaseCPU;
class ThreadContext;
#include <sstream>
-#include "base/trace.hh"
#include "arch/utility.hh"
+#include "base/trace.hh"
#include "cpu/thread_context.hh"
#include "kern/linux/events.hh"
#include "kern/linux/printk.hh"
*/
#include <sys/types.h>
+
#include <algorithm>
-#include "sim/arguments.hh"
#include "base/trace.hh"
#include "kern/linux/printk.hh"
+#include "sim/arguments.hh"
using namespace std;
*/
-#include "kern/operatingsystem.hh"
#include "base/misc.hh"
+#include "kern/operatingsystem.hh"
int
OperatingSystem::openSpecialFile(std::string path, LiveProcess *process, ThreadContext *tc)
*/
#include <sys/types.h>
+
#include <algorithm>
#include "arch/isa_traits.hh"
#include "arch/vtophys.hh"
-#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
+#include "base/cprintf.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "config/the_isa.hh"
*/
#include <sys/types.h>
+
#include <algorithm>
#include "arch/vtophys.hh"
#else //!FULL_SYSTEM
-#include <sys/types.h>
#include <sys/stat.h>
+#include <sys/types.h>
#if defined(__OpenBSD__) || defined(__APPLE__) || defined(__FreeBSD__)
-#include <sys/param.h>
#include <sys/mount.h>
+#include <sys/param.h>
#else
#include <sys/statfs.h>
#endif
#include <dirent.h>
-#include <errno.h>
#include <fcntl.h>
-#include <string.h> // for memset()
#include <unistd.h>
-#include "config/the_isa.hh"
+#include <cerrno>
+#include <cstring> // for memset()
+
#include "arch/alpha/registers.hh"
+#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "sim/core.hh"
#include "sim/syscall_emul.hh"
#include "arch/alpha/ev5.hh"
#include "arch/isa_traits.hh"
#include "config/the_isa.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
-#include "kern/system_events.hh"
-#include "kern/tru64/tru64_events.hh"
+#include "cpu/thread_context.hh"
#include "kern/tru64/dump_mbuf.hh"
#include "kern/tru64/printf.hh"
+#include "kern/tru64/tru64_events.hh"
+#include "kern/system_events.hh"
#include "sim/arguments.hh"
#include "sim/system.hh"
#ifndef __MEM_BRIDGE_HH__
#define __MEM_BRIDGE_HH__
-#include <string>
#include <list>
#include <queue>
+#include <string>
#include "base/fast_alloc.hh"
#include "base/types.hh"
#ifndef __MEM_BUS_HH__
#define __MEM_BUS_HH__
-#include <string>
-#include <set>
#include <list>
+#include <set>
+#include <string>
#include "base/hashmap.hh"
#include "base/range.hh"
#include "mem/cache/mshr_queue.hh"
#include "mem/mem_object.hh"
#include "mem/packet.hh"
-#include "mem/tport.hh"
#include "mem/request.hh"
+#include "mem/tport.hh"
#include "params/BaseCache.hh"
#include "sim/eventq.hh"
#include "sim/sim_exit.hh"
#include <list>
#include "base/printable.hh"
-#include "sim/core.hh" // for Tick
#include "mem/packet.hh"
#include "mem/request.hh"
+#include "sim/core.hh" // for Tick
/**
* Cache block status bit assignments
#include "config/the_isa.hh"
#include "enums/Prefetch.hh"
-#include "mem/config/cache.hh"
#include "mem/cache/base.hh"
#include "mem/cache/cache.hh"
+#include "mem/config/cache.hh"
#include "mem/bus.hh"
#include "params/BaseCache.hh"
//Prefetcher Headers
#include "mem/cache/prefetch/ghb.hh"
-#include "mem/cache/prefetch/tagged.hh"
#include "mem/cache/prefetch/stride.hh"
-
+#include "mem/cache/prefetch/tagged.hh"
using namespace std;
#define __CACHE_HH__
#include "base/misc.hh" // fatal, panic, and warn
-
#include "mem/cache/base.hh"
#include "mem/cache/blk.hh"
#include "mem/cache/mshr.hh"
-
#include "sim/eventq.hh"
//Forward decleration
#include "base/misc.hh"
#include "base/range.hh"
#include "base/types.hh"
+#include "mem/cache/prefetch/base.hh"
#include "mem/cache/blk.hh"
#include "mem/cache/cache.hh"
#include "mem/cache/mshr.hh"
-#include "mem/cache/prefetch/base.hh"
#include "sim/sim_exit.hh"
template<class TagStore>
#include <vector>
-#include "mem/packet.hh"
#include "mem/cache/mshr.hh"
+#include "mem/packet.hh"
/**
* A Class for maintaining a list of pending and allocated memory requests.
#include "arch/isa_traits.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "mem/cache/base.hh"
#include "mem/cache/prefetch/base.hh"
+#include "mem/cache/base.hh"
#include "mem/request.hh"
BasePrefetcher::BasePrefetcher(const BaseCacheParams *p)
#ifndef __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__
#define __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__
-#include <limits.h>
+#include <climits>
+
#include "mem/cache/prefetch/base.hh"
class StridePrefetcher : public BasePrefetcher
* Definitions of BaseTags.
*/
+#include "cpu/smt.hh" //maxThreadsPerCPU
#include "mem/cache/tags/base.hh"
-
#include "mem/cache/base.hh"
-#include "cpu/smt.hh" //maxThreadsPerCPU
#include "sim/sim_exit.hh"
using namespace std;
#define __BASE_TAGS_HH__
#include <string>
-#include "base/statistics.hh"
+
#include "base/callback.hh"
+#include "base/statistics.hh"
class BaseCache;
#ifndef __CACHESET_HH__
#define __CACHESET_HH__
-#include "mem/cache/blk.hh" // base class
-#include <assert.h>
+#include <cassert>
+#include "mem/cache/blk.hh" // base class
/**
* An associative set of cache blocks.
#include <list>
#include "base/hashmap.hh"
-#include "mem/cache/blk.hh"
#include "mem/cache/tags/base.hh"
+#include "mem/cache/blk.hh"
#include "mem/packet.hh"
/**
#include "base/intmath.hh"
#include "base/trace.hh"
-#include "mem/cache/base.hh"
#include "mem/cache/tags/iic.hh"
+#include "mem/cache/base.hh"
#include "sim/core.hh"
using namespace std;
#include <list>
#include <vector>
-#include "mem/cache/blk.hh"
-#include "mem/cache/tags/iic_repl/repl.hh"
-#include "mem/packet.hh"
#include "base/statistics.hh"
+#include "mem/cache/tags/iic_repl/repl.hh"
#include "mem/cache/tags/base.hh"
+#include "mem/cache/blk.hh"
+#include "mem/packet.hh"
class BaseCache; // Forward declaration
#include "base/misc.hh"
#include "base/types.hh"
-#include "mem/cache/tags/iic.hh"
#include "mem/cache/tags/iic_repl/gen.hh"
+#include "mem/cache/tags/iic.hh"
#include "params/GenRepl.hh"
using namespace std;
#ifndef __REPL_HH__
#define __REPL_HH__
-#include <string>
#include <list>
+#include <string>
#include "base/types.hh"
#include "cpu/smt.hh"
#include <string>
#include "base/intmath.hh"
-#include "mem/cache/base.hh"
#include "mem/cache/tags/cacheset.hh"
#include "mem/cache/tags/lru.hh"
+#include "mem/cache/base.hh"
#include "sim/core.hh"
using namespace std;
#include <cstring>
#include <list>
-#include "mem/cache/blk.hh"
#include "mem/cache/tags/base.hh"
+#include "mem/cache/blk.hh"
#include "mem/packet.hh"
class BaseCache;
* between a single level of the memory heirarchy (ie L1->L2).
*/
-#include <iostream>
#include <cstring>
+#include <iostream>
+
#include "base/cprintf.hh"
#include "base/misc.hh"
#include "base/trace.hh"
#ifndef __MEM_PACKET_HH__
#define __MEM_PACKET_HH__
+#include <bitset>
#include <cassert>
#include <list>
-#include <bitset>
#include "base/cast.hh"
#include "base/compiler.hh"
* @file
* Definitions of page table.
*/
-#include <string>
-#include <map>
#include <fstream>
+#include <map>
+#include <string>
#include "base/bitfield.hh"
#include "base/intmath.hh"
* Ali Saidi
*/
-#include <sys/types.h>
#include <sys/mman.h>
+#include <sys/types.h>
#include <sys/user.h>
-#include <errno.h>
#include <fcntl.h>
#include <unistd.h>
#include <zlib.h>
+#include <cerrno>
#include <cstdio>
#include <iostream>
#include <string>
#include <cassert>
#include <functional>
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "mem/ruby/buffers/MessageBufferNode.hh"
+#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
#include "mem/ruby/slicc_interface/Message.hh"
-#include "mem/ruby/common/Address.hh"
class MessageBuffer
{
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "mem/ruby/common/NetDest.hh"
#include "mem/protocol/Protocol.hh"
+#include "mem/ruby/common/NetDest.hh"
NetDest::NetDest()
{
#include <iostream>
#include <limits>
-#include "mem/ruby/system/System.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/NodeID.hh"
+#include "mem/ruby/system/System.hh"
class Set
{
#include <iostream>
#include <string>
-#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/Address.hh"
+#include "mem/ruby/common/Global.hh"
#include "mem/ruby/filters/AbstractBloomFilter.hh"
class GenericBloomFilter
#include "base/misc.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/network/simple/Topology.hh"
+#include "mem/ruby/network/Network.hh"
Network::Network(const Params *p)
: SimObject(p)
#ifndef __MEM_RUBY_NETWORK_GARNET_BASEGARNETNETWORK_HH__
#define __MEM_RUBY_NETWORK_GARNET_BASEGARNETNETWORK_HH__
-#include "math.h"
#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/Network.hh"
#include "params/BaseGarnetNetwork.hh"
+#include "math.h"
class BaseGarnetNetwork : public Network
{
#include <cassert>
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
+#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/simple/Topology.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
-#include "mem/ruby/common/NetDest.hh"
using namespace std;
using m5::stl_helpers::deletePointers;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/BaseGarnetNetwork.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/Network.hh"
#include "params/GarnetNetwork_d.hh"
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/VirtualChannel_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
#include <cmath>
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkInterface_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
#include "mem/ruby/slicc_interface/NetworkMessage.hh"
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/slicc_interface/Message.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
+#include "mem/ruby/slicc_interface/Message.hh"
class NetworkMessage;
class MessageBuffer;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
NetworkLink_d::NetworkLink_d(int id, int link_latency, GarnetNetwork_d *net_ptr)
{
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
class GarnetNetwork_d;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
OutVcState_d::OutVcState_d(int id, GarnetNetwork_d *network_ptr)
{
#ifndef __MEM_RUBY_NETWORK_GARNET_FIXED_PIPELINE_OUT_VC_STATE_D_HH__
#define __MEM_RUBY_NETWORK_GARNET_FIXED_PIPELINE_OUT_VC_STATE_D_HH__
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class OutVcState_d
{
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/OutVcState_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
*/
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/CreditLink_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh"
using namespace std;
using m5::stl_helpers::deletePointers;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
class GarnetNetwork_d;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/RoutingUnit_d.hh"
#include "mem/ruby/slicc_interface/NetworkMessage.hh"
RoutingUnit_d::RoutingUnit_d(Router_d *router)
#ifndef __MEM_RUBY_NETWORK_GARNET_FIXED_PIPELINE_ROUTING_UNIT_D_HH__
#define __MEM_RUBY_NETWORK_GARNET_FIXED_PIPELINE_ROUTING_UNIT_D_HH__
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class InputUnit_d;
class Router_d;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/SWallocator_d.hh"
SWallocator_d::SWallocator_d(Router_d *router)
{
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
class InputUnit_d;
*/
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Switch_d.hh"
using m5::stl_helpers::deletePointers;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
class OutputUnit_d;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/InputUnit_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/OutputUnit_d.hh"
-#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/VCallocator_d.hh"
VCallocator_d::VCallocator_d(Router_d *router)
{
#define __MEM_RUBY_NETWORK_GARNET_FIXED_PIPELINE_VC_ALLOCATOR_D_HH__
#include <iostream>
-#include <vector>
#include <utility>
+#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router_d;
class InputUnit_d;
#include <utility>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flitBuffer_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class VirtualChannel_d
{
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/flit_d.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class flitBuffer_d
{
#define __MEM_RUBY_NETWORK_GARNET_FLEXIBLE_PIPELINE_FLEXIBLE_CONSUMER_HH__
#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class FlexibleConsumer : public Consumer
{
#include <cassert>
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
#include "mem/protocol/MachineType.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
-#include "mem/ruby/network/simple/Topology.hh"
-#include "mem/ruby/network/simple/SimpleNetwork.hh"
+#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
-#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
+#include "mem/ruby/network/simple/SimpleNetwork.hh"
+#include "mem/ruby/network/simple/Topology.hh"
using namespace std;
using m5::stl_helpers::deletePointers;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/BaseGarnetNetwork.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/Network.hh"
#include "params/GarnetNetwork.hh"
#include <cmath>
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/NetworkInterface.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh"
#include "mem/ruby/slicc_interface/NetworkMessage.hh"
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh"
-#include "mem/ruby/slicc_interface/Message.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
+#include "mem/ruby/slicc_interface/Message.hh"
class NetworkMessage;
class MessageBuffer;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
NetworkLink::NetworkLink(int id, int latency, GarnetNetwork *net_ptr)
{
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
+#include "mem/ruby/common/NetDest.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh"
-#include "mem/ruby/common/NetDest.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class GarnetNetwork;
*/
#include "base/stl_helpers.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
-#include "mem/ruby/slicc_interface/NetworkMessage.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/InVcState.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh"
+#include "mem/ruby/slicc_interface/NetworkMessage.hh"
using namespace std;
using m5::stl_helpers::deletePointers;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
#include "mem/ruby/common/NetDest.hh"
-#include "mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/FlexibleConsumer.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/GarnetNetwork.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/InVcState.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/NetworkLink.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/OutVcState.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/flitBuffer.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class VCarbiter;
* Authors: Niket Agarwal
*/
-#include "mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/Router.hh"
+#include "mem/ruby/network/garnet/flexible-pipeline/VCarbiter.hh"
VCarbiter::VCarbiter(Router *router)
{
#include <iostream>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/common/Consumer.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class Router;
#include <iostream>
#include <vector>
-#include "mem/ruby/network/garnet/NetworkHeader.hh"
#include "mem/ruby/network/garnet/flexible-pipeline/flit.hh"
+#include "mem/ruby/network/garnet/NetworkHeader.hh"
class flitBuffer
{
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
#include "mem/ruby/network/orion/Allocator/MatrixArbiter.hh"
#ifndef __MATRIXARBITER_H__
#define __MATRIXARBITER_H__
-#include "mem/ruby/network/orion/Type.hh"
-
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
+#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cmath>
+#include <iostream>
#include "mem/ruby/network/orion/Allocator/RRArbiter.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/FlipFlop.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
#ifndef __RRARBITER_H__
#define __RRARBITER_H__
-#include "mem/ruby/network/orion/Type.hh"
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
+#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
-#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
-#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
+#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
using namespace std;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
-#include <cstdlib>
#include <cmath>
+#include <cstdlib>
+#include <iostream>
-#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
-#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/Allocator/Arbiter.hh"
+#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
using namespace std;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
-#include "mem/ruby/network/orion/OrionConfig.hh"
-#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/Buffer/Register.hh"
+#include "mem/ruby/network/orion/Buffer/SRAM.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
#ifndef __DECODERUNIT_H__
#define __DECODERUNIT_H__
-#include "mem/ruby/network/orion/Type.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
+#include "mem/ruby/network/orion/Type.hh"
class DecoderUnit
{
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/OutdrvUnit.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
OutdrvUnit::OutdrvUnit(
const string& outdrv_model_str_,
#include "base/misc.hh"
#include "mem/ruby/network/orion/Buffer/PrechargeUnit.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
PrechargeUnit::PrechargeUnit(
const string& pre_model_str_,
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/Buffer/Register.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/FlipFlop.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
-#include <cmath>
#include <cassert>
+#include <cmath>
+#include <iostream>
-#include "mem/ruby/network/orion/Buffer/SRAM.hh"
-#include "mem/ruby/network/orion/Buffer/OutdrvUnit.hh"
#include "mem/ruby/network/orion/Buffer/AmpUnit.hh"
#include "mem/ruby/network/orion/Buffer/BitlineUnit.hh"
+#include "mem/ruby/network/orion/Buffer/DecoderUnit.hh"
#include "mem/ruby/network/orion/Buffer/MemUnit.hh"
+#include "mem/ruby/network/orion/Buffer/OutdrvUnit.hh"
#include "mem/ruby/network/orion/Buffer/PrechargeUnit.hh"
+#include "mem/ruby/network/orion/Buffer/SRAM.hh"
#include "mem/ruby/network/orion/Buffer/WordlineUnit.hh"
-#include "mem/ruby/network/orion/Buffer/DecoderUnit.hh"
using namespace std;
#ifndef __SRAM_H__
#define __SRAM_H__
-#include "mem/ruby/network/orion/Type.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
+#include "mem/ruby/network/orion/Type.hh"
class OutdrvUnit;
class AmpUnit;
*/
#include "base/misc.hh"
-#include "mem/ruby/network/orion/Buffer/WordlineUnit.hh"
#include "mem/ruby/network/orion/Buffer/SRAM.hh"
+#include "mem/ruby/network/orion/Buffer/WordlineUnit.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
WordlineUnit::WordlineUnit(
*/
#include "mem/ruby/network/orion/Clock.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/Wire.hh"
Clock::Clock(
#ifndef CONFIGFILE_H
#define CONFIGFILE_H
-#include <string>
-#include <map>
-#include <iostream>
#include <fstream>
+#include <iostream>
+#include <map>
#include <sstream>
+#include <string>
using std::string;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
-#include "mem/ruby/network/orion/TechParameter.hh"
-#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh"
#include "mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/Crossbar/MatrixCrossbar.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#ifndef __MATRIXCROSSBAR_H__
#define __MATRIXCROSSBAR_H__
-#include "mem/ruby/network/orion/Type.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
+#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cmath>
+#include <iostream>
#include "mem/ruby/network/orion/Crossbar/MultreeCrossbar.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#ifndef __MULTREECROSSBAR_H__
#define __MULTREECROSSBAR_H__
-#include "mem/ruby/network/orion/Type.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
+#include "mem/ruby/network/orion/Type.hh"
class TechParameter;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "mem/ruby/network/orion/FlipFlop.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/NetworkPower.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
-#include "mem/ruby/network/orion/OrionRouter.hh"
#include "mem/ruby/network/orion/OrionLink.hh"
+#include "mem/ruby/network/orion/OrionRouter.hh"
double
Router_d::calculate_power()
#ifndef POWER_TRACE_H
#define POWER_TRACE_H
-#include <stdio.h>
-#include <stdlib.h>
-#include <assert.h>
+#include <cassert>
+#include <cstdio>
+#include <cstdlib>
-#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/GarnetNetwork_d.hh"
+#include "mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh"
#include "mem/ruby/network/garnet/fixed-pipeline/Router_d.hh"
//int RW :
#include <iostream>
#include <string>
-#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/ConfigFile.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
#define __ORIONCONFIG_H__
#include <iostream>
-#include <sstream>
#include <map>
+#include <sstream>
#include "mem/ruby/network/orion/Type.hh"
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
-#include "mem/ruby/network/orion/OrionLink.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/OrionLink.hh"
#include "mem/ruby/network/orion/Wire.hh"
using namespace std;
#include <cassert>
-#include "OrionRouter.hh"
-#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
+#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
#include "mem/ruby/network/orion/Buffer/Buffer.hh"
#include "mem/ruby/network/orion/Crossbar/Crossbar.hh"
-#include "mem/ruby/network/orion/Allocator/VCAllocator.hh"
-#include "mem/ruby/network/orion/Allocator/SWAllocator.hh"
#include "mem/ruby/network/orion/Clock.hh"
+#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "OrionRouter.hh"
OrionRouter::OrionRouter(
uint32_t num_in_port_,
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
-#include <string>
#include <cmath>
#include <cstdlib>
+#include <iostream>
+#include <string>
-#include "mem/ruby/network/orion/TechParameter.hh"
#include "mem/ruby/network/orion/OrionConfig.hh"
+#include "mem/ruby/network/orion/TechParameter.hh"
using namespace std;
* Kambiz Samadi (Orion 2.0, UC San Diego)
*/
-#include <iostream>
#include <cmath>
#include <cstdlib>
+#include <iostream>
#include "base/misc.hh"
-#include "mem/ruby/network/orion/Wire.hh"
#include "mem/ruby/network/orion/TechParameter.hh"
+#include "mem/ruby/network/orion/Wire.hh"
using namespace std;
#define __ORION_H__
#include "mem/ruby/network/orion/OrionConfig.hh"
-#include "mem/ruby/network/orion/OrionRouter.hh"
#include "mem/ruby/network/orion/OrionLink.hh"
+#include "mem/ruby/network/orion/OrionRouter.hh"
#endif
#define __MEM_RUBY_NETWORK_SIMPLE_PERFECTSWITCH_HH__
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/protocol/MessageSizeType.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
#include "mem/ruby/network/simple/Switch.hh"
#include "mem/ruby/network/simple/Throttle.hh"
+#include "mem/ruby/network/Network.hh"
using namespace std;
using m5::stl_helpers::deletePointers;
#include "base/cprintf.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/network/simple/Throttle.hh"
+#include "mem/ruby/network/Network.hh"
#include "mem/ruby/slicc_interface/NetworkMessage.hh"
#include "mem/ruby/system/System.hh"
#define __MEM_RUBY_NETWORK_SIMPLE_THROTTLE_HH__
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/protocol/Protocol.hh"
#include "mem/protocol/TopologyType.hh"
#include "mem/ruby/common/NetDest.hh"
-#include "mem/ruby/network/Network.hh"
#include "mem/ruby/network/simple/Topology.hh"
+#include "mem/ruby/network/Network.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "mem/ruby/system/System.hh"
#include <string>
#include <vector>
-#include "mem/protocol/RubyAccessMode.hh"
-#include "mem/protocol/RubyRequestType.hh"
#include "mem/protocol/GenericRequestType.hh"
#include "mem/protocol/PrefetchBit.hh"
+#include "mem/protocol/RubyAccessMode.hh"
+#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/Histogram.hh"
#include "mem/ruby/system/NodeID.hh"
#include "base/stl_helpers.hh"
#include "base/str.hh"
-#include "mem/protocol/RubyRequest.hh"
#include "mem/protocol/MachineType.hh"
#include "mem/protocol/Protocol.hh"
+#include "mem/protocol/RubyRequest.hh"
#include "mem/ruby/network/Network.hh"
#include "mem/ruby/profiler/AddressProfiler.hh"
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/system/System.hh"
-#include "mem/ruby/system/System.hh"
using namespace std;
using m5::stl_helpers::operator<<;
#include <vector>
#include "base/hashmap.hh"
-#include "mem/protocol/RubyAccessMode.hh"
#include "mem/protocol/AccessType.hh"
-#include "mem/protocol/RubyRequestType.hh"
#include "mem/protocol/GenericMachineType.hh"
#include "mem/protocol/GenericRequestType.hh"
#include "mem/protocol/PrefetchBit.hh"
+#include "mem/protocol/RubyAccessMode.hh"
+#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#include <algorithm>
-#include "gzstream.hh"
-
#include "mem/ruby/eventqueue/RubyEventQueue.hh"
#include "mem/ruby/recorder/CacheRecorder.hh"
+#include "gzstream.hh"
using namespace std;
#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Global.hh"
-#include "mem/ruby/system/NodeID.hh"
#include "mem/ruby/recorder/TraceRecord.hh"
+#include "mem/ruby/system/NodeID.hh"
class Address;
class TraceRecord;
#include <iostream>
#include <string>
-#include "gzstream.hh"
-
#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/NodeID.hh"
#include "params/RubyTracer.hh"
#include "sim/sim_object.hh"
+#include "gzstream.hh"
class Address;
class TraceRecord;
#include <iostream>
+#include "mem/protocol/AccessPermission.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
-#include "mem/protocol/AccessPermission.hh"
class DataBlock;
#include <ostream>
-#include "mem/packet.hh"
-#include "mem/protocol/RubyAccessMode.hh"
-#include "mem/protocol/RubyRequestType.hh"
#include "mem/protocol/Message.hh"
#include "mem/protocol/PrefetchBit.hh"
+#include "mem/protocol/RubyAccessMode.hh"
+#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Address.hh"
+#include "mem/packet.hh"
typedef void* RubyPortHandle;
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
#include "mem/ruby/system/CacheMemory.hh"
-
-
#define __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_INCLUDES_HH__
#include "mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh"
-#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
#include "mem/ruby/slicc_interface/RubySlicc_Profiler_interface.hh"
+#include "mem/ruby/slicc_interface/RubySlicc_Util.hh"
#endif // __MEM_RUBY_SLICC_INTERFACE_RUBYSLICC_INCLUDES_HH__
#include "base/hashmap.hh"
#include "mem/protocol/AccessPermission.hh"
-#include "mem/protocol/RubyRequest.hh"
-#include "mem/protocol/RubyRequestType.hh"
#include "mem/protocol/GenericRequestType.hh"
#include "mem/protocol/MachineType.hh"
+#include "mem/protocol/RubyRequest.hh"
+#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/DataBlock.hh"
#include "mem/ruby/common/Global.hh"
#include "arch/x86/insts/microldstop.hh"
#endif // X86_ISA
#include "cpu/testers/rubytest/RubyTester.hh"
-#include "mem/physical.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
#include "mem/ruby/system/RubyPort.hh"
+#include "mem/physical.hh"
RubyPort::RubyPort(const Params *p)
: MemObject(p)
#include <cassert>
#include <string>
-#include "mem/mem_object.hh"
-#include "mem/physical.hh"
#include "mem/protocol/RequestStatus.hh"
#include "mem/ruby/slicc_interface/RubyRequest.hh"
#include "mem/ruby/system/System.hh"
+#include "mem/mem_object.hh"
+#include "mem/physical.hh"
#include "mem/tport.hh"
#include "params/RubyPort.hh"
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "base/str.hh"
#include "base/misc.hh"
+#include "base/str.hh"
#include "cpu/testers/rubytest/RubyTester.hh"
#include "mem/protocol/Protocol.hh"
-#include "mem/protocol/Protocol.hh"
#include "mem/ruby/buffers/MessageBuffer.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/common/SubBlock.hh"
-#include "mem/ruby/slicc_interface/RubyRequest.hh"
#include "mem/ruby/profiler/Profiler.hh"
#include "mem/ruby/recorder/Tracer.hh"
#include "mem/ruby/slicc_interface/AbstractController.hh"
+#include "mem/ruby/slicc_interface/RubyRequest.hh"
#include "mem/ruby/system/CacheMemory.hh"
#include "mem/ruby/system/Sequencer.hh"
#include "mem/ruby/system/System.hh"
#include <iostream>
#include "base/hashmap.hh"
-#include "mem/protocol/RubyAccessMode.hh"
-#include "mem/protocol/RubyRequestType.hh"
#include "mem/protocol/GenericMachineType.hh"
#include "mem/protocol/PrefetchBit.hh"
+#include "mem/protocol/RubyAccessMode.hh"
+#include "mem/protocol/RubyRequestType.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Consumer.hh"
#include "mem/ruby/common/Global.hh"
#define __MEM_RUBY_SYSTEM_WIREBUFFER_HH__
#include <iostream>
-#include <vector>
#include <string>
+#include <vector>
#include "mem/ruby/buffers/MessageBufferNode.hh"
#include "mem/ruby/common/Global.hh"
#include "params/RubyWireBuffer.hh"
#include "sim/sim_object.hh"
-
//////////////////////////////////////////////////////////////////////////////
// This object was written to literally mimic a Wire in Ruby, in the sense
// that there is no way for messages to get reordered en route on the WireBuffer.
#include <sstream>
#include <string>
-#include "params/$c_ident.hh"
-
-#include "mem/ruby/common/Global.hh"
-#include "mem/ruby/common/Consumer.hh"
-#include "mem/ruby/slicc_interface/AbstractController.hh"
+#include "mem/protocol/${ident}_ProfileDumper.hh"
+#include "mem/protocol/${ident}_Profiler.hh"
#include "mem/protocol/TransitionResult.hh"
#include "mem/protocol/Types.hh"
-#include "mem/protocol/${ident}_Profiler.hh"
-#include "mem/protocol/${ident}_ProfileDumper.hh"
+#include "mem/ruby/common/Consumer.hh"
+#include "mem/ruby/common/Global.hh"
+#include "mem/ruby/slicc_interface/AbstractController.hh"
+#include "params/$c_ident.hh"
''')
seen_types = set()
#include "base/cprintf.hh"
#include "mem/protocol/${ident}_Controller.hh"
-#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/${ident}_Event.hh"
+#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
#include "mem/ruby/common/Global.hh"
#include "mem/ruby/slicc_interface/RubySlicc_includes.hh"
#include <cassert>
#include "base/misc.hh"
-#include "mem/ruby/common/Global.hh"
-#include "mem/ruby/slicc_interface/RubySlicc_includes.hh"
#include "mem/protocol/${ident}_Controller.hh"
-#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/${ident}_Event.hh"
+#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
+#include "mem/ruby/common/Global.hh"
+#include "mem/ruby/slicc_interface/RubySlicc_includes.hh"
#include "mem/ruby/system/System.hh"
using namespace std;
#include "base/misc.hh"
#include "base/trace.hh"
-#include "mem/ruby/common/Global.hh"
#include "mem/protocol/${ident}_Controller.hh"
-#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/${ident}_Event.hh"
+#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/Types.hh"
+#include "mem/ruby/common/Global.hh"
#include "mem/ruby/system/System.hh"
#define HASH_FUN(state, event) ((int(state)*${ident}_Event_NUM)+int(event))
#include <iostream>
#include <vector>
-#include "${ident}_Profiler.hh"
#include "${ident}_Event.hh"
+#include "${ident}_Profiler.hh"
typedef std::vector<${ident}_Profiler *> ${ident}_profilers;
#include <cassert>
#include <iostream>
-#include "mem/ruby/common/Global.hh"
-#include "mem/protocol/${ident}_State.hh"
#include "mem/protocol/${ident}_Event.hh"
+#include "mem/protocol/${ident}_State.hh"
+#include "mem/ruby/common/Global.hh"
class ${ident}_Profiler
{
* Declaration of SimpleTimingPort.
*/
-#include "mem/port.hh"
-#include "sim/eventq.hh"
#include <list>
#include <string>
+#include "mem/port.hh"
+#include "sim/eventq.hh"
+
/**
* A simple port for interfacing objects that basically have only
* functional memory behavior (e.g. I/O devices) to the memory system.
#include "base/chunk_generator.hh"
#include "config/the_isa.hh"
+#include "mem/page_table.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
-#include "mem/page_table.hh"
#include "sim/process.hh"
using namespace TheISA;
#ifndef __MEM_VPORT_HH__
#define __MEM_VPORT_HH__
-#include "mem/port_impl.hh"
-#include "config/full_system.hh"
#include "arch/vtophys.hh"
-
+#include "config/full_system.hh"
+#include "mem/port_impl.hh"
/** A class that translates a virtual address to a physical address and then
* calls the above read/write functions. If a thread context is provided the
%module(package="m5.internal") core
%{
-#include "python/swig/pyobject.hh"
-
#include "base/misc.hh"
#include "base/random.hh"
#include "base/socket.hh"
#include "base/types.hh"
+#include "python/swig/pyobject.hh"
#include "sim/core.hh"
extern const char *compileDate;
%}
-%include <stdint.i>
%include <std_string.i>
+%include <stdint.i>
%include "base/types.hh"
%ignore EventQueue::schedule;
%ignore EventQueue::deschedule;
+%include <std_string.i>
+%include <stdint.i>
+
%import "base/fast_alloc.hh"
%import "sim/serialize.hh"
-%include <stdint.i>
-%include <std_string.i>
-
%include "base/types.hh"
-%include "sim/eventq.hh"
%include "python/swig/pyevent.hh"
+%include "sim/eventq.hh"
struct CountedDrainEvent : public Event
{
#include "base/inet.hh"
%}
-%import <stdint.i>
%import <std_string.i>
+%import <stdint.i>
namespace Net {
struct EthAddr
#if FULL_SYSTEM
#include "dev/etherdevice.hh"
-#include "dev/etherobject.hh"
#include "dev/etherint.hh"
+#include "dev/etherobject.hh"
#endif
using namespace std;
%}
// import these files for SWIG to wrap
-%include <stdint.i>
%include <std_string.i>
+%include <stdint.i>
%include "base/types.hh"
%include "sim/sim_object_params.hh"
%include <std_string.i>
%{
-#include "base/statistics.hh"
#include "base/stats/mysql.hh"
#include "base/stats/text.hh"
+#include "base/statistics.hh"
#include "sim/core.hh"
#include "sim/stat_control.hh"
%}
%import "base/stats/types.hh"
+
%include "base/stats/info.hh"
namespace Stats {
#include "sim/system.hh"
%}
-%import "python/swig/sim_object.i"
%import "enums/MemoryMode.hh"
+%import "python/swig/sim_object.i"
class System : public SimObject
{
#include "arch/isa_traits.hh"
#include "base/misc.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
+#include "mem/page_table.hh"
#include "sim/faults.hh"
#include "sim/process.hh"
-#include "mem/page_table.hh"
#if !FULL_SYSTEM
void FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst)
#include "base/refcnt.hh"
#include "base/types.hh"
-#include "sim/fault_fwd.hh"
-#include "sim/stats.hh"
#include "config/full_system.hh"
#include "cpu/static_inst.hh"
+#include "sim/fault_fwd.hh"
+#include "sim/stats.hh"
class ThreadContext;
*/
#include <Python.h>
+
#include <marshal.h>
-#include <signal.h>
+#include <zlib.h>
-#include <list>
+#include <csignal>
#include <iostream>
+#include <list>
#include <string>
-#include <zlib.h>
#include "base/cprintf.hh"
#include "base/misc.hh"
* Ali Saidi
*/
-#include <unistd.h>
#include <fcntl.h>
+#include <unistd.h>
#include <cstdio>
#include <string>
-#include "base/intmath.hh"
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
+#include "base/intmath.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "mem/page_table.hh"
#include "mem/physical.hh"
#include "mem/translating_port.hh"
-#include "params/Process.hh"
#include "params/LiveProcess.hh"
+#include "params/Process.hh"
#include "sim/debug.hh"
#include "sim/process.hh"
#include "sim/process_impl.hh"
#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
-
//This needs to be templated for cases where 32 bit pointers are needed.
template<class AddrType>
void
* Authors: Nathan Binkert
*/
-#include <errno.h>
#include <fcntl.h>
#include <unistd.h>
+#include <cerrno>
#include <fstream>
#include <string>
#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
-#include "cpu/thread_context.hh"
#include "cpu/quiesce_event.hh"
+#include "cpu/thread_context.hh"
#include "params/BaseCPU.hh"
#include "sim/pseudo_inst.hh"
#include "sim/serialize.hh"
* Steve Reinhardt
*/
+#include <sys/stat.h>
#include <sys/time.h>
#include <sys/types.h>
-#include <sys/stat.h>
-#include <errno.h>
+#include <cerrno>
#include <fstream>
#include <list>
#include <string>
#define __SERIALIZE_HH__
-#include <list>
-#include <vector>
#include <iostream>
+#include <list>
#include <map>
+#include <vector>
#include "base/types.hh"
#include "base/hostinfo.hh"
#include "base/statistics.hh"
#include "base/time.hh"
-
#include "config/the_isa.hh"
#if THE_ISA == NO_ISA
#include "arch/noisa/cpu_dummy.hh"
#include <string>
#include "arch/utility.hh"
-#include "sim/syscall_emul.hh"
#include "base/chunk_generator.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
-#include "cpu/thread_context.hh"
#include "cpu/base.hh"
+#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
#include "sim/process.hh"
-#include "sim/system.hh"
#include "sim/sim_exit.hh"
+#include "sim/syscall_emul.hh"
+#include "sim/system.hh"
using namespace std;
using namespace TheISA;
#include <sys/fcntl.h> // for O_BINARY
#endif
#include <sys/stat.h>
-#include <errno.h>
-#include <fcntl.h>
-#include <sys/uio.h>
#include <sys/time.h>
+#include <sys/uio.h>
+#include <fcntl.h>
+#include <cerrno>
#include <string>
#include "base/chunk_generator.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
-#include "mem/translating_port.hh"
#include "mem/page_table.hh"
+#include "mem/translating_port.hh"
#include "sim/byteswap.hh"
-#include "sim/system.hh"
#include "sim/process.hh"
+#include "sim/system.hh"
///
/// System call descriptor.
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
#include "base/trace.hh"
-#include "cpu/thread_context.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
+#include "cpu/thread_context.hh"
#include "mem/mem_object.hh"
#include "mem/physical.hh"
#include "sim/byteswap.hh"
-#include "sim/system.hh"
#include "sim/debug.hh"
+#include "sim/system.hh"
#if FULL_SYSTEM
#include "arch/vtophys.hh"
#include "cpu/thread_context.hh"
#include "mem/page_table.hh"
-#include "sim/process.hh"
#include "sim/faults.hh"
+#include "sim/process.hh"
#include "sim/tlb.hh"
Fault
#ifndef __ARCH_ALPHA_VPTR_HH__
#define __ARCH_ALPHA_VPTR_HH__
-#include "arch/vtophys.hh"
#include "arch/isa_traits.hh"
+#include "arch/vtophys.hh"
#include "mem/vport.hh"
class ThreadContext;
#include <iostream>
#include <list>
-#include <string>
#include <sstream>
+#include <string>
#include "base/cprintf.hh"
#include "base/misc.hh"
#include <iostream>
#include <list>
-#include <string>
#include <sstream>
+#include <string>
#include "base/cprintf.hh"
* Steve Reinhardt
*/
-#include <iostream>
#include <fstream>
+#include <iostream>
#include <string>
#include <vector>
-#include "base/inifile.hh"
#include "base/cprintf.hh"
+#include "base/inifile.hh"
using namespace std;
* Authors: Ali Saidi
*/
-#include <iostream>
#include <cassert>
+#include <iostream>
#include "base/range_map.hh"
#include "base/types.hh"
#include <iostream>
#include <string>
+#include "base/stats/mysql.hh"
+#include "base/stats/text.hh"
#include "base/cprintf.hh"
#include "base/misc.hh"
#include "base/statistics.hh"
-#include "base/stats/text.hh"
-#include "base/stats/mysql.hh"
#include "base/types.hh"
#include "sim/core.hh"
#include "sim/stat_control.hh"
#include <iostream>
-#include "base/str.hh"
#include "base/loader/symtab.hh"
+#include "base/str.hh"
using namespace std;
* Authors: Ali Saidi
*/
-#include <linux/module.h>
+#include <asm/io.h>
+#include <asm/page.h>
+#include <asm/uaccess.h>
#include <linux/config.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
#include <linux/fs.h>
-#include <asm/uaccess.h>
+#include <linux/init.h>
#include <linux/kernel.h>
-#include <asm/io.h>
-#include <asm/page.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
#include <linux/netdevice.h>
#ifdef __i386__
-#include <asm/processor.h>
#include <asm/msr.h>
+#include <asm/processor.h>
#endif
#define DRIVER_AUTHOR "Ali Saidi"
#include <sched.h>
#endif
-#include <inttypes.h>
#include <err.h>
#include <fcntl.h>
+#include <inttypes.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
* Authors: Gabe Black
*/
-#include <iostream>
-#include <iomanip>
-#include <errno.h>
#include <sys/ptrace.h>
#include <stdint.h>
-#include <string.h>
+
+#include <cerrno>
+#include <cstring>
+#include <iomanip>
+#include <iostream>
#include "arch/amd64/tracechild.hh"
#ifndef REGSTATE_AMD64_HH
#define REGSTATE_AMD64_HH
-#include <sys/user.h>
-#include <sys/types.h>
#include <sys/ptrace.h>
+#include <sys/types.h>
+#include <sys/user.h>
+
#include <cassert>
#include <string>
* Gabe Black
*/
-#include <iostream>
-#include <errno.h>
#include <stdint.h>
-#include <cstring>
+
+#include <cerrno>
#include <cstdio>
+#include <cstring>
+#include <iostream>
#include "arch/arm/tracechild.hh"
#ifndef TRACECHILD_ARM_HH
#define TRACECHILD_ARM_HH
+#include <sys/ptrace.h>
+#include <sys/user.h>
+
#include <cassert>
#include <string>
-#include <sys/user.h>
-#include <sys/ptrace.h>
-#include "base/tracechild.hh"
+#include "base/tracechild.hh"
class ARMTraceChild : public TraceChild
{
* Authors: Gabe Black
*/
-#include <iostream>
-#include <errno.h>
#include <sys/ptrace.h>
#include <stdint.h>
+#include <cerrno>
+#include <iostream>
+
#include "arch/i686/tracechild.hh"
using namespace std;
#ifndef REGSTATE_I686_HH
#define REGSTATE_I686_HH
-#include <sys/user.h>
-#include <sys/types.h>
#include <sys/ptrace.h>
+#include <sys/types.h>
+#include <sys/user.h>
+
#include <cassert>
#include <string>
* Authors: Gabe Black
*/
-#include <iostream>
-#include <errno.h>
#include <sys/ptrace.h>
#include <stdint.h>
+#include <cerrno>
+#include <iostream>
+
#include "arch/sparc/tracechild.hh"
using namespace std;
#define TRACECHILD_SPARC_HH
#include <asm-sparc64/reg.h>
+#include <sys/ptrace.h>
+#include <sys/types.h>
+#include <stdint.h>
+
#include <cassert>
#include <ostream>
-#include <stdint.h>
#include <string>
-#include <sys/ptrace.h>
-#include <sys/types.h>
#include "base/tracechild.hh"
#ifndef REGSTATE_H
#define REGSTATE_H
-#include <string>
#include <stdint.h>
+#include <string>
+
class RegState
{
protected:
* Authors: Gabe Black
*/
-#include "base/arch_check.h"
-
-#include <cstring>
-#include <errno.h>
-#include <fstream>
-#include <iostream>
-#include <netdb.h>
#include <netinet/in.h>
-#include <stdio.h>
-#include <string>
#include <sys/ptrace.h>
#include <sys/socket.h>
#include <sys/types.h>
#include <sys/wait.h>
+#include <netdb.h>
#include <unistd.h>
+#include <cerrno>
+#include <cstdio>
+#include <cstring>
+#include <fstream>
+#include <iostream>
+#include <string>
+
+#include "base/arch_check.h"
#include "tracechild.hh"
using namespace std;
* Authors: Gabe Black
*/
-#include "tracechild.hh"
-#include <cstring>
-#include <errno.h>
-#include <iostream>
#include <sys/ptrace.h>
#include <sys/wait.h>
+#include <cerrno>
+#include <cstring>
+#include <iostream>
+
+#include "tracechild.hh"
+
using namespace std;
bool
#include <pcap.h>
}
-#include <dnet.h>
-
#include <arpa/inet.h>
-
-#include <sys/ioctl.h>
-#include <sys/types.h>
-#include <sys/socket.h>
-
#include <netinet/in.h>
#include <netinet/tcp.h>
-
-#include <errno.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <sys/types.h>
+#include <dnet.h>
#include <fcntl.h>
#include <libgen.h>
#include <netdb.h>
#include <poll.h>
-#include <signal.h>
#include <unistd.h>
+#include <cerrno>
+#include <csignal>
#include <list>
#include <string>
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include <sys/types.h>
+#include <arpa/telnet.h>
+#include <netinet/in.h>
#include <sys/socket.h>
#include <sys/termios.h>
#include <sys/time.h>
+#include <sys/types.h>
#include <sys/un.h>
-
-#include <netinet/in.h>
-#include <arpa/telnet.h>
-
#include <err.h>
#include <errno.h>
+#include <fcntl.h>
#include <netdb.h>
#include <poll.h>
#include <stdarg.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
-#include <fcntl.h>
ssize_t atomicio(ssize_t (*)(), int, void *, size_t);
void readwrite(int);