radeon/r200/r600: allow src and dst BOs to be placed in GTT during blit
authorAlex Deucher <alexdeucher@gmail.com>
Mon, 8 Mar 2010 15:13:49 +0000 (10:13 -0500)
committerAlex Deucher <alexdeucher@gmail.com>
Mon, 8 Mar 2010 15:13:49 +0000 (10:13 -0500)
src/mesa/drivers/dri/r200/r200_blit.c
src/mesa/drivers/dri/r600/r600_blit.c
src/mesa/drivers/dri/radeon/radeon_blit.c

index 2c8b3aafe58c21b61172cc04165559313db7462a..307576009342a1c33454244c6812b0c506c460cf 100644 (file)
@@ -215,18 +215,12 @@ static GLboolean validate_buffers(struct r200_context *r200,
     radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs,
-                                        first_elem(&r200->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
index fb8482576139a87b952fb11ca5072bfaaaed1380..244fdc4ffbb2d31917d889302fa7135fd2231a56 100644 (file)
@@ -1536,12 +1536,12 @@ static GLboolean validate_buffers(context_t *rmesa,
     radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                       src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                       src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;
 
@@ -1551,12 +1551,6 @@ static GLboolean validate_buffers(context_t *rmesa,
     if (ret)
         return GL_FALSE;
 
-    ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs,
-                                        first_elem(&rmesa->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
-    if (ret)
-        return GL_FALSE;
-
     return GL_TRUE;
 }
 
index 8c3c2e47667c636a2899adc8b01d06f91ef06fbf..e1e1f215508f0d647f9bd22880156521200dde50 100644 (file)
@@ -208,18 +208,12 @@ static GLboolean validate_buffers(struct r100_context *r100,
     radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs);
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        src_bo, RADEON_GEM_DOMAIN_VRAM, 0);
+                                        src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
     if (ret)
         return GL_FALSE;
 
     ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM);
-    if (ret)
-        return GL_FALSE;
-
-    ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs,
-                                        first_elem(&r100->radeon.dma.reserved)->bo,
-                                        RADEON_GEM_DOMAIN_GTT, 0);
+                                        dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT);
     if (ret)
         return GL_FALSE;