+2001-06-08 H.J. Lu <hjl@gnu.org>
+
+ * config/tc-mips.c (warn_nops): New variable. Set to 0 to
+ disable warning about all NOPS that the assembler generates.
+ (macro): Warn NOPS generated only if warn_nops is not 0.
+ (md_shortopts): Add `n'.
+ (md_parse_option): Set warn_nops to 1 for `n'.
+
2001-06-08 H.J. Lu <hjl@gnu.org>
* config/tc-mips.c (mips_ip): Properly handle illegal operands.
static enum mips_pic_level mips_pic;
+/* Warn about all NOPS that the assembler generates. */
+static int warn_nops = 0;
+
/* 1 if we should generate 32 bit offsets from the GP register in
SVR4_PIC mode. Currently has no meaning in other modes. */
static int mips_big_got;
/* result is always false */
if (! likely)
{
- as_warn (_("Branch %s is always false (nop)"), ip->insn_mo->name);
+ if (warn_nops)
+ as_warn (_("Branch %s is always false (nop)"),
+ ip->insn_mo->name);
macro_build ((char *) NULL, &icnt, NULL, "nop", "", 0);
}
else
{
- as_warn (_("Branch likely %s is always false"), ip->insn_mo->name);
+ if (warn_nops)
+ as_warn (_("Branch likely %s is always false"),
+ ip->insn_mo->name);
macro_build ((char *) NULL, &icnt, &offset_expr, "bnel",
"s,t,p", 0, 0);
}
number_to_chars_littleendian (buf, val, n);
}
\f
-CONST char *md_shortopts = "O::g::G:";
+CONST char *md_shortopts = "nO::g::G:";
struct option md_longopts[] =
{
target_big_endian = 0;
break;
+ case 'n':
+ warn_nops = 1;
+ break;
+
case 'O':
if (arg && arg[1] == '0')
mips_optimize = 1;