* mips-opc.c (mips_builtin_opcodes): Mark prefx and c1

	instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
	cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
	INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ce809d8a62f618c1c0995e27dde7f8dddd46060a..6f55be2083adfe95af5427262209286ca48cadc4 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
+       instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
+       cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
+       INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
+
 2008-04-25  David S. Miller  <davem@davemloft.net>
 
        * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index b0f9d7e9f2fbf9775ffd227d17a71f733760f9ba..63bec4f3dff95475111440c800024f544fc74796 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -184,7 +184,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
    instruction name anyhow.  */
 /* name,    args,      match,      mask,       pinfo,                  pinfo2,         membership */
 {"pref",    "k,o(b)",   0xcc000000, 0xfc000000, RD_b,                  0,              I4_32|G3        },
-{"prefx",   "h,t(b)",  0x4c00000f, 0xfc0007ff, RD_b|RD_t,              0,              I4_33   },
+{"prefx",   "h,t(b)",  0x4c00000f, 0xfc0007ff, RD_b|RD_t|FP_S,         0,              I4_33   },
 {"nop",     "",         0x00000000, 0xffffffff, 0,                     INSN2_ALIAS,    I1      }, /* sll */
 {"ssnop",   "",         0x00000040, 0xffffffff, 0,                     INSN2_ALIAS,    I32|N55 }, /* sll */
 {"ehb",     "",         0x000000c0, 0xffffffff, 0,                     INSN2_ALIAS,    I33     }, /* sll */
@@ -733,11 +733,11 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"ld",      "t,A(b)",  0,    (int) M_LD_AB,    INSN_MACRO,             0,              I1      },
 {"ldc1",    "T,o(b)",  0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      },
 {"ldc1",    "E,o(b)",  0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      },
-{"ldc1",    "T,A(b)",  0,    (int) M_LDC1_AB,  INSN_MACRO,             0,              I2      },
-{"ldc1",    "E,A(b)",  0,    (int) M_LDC1_AB,  INSN_MACRO,             0,              I2      },
+{"ldc1",    "T,A(b)",  0,    (int) M_LDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I2      },
+{"ldc1",    "E,A(b)",  0,    (int) M_LDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I2      },
 {"l.d",     "T,o(b)",  0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D,     0,              I2      }, /* ldc1 */
-{"l.d",     "T,o(b)",  0,    (int) M_L_DOB,    INSN_MACRO,             0,              I1      },
-{"l.d",     "T,A(b)",  0,    (int) M_L_DAB,    INSN_MACRO,             0,              I1      },
+{"l.d",     "T,o(b)",  0,    (int) M_L_DOB,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
+{"l.d",     "T,A(b)",  0,    (int) M_L_DAB,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
 {"ldc2",    "E,o(b)",  0xd8000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I2      },
 {"ldc2",    "E,A(b)",  0,    (int) M_LDC2_AB,  INSN_MACRO,             0,              I2      },
 {"ldc3",    "E,o(b)",  0xdc000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I2      },
@@ -752,10 +752,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"lhu",     "t,o(b)",  0x94000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I1      },
 {"lhu",     "t,A(b)",  0,    (int) M_LHU_AB,   INSN_MACRO,             0,              I1      },
 /* li is at the start of the table.  */
-{"li.d",    "t,F",     0,    (int) M_LI_D,     INSN_MACRO,             0,              I1      },
-{"li.d",    "T,L",     0,    (int) M_LI_DD,    INSN_MACRO,             0,              I1      },
-{"li.s",    "t,f",     0,    (int) M_LI_S,     INSN_MACRO,             0,              I1      },
-{"li.s",    "T,l",     0,    (int) M_LI_SS,    INSN_MACRO,             0,              I1      },
+{"li.d",    "t,F",     0,    (int) M_LI_D,     INSN_MACRO,             INSN2_M_FP_D,   I1      },
+{"li.d",    "T,L",     0,    (int) M_LI_DD,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
+{"li.s",    "t,f",     0,    (int) M_LI_S,     INSN_MACRO,             INSN2_M_FP_S,   I1      },
+{"li.s",    "T,l",     0,    (int) M_LI_SS,    INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"ll",     "t,o(b)",   0xc0000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I2      },
 {"ll",     "t,A(b)",   0,    (int) M_LL_AB,    INSN_MACRO,             0,              I2      },
 {"lld",            "t,o(b)",   0xd0000000, 0xfc000000, LDD|RD_b|WR_t,          0,              I3      },
@@ -768,10 +768,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"lwc0",    "E,A(b)",  0,    (int) M_LWC0_AB,  INSN_MACRO,             0,              I1      },
 {"lwc1",    "T,o(b)",  0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      },
 {"lwc1",    "E,o(b)",  0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      },
-{"lwc1",    "T,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
-{"lwc1",    "E,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
+{"lwc1",    "T,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
+{"lwc1",    "E,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"l.s",     "T,o(b)",  0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S,     0,              I1      }, /* lwc1 */
-{"l.s",     "T,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             0,              I1      },
+{"l.s",     "T,A(b)",  0,    (int) M_LWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"lwc2",    "E,o(b)",  0xc8000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I1      },
 {"lwc2",    "E,A(b)",  0,    (int) M_LWC2_AB,  INSN_MACRO,             0,              I1      },
 {"lwc3",    "E,o(b)",  0xcc000000, 0xfc000000, CLD|RD_b|WR_CC,         0,              I1      },
@@ -1151,15 +1151,15 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"sdbbp",   "B",        0x7000003f, 0xfc00003f, TRAP,                  0,              I32     },
 {"sdc1",    "T,o(b)",  0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
 {"sdc1",    "E,o(b)",  0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
-{"sdc1",    "T,A(b)",  0,    (int) M_SDC1_AB,  INSN_MACRO,             0,              I2      },
-{"sdc1",    "E,A(b)",  0,    (int) M_SDC1_AB,  INSN_MACRO,             0,              I2      },
+{"sdc1",    "T,A(b)",  0,    (int) M_SDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I2      },
+{"sdc1",    "E,A(b)",  0,    (int) M_SDC1_AB,  INSN_MACRO,             INSN2_M_FP_D,   I2      },
 {"sdc2",    "E,o(b)",  0xf8000000, 0xfc000000, SM|RD_C2|RD_b,          0,              I2      },
 {"sdc2",    "E,A(b)",  0,    (int) M_SDC2_AB,  INSN_MACRO,             0,              I2      },
 {"sdc3",    "E,o(b)",  0xfc000000, 0xfc000000, SM|RD_C3|RD_b,          0,              I2      },
 {"sdc3",    "E,A(b)",  0,    (int) M_SDC3_AB,  INSN_MACRO,             0,              I2      },
 {"s.d",     "T,o(b)",  0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D,      0,              I2      },
-{"s.d",     "T,o(b)",  0,    (int) M_S_DOB,    INSN_MACRO,             0,              I1      },
-{"s.d",     "T,A(b)",  0,    (int) M_S_DAB,    INSN_MACRO,             0,              I1      },
+{"s.d",     "T,o(b)",  0,    (int) M_S_DOB,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
+{"s.d",     "T,A(b)",  0,    (int) M_S_DAB,    INSN_MACRO,             INSN2_M_FP_D,   I1      },
 {"sdl",     "t,o(b)",  0xb0000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
 {"sdl",     "t,A(b)",  0,    (int) M_SDL_AB,   INSN_MACRO,             0,              I3      },
 {"sdr",     "t,o(b)",  0xb4000000, 0xfc000000, SM|RD_t|RD_b,           0,              I3      },
@@ -1275,10 +1275,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"swc0",    "E,A(b)",  0,    (int) M_SWC0_AB,  INSN_MACRO,             0,              I1      },
 {"swc1",    "T,o(b)",  0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
 {"swc1",    "E,o(b)",  0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      },
-{"swc1",    "T,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
-{"swc1",    "E,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
+{"swc1",    "T,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
+{"swc1",    "E,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"s.s",     "T,o(b)",  0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S,      0,              I1      }, /* swc1 */
-{"s.s",     "T,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             0,              I1      },
+{"s.s",     "T,A(b)",  0,    (int) M_SWC1_AB,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"swc2",    "E,o(b)",  0xe8000000, 0xfc000000, SM|RD_C2|RD_b,          0,              I1      },
 {"swc2",    "E,A(b)",  0,    (int) M_SWC2_AB,  INSN_MACRO,             0,              I1      },
 {"swc3",    "E,o(b)",  0xec000000, 0xfc000000, SM|RD_C3|RD_b,          0,              I1      },
@@ -1337,10 +1337,10 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"trunc.l.s", "D,S",   0x46000009, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I3_33   },
 {"trunc.w.d", "D,S",   0x4620000d, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I2      },
 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|FP_S|FP_D,    0,              I2      },
-{"trunc.w.d", "D,S,t", 0,    (int) M_TRUNCWD,  INSN_MACRO,             0,              I1      },
+{"trunc.w.d", "D,S,t", 0,    (int) M_TRUNCWD,  INSN_MACRO,             INSN2_M_FP_S|INSN2_M_FP_D, I1 },
 {"trunc.w.s", "D,S",   0x4600000d, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|FP_S,         0,              I2      },
-{"trunc.w.s", "D,S,t", 0,    (int) M_TRUNCWS,  INSN_MACRO,             0,              I1      },
+{"trunc.w.s", "D,S,t", 0,    (int) M_TRUNCWS,  INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"uld",     "t,o(b)",  0,    (int) M_ULD,      INSN_MACRO,             0,              I3      },
 {"uld",     "t,A(b)",  0,    (int) M_ULD_A,    INSN_MACRO,             0,              I3      },
 {"ulh",     "t,o(b)",  0,    (int) M_ULH,      INSN_MACRO,             0,              I1      },
@@ -1927,11 +1927,11 @@ const struct mips_opcode mips_builtin_opcodes[] =
    user to put in nops as necessary.  These are at the end so that the
    disassembler recognizes more specific versions first.  */
 {"c0",      "C",       0x42000000, 0xfe000000, 0,                      0,              I1      },
-{"c1",      "C",       0x46000000, 0xfe000000, 0,                      0,              I1      },
+{"c1",      "C",       0x46000000, 0xfe000000, FP_S,                   0,              I1      },
 {"c2",      "C",       0x4a000000, 0xfe000000, 0,                      0,              I1      },
 {"c3",      "C",       0x4e000000, 0xfe000000, 0,                      0,              I1      },
 {"cop0",     "C",      0,    (int) M_COP0,     INSN_MACRO,             0,              I1      },
-{"cop1",     "C",      0,    (int) M_COP1,     INSN_MACRO,             0,              I1      },
+{"cop1",     "C",      0,    (int) M_COP1,     INSN_MACRO,             INSN2_M_FP_S,   I1      },
 {"cop2",     "C",      0,    (int) M_COP2,     INSN_MACRO,             0,              I1      },
 {"cop3",     "C",      0,    (int) M_COP3,     INSN_MACRO,             0,              I1      }
 };