i915: Enable LOD preclamping on 8xx like on 915/965.
authorEric Anholt <eric@anholt.net>
Wed, 5 Jan 2011 22:48:05 +0000 (14:48 -0800)
committerEric Anholt <eric@anholt.net>
Wed, 5 Jan 2011 22:50:27 +0000 (14:50 -0800)
Fixes lodclamp-between and lodclamp-between-max.

src/mesa/drivers/dri/i915/i830_reg.h
src/mesa/drivers/dri/i915/i830_texstate.c

index 4144249070639e3cbbd7ddc8609693b214a03887..99ee1bb4e907a54f62f58324244a5a29a7010726 100644 (file)
 #define TM0S2_VERITCAL_LINE_STRIDE_OFF  (1<<12)
 #define TM0S2_OUTPUT_CHAN_SHIFT         10
 #define TM0S2_OUTPUT_CHAN_MASK          (3<<10)
+#define TM0S2_BASE_MIP_LEVEL_SHIFT      1
+#define TM0S2_LOD_PRECLAMP              (1 << 0)
 
 #define TM0S3_MIP_FILTER_MASK           (0x3<<30)
 #define TM0S3_MIP_FILTER_SHIFT          30
index 8340cd8c3332f281475b7f412d2a04c8a2898bb2..26ce5c375b687493fa9f7780d2e404293c18771a 100644 (file)
@@ -266,6 +266,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
         maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11.75), 2);
         maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 3) >> 2);
         state[I830_TEXREG_TM0S3] |= maxlod_fixed << TM0S3_MIN_MIP_SHIFT;
+        state[I830_TEXREG_TM0S2] |= TM0S2_LOD_PRECLAMP;
       } else {
         maxlod_fixed = U_FIXED(CLAMP(maxlod, 0.0, 11), 0);
         maxlod_fixed = MAX2(maxlod_fixed, (minlod_fixed + 15) >> 4);