'PovrayBench': [SysConfig('povray-bench.rcS', '512MB', 'povray.img')],
'PovrayAutumn': [SysConfig('povray-autumn.rcS', '512MB', 'povray.img')],
- 'NetperfStream': [SysConfig('netperf-stream-client.rcS'),
+ 'NetperfStream': [SysConfig('netperf-stream-client.rcS'),
SysConfig('netperf-server.rcS')],
- 'NetperfStreamUdp': [SysConfig('netperf-stream-udp-client.rcS'),
+ 'NetperfStreamUdp': [SysConfig('netperf-stream-udp-client.rcS'),
SysConfig('netperf-server.rcS')],
- 'NetperfUdpLocal': [SysConfig('netperf-stream-udp-local.rcS')],
- 'NetperfStreamNT': [SysConfig('netperf-stream-nt-client.rcS'),
+ 'NetperfUdpLocal': [SysConfig('netperf-stream-udp-local.rcS')],
+ 'NetperfStreamNT': [SysConfig('netperf-stream-nt-client.rcS'),
SysConfig('netperf-server.rcS')],
- 'NetperfMaerts': [SysConfig('netperf-maerts-client.rcS'),
+ 'NetperfMaerts': [SysConfig('netperf-maerts-client.rcS'),
SysConfig('netperf-server.rcS')],
- 'SurgeStandard': [SysConfig('surge-server.rcS', '512MB'),
+ 'SurgeStandard': [SysConfig('surge-server.rcS', '512MB'),
SysConfig('surge-client.rcS', '256MB')],
- 'SurgeSpecweb': [SysConfig('spec-surge-server.rcS', '512MB'),
+ 'SurgeSpecweb': [SysConfig('spec-surge-server.rcS', '512MB'),
SysConfig('spec-surge-client.rcS', '256MB')],
- 'Nhfsstone': [SysConfig('nfs-server-nhfsstone.rcS', '512MB'),
+ 'Nhfsstone': [SysConfig('nfs-server-nhfsstone.rcS', '512MB'),
SysConfig('nfs-client-nhfsstone.rcS')],
- 'Nfs': [SysConfig('nfs-server.rcS', '900MB'),
+ 'Nfs': [SysConfig('nfs-server.rcS', '900MB'),
SysConfig('nfs-client-dbench.rcS')],
- 'NfsTcp': [SysConfig('nfs-server.rcS', '900MB'),
+ 'NfsTcp': [SysConfig('nfs-server.rcS', '900MB'),
SysConfig('nfs-client-tcp.rcS')],
- 'IScsiInitiator': [SysConfig('iscsi-client.rcS', '512MB'),
+ 'IScsiInitiator': [SysConfig('iscsi-client.rcS', '512MB'),
SysConfig('iscsi-server.rcS', '512MB')],
- 'IScsiTarget': [SysConfig('iscsi-server.rcS', '512MB'),
+ 'IScsiTarget': [SysConfig('iscsi-server.rcS', '512MB'),
SysConfig('iscsi-client.rcS', '512MB')],
- 'Validation': [SysConfig('iscsi-server.rcS', '512MB'),
+ 'Validation': [SysConfig('iscsi-server.rcS', '512MB'),
SysConfig('iscsi-client.rcS', '512MB')],
- 'Ping': [SysConfig('ping-server.rcS',),
+ 'Ping': [SysConfig('ping-server.rcS',),
SysConfig('ping-client.rcS')],
- 'ValAccDelay': [SysConfig('devtime.rcS', '512MB')],
- 'ValAccDelay2': [SysConfig('devtimewmr.rcS', '512MB')],
- 'ValMemLat': [SysConfig('micro_memlat.rcS', '512MB')],
- 'ValMemLat2MB': [SysConfig('micro_memlat2mb.rcS', '512MB')],
- 'ValMemLat8MB': [SysConfig('micro_memlat8mb.rcS', '512MB')],
- 'ValMemLat': [SysConfig('micro_memlat8.rcS', '512MB')],
- 'ValTlbLat': [SysConfig('micro_tlblat.rcS', '512MB')],
- 'ValSysLat': [SysConfig('micro_syscall.rcS', '512MB')],
- 'ValCtxLat': [SysConfig('micro_ctx.rcS', '512MB')],
- 'ValStream': [SysConfig('micro_stream.rcS', '512MB')],
- 'ValStreamScale': [SysConfig('micro_streamscale.rcS', '512MB')],
- 'ValStreamCopy': [SysConfig('micro_streamcopy.rcS', '512MB')],
+ 'ValAccDelay': [SysConfig('devtime.rcS', '512MB')],
+ 'ValAccDelay2': [SysConfig('devtimewmr.rcS', '512MB')],
+ 'ValMemLat': [SysConfig('micro_memlat.rcS', '512MB')],
+ 'ValMemLat2MB': [SysConfig('micro_memlat2mb.rcS', '512MB')],
+ 'ValMemLat8MB': [SysConfig('micro_memlat8mb.rcS', '512MB')],
+ 'ValMemLat': [SysConfig('micro_memlat8.rcS', '512MB')],
+ 'ValTlbLat': [SysConfig('micro_tlblat.rcS', '512MB')],
+ 'ValSysLat': [SysConfig('micro_syscall.rcS', '512MB')],
+ 'ValCtxLat': [SysConfig('micro_ctx.rcS', '512MB')],
+ 'ValStream': [SysConfig('micro_stream.rcS', '512MB')],
+ 'ValStreamScale': [SysConfig('micro_streamscale.rcS', '512MB')],
+ 'ValStreamCopy': [SysConfig('micro_streamcopy.rcS', '512MB')],
'MutexTest': [SysConfig('mutex-test.rcS', '128MB')],
/// Funky Alpha 64-bit a.out header used for PAL code.
///
struct aout_exechdr {
- uint16_t magic; ///< magic number
- uint16_t vstamp; ///< version stamp?
- uint16_t bldrev; ///< ???
- uint16_t padcell; ///< padding
- uint64_t tsize; ///< text segment size
- uint64_t dsize; ///< data segment size
- uint64_t bsize; ///< bss segment size
- uint64_t entry; ///< entry point
- uint64_t text_start; ///< text base address
- uint64_t data_start; ///< data base address
- uint64_t bss_start; ///< bss base address
- uint32_t gprmask; ///< GPR mask (unused, AFAIK)
- uint32_t fprmask; ///< FPR mask (unused, AFAIK)
- uint64_t gp_value; ///< global pointer reg value
+ uint16_t magic; ///< magic number
+ uint16_t vstamp; ///< version stamp?
+ uint16_t bldrev; ///< ???
+ uint16_t padcell; ///< padding
+ uint64_t tsize; ///< text segment size
+ uint64_t dsize; ///< data segment size
+ uint64_t bsize; ///< bss segment size
+ uint64_t entry; ///< entry point
+ uint64_t text_start; ///< text base address
+ uint64_t data_start; ///< data base address
+ uint64_t bss_start; ///< bss base address
+ uint32_t gprmask; ///< GPR mask (unused, AFAIK)
+ uint32_t fprmask; ///< FPR mask (unused, AFAIK)
+ uint64_t gp_value; ///< global pointer reg value
};
-#define AOUT_LDPGSZ 8192
+#define AOUT_LDPGSZ 8192
-#define N_GETMAGIC(ex) ((ex).magic)
+#define N_GETMAGIC(ex) ((ex).magic)
#define N_BADMAX
-#define N_TXTADDR(ex) ((ex).text_start)
-#define N_DATADDR(ex) ((ex).data_start)
-#define N_BSSADDR(ex) ((ex).bss_start)
+#define N_TXTADDR(ex) ((ex).text_start)
+#define N_DATADDR(ex) ((ex).data_start)
+#define N_BSSADDR(ex) ((ex).bss_start)
-#define N_TXTOFF(ex) \
+#define N_TXTOFF(ex) \
(N_GETMAGIC(ex) == ZMAGIC ? 0 : sizeof(struct aout_exechdr))
-#define N_DATOFF(ex) N_ALIGN(ex, N_TXTOFF(ex) + (ex).tsize)
+#define N_DATOFF(ex) N_ALIGN(ex, N_TXTOFF(ex) + (ex).tsize)
#endif /* !__AOUT_MACHDEP_H__*/
AlphaISA::MiscReg
AlphaISA::MiscRegFile::readIpr(int idx, ThreadContext *tc)
{
- uint64_t retval = 0; // return value, default 0
+ uint64_t retval = 0; // return value, default 0
switch (idx) {
case AlphaISA::IPR_PALtemp0:
public:
union {
- uint64_t q[NumFloatRegs]; // integer qword view
- double d[NumFloatRegs]; // double-precision floating point view
+ uint64_t q[NumFloatRegs]; // integer qword view
+ double d[NumFloatRegs]; // double-precision floating point view
};
void serialize(std::ostream &os);
md_ipr_names MiscRegIndexToIpr[NumInternalProcRegs] =
{
//Write only
- RAW_IPR_HWINT_CLR, // H/W interrupt clear register
- RAW_IPR_SL_XMIT, // serial line transmit register
+ RAW_IPR_HWINT_CLR, // H/W interrupt clear register
+ RAW_IPR_SL_XMIT, // serial line transmit register
RAW_IPR_DC_FLUSH,
- RAW_IPR_IC_FLUSH, // instruction cache flush control
- RAW_IPR_ALT_MODE, // alternate mode register
- RAW_IPR_DTB_IA, // DTLB invalidate all register
- RAW_IPR_DTB_IAP, // DTLB invalidate all process register
- RAW_IPR_ITB_IA, // ITLB invalidate all register
- RAW_IPR_ITB_IAP, // ITLB invalidate all process register
+ RAW_IPR_IC_FLUSH, // instruction cache flush control
+ RAW_IPR_ALT_MODE, // alternate mode register
+ RAW_IPR_DTB_IA, // DTLB invalidate all register
+ RAW_IPR_DTB_IAP, // DTLB invalidate all process register
+ RAW_IPR_ITB_IA, // ITLB invalidate all register
+ RAW_IPR_ITB_IAP, // ITLB invalidate all process register
//Read only
- RAW_IPR_INTID, // interrupt ID register
- RAW_IPR_SL_RCV, // serial line receive register
- RAW_IPR_MM_STAT, // data MMU fault status register
- RAW_IPR_ITB_PTE_TEMP, // ITLB page table entry temp register
- RAW_IPR_DTB_PTE_TEMP, // DTLB page table entry temporary register
+ RAW_IPR_INTID, // interrupt ID register
+ RAW_IPR_SL_RCV, // serial line receive register
+ RAW_IPR_MM_STAT, // data MMU fault status register
+ RAW_IPR_ITB_PTE_TEMP, // ITLB page table entry temp register
+ RAW_IPR_DTB_PTE_TEMP, // DTLB page table entry temporary register
- RAW_IPR_ISR, // interrupt summary register
- RAW_IPR_ITB_TAG, // ITLB tag register
- RAW_IPR_ITB_PTE, // ITLB page table entry register
- RAW_IPR_ITB_ASN, // ITLB address space register
- RAW_IPR_ITB_IS, // ITLB invalidate select register
- RAW_IPR_SIRR, // software interrupt request register
- RAW_IPR_ASTRR, // asynchronous system trap request register
- RAW_IPR_ASTER, // asynchronous system trap enable register
- RAW_IPR_EXC_ADDR, // exception address register
- RAW_IPR_EXC_SUM, // exception summary register
- RAW_IPR_EXC_MASK, // exception mask register
- RAW_IPR_PAL_BASE, // PAL base address register
- RAW_IPR_ICM, // instruction current mode
- RAW_IPR_IPLR, // interrupt priority level register
- RAW_IPR_IFAULT_VA_FORM, // formatted faulting virtual addr register
- RAW_IPR_IVPTBR, // virtual page table base register
- RAW_IPR_ICSR, // instruction control and status register
- RAW_IPR_IC_PERR_STAT, // inst cache parity error status register
- RAW_IPR_PMCTR, // performance counter register
+ RAW_IPR_ISR, // interrupt summary register
+ RAW_IPR_ITB_TAG, // ITLB tag register
+ RAW_IPR_ITB_PTE, // ITLB page table entry register
+ RAW_IPR_ITB_ASN, // ITLB address space register
+ RAW_IPR_ITB_IS, // ITLB invalidate select register
+ RAW_IPR_SIRR, // software interrupt request register
+ RAW_IPR_ASTRR, // asynchronous system trap request register
+ RAW_IPR_ASTER, // asynchronous system trap enable register
+ RAW_IPR_EXC_ADDR, // exception address register
+ RAW_IPR_EXC_SUM, // exception summary register
+ RAW_IPR_EXC_MASK, // exception mask register
+ RAW_IPR_PAL_BASE, // PAL base address register
+ RAW_IPR_ICM, // instruction current mode
+ RAW_IPR_IPLR, // interrupt priority level register
+ RAW_IPR_IFAULT_VA_FORM, // formatted faulting virtual addr register
+ RAW_IPR_IVPTBR, // virtual page table base register
+ RAW_IPR_ICSR, // instruction control and status register
+ RAW_IPR_IC_PERR_STAT, // inst cache parity error status register
+ RAW_IPR_PMCTR, // performance counter register
// PAL temporary registers...
// register meanings gleaned from osfpal.s source code
- RAW_IPR_PALtemp0, // local scratch
- RAW_IPR_PALtemp1, // local scratch
- RAW_IPR_PALtemp2, // entUna
- RAW_IPR_PALtemp3, // CPU specific impure area pointer
- RAW_IPR_PALtemp4, // memory management temp
- RAW_IPR_PALtemp5, // memory management temp
- RAW_IPR_PALtemp6, // memory management temp
- RAW_IPR_PALtemp7, // entIF
- RAW_IPR_PALtemp8, // intmask
- RAW_IPR_PALtemp9, // entSys
- RAW_IPR_PALtemp10, // ??
- RAW_IPR_PALtemp11, // entInt
- RAW_IPR_PALtemp12, // entArith
- RAW_IPR_PALtemp13, // reserved for platform specific PAL
- RAW_IPR_PALtemp14, // reserved for platform specific PAL
- RAW_IPR_PALtemp15, // reserved for platform specific PAL
- RAW_IPR_PALtemp16, // scratch / whami<7:0> / mces<4:0>
- RAW_IPR_PALtemp17, // sysval
- RAW_IPR_PALtemp18, // usp
- RAW_IPR_PALtemp19, // ksp
- RAW_IPR_PALtemp20, // PTBR
- RAW_IPR_PALtemp21, // entMM
- RAW_IPR_PALtemp22, // kgp
- RAW_IPR_PALtemp23, // PCBB
+ RAW_IPR_PALtemp0, // local scratch
+ RAW_IPR_PALtemp1, // local scratch
+ RAW_IPR_PALtemp2, // entUna
+ RAW_IPR_PALtemp3, // CPU specific impure area pointer
+ RAW_IPR_PALtemp4, // memory management temp
+ RAW_IPR_PALtemp5, // memory management temp
+ RAW_IPR_PALtemp6, // memory management temp
+ RAW_IPR_PALtemp7, // entIF
+ RAW_IPR_PALtemp8, // intmask
+ RAW_IPR_PALtemp9, // entSys
+ RAW_IPR_PALtemp10, // ??
+ RAW_IPR_PALtemp11, // entInt
+ RAW_IPR_PALtemp12, // entArith
+ RAW_IPR_PALtemp13, // reserved for platform specific PAL
+ RAW_IPR_PALtemp14, // reserved for platform specific PAL
+ RAW_IPR_PALtemp15, // reserved for platform specific PAL
+ RAW_IPR_PALtemp16, // scratch / whami<7:0> / mces<4:0>
+ RAW_IPR_PALtemp17, // sysval
+ RAW_IPR_PALtemp18, // usp
+ RAW_IPR_PALtemp19, // ksp
+ RAW_IPR_PALtemp20, // PTBR
+ RAW_IPR_PALtemp21, // entMM
+ RAW_IPR_PALtemp22, // kgp
+ RAW_IPR_PALtemp23, // PCBB
- RAW_IPR_DTB_ASN, // DTLB address space number register
- RAW_IPR_DTB_CM, // DTLB current mode register
- RAW_IPR_DTB_TAG, // DTLB tag register
- RAW_IPR_DTB_PTE, // DTLB page table entry register
+ RAW_IPR_DTB_ASN, // DTLB address space number register
+ RAW_IPR_DTB_CM, // DTLB current mode register
+ RAW_IPR_DTB_TAG, // DTLB tag register
+ RAW_IPR_DTB_PTE, // DTLB page table entry register
- RAW_IPR_VA, // fault virtual address register
- RAW_IPR_VA_FORM, // formatted virtual address register
- RAW_IPR_MVPTBR, // MTU virtual page table base register
- RAW_IPR_DTB_IS, // DTLB invalidate single register
- RAW_IPR_CC, // cycle counter register
- RAW_IPR_CC_CTL, // cycle counter control register
- RAW_IPR_MCSR, // MTU control register
+ RAW_IPR_VA, // fault virtual address register
+ RAW_IPR_VA_FORM, // formatted virtual address register
+ RAW_IPR_MVPTBR, // MTU virtual page table base register
+ RAW_IPR_DTB_IS, // DTLB invalidate single register
+ RAW_IPR_CC, // cycle counter register
+ RAW_IPR_CC_CTL, // cycle counter control register
+ RAW_IPR_MCSR, // MTU control register
- RAW_IPR_DC_PERR_STAT, // Dcache parity error status register
- RAW_IPR_DC_TEST_CTL, // Dcache test tag control register
- RAW_IPR_DC_TEST_TAG, // Dcache test tag register
+ RAW_IPR_DC_PERR_STAT, // Dcache parity error status register
+ RAW_IPR_DC_TEST_CTL, // Dcache test tag control register
+ RAW_IPR_DC_TEST_TAG, // Dcache test tag register
RAW_IPR_DC_TEST_TAG_TEMP, // Dcache test tag temporary register
- RAW_IPR_DC_MODE, // Dcache mode register
- RAW_IPR_MAF_MODE // miss address file mode register
+ RAW_IPR_DC_MODE, // Dcache mode register
+ RAW_IPR_MAF_MODE // miss address file mode register
};
int IprToMiscRegIndex[MaxInternalProcRegs];
//
enum md_ipr_names
{
- RAW_IPR_ISR = 0x100, // interrupt summary register
- RAW_IPR_ITB_TAG = 0x101, // ITLB tag register
- RAW_IPR_ITB_PTE = 0x102, // ITLB page table entry register
- RAW_IPR_ITB_ASN = 0x103, // ITLB address space register
- RAW_IPR_ITB_PTE_TEMP = 0x104, // ITLB page table entry temp register
- RAW_IPR_ITB_IA = 0x105, // ITLB invalidate all register
- RAW_IPR_ITB_IAP = 0x106, // ITLB invalidate all process register
- RAW_IPR_ITB_IS = 0x107, // ITLB invalidate select register
- RAW_IPR_SIRR = 0x108, // software interrupt request register
- RAW_IPR_ASTRR = 0x109, // asynchronous system trap request register
- RAW_IPR_ASTER = 0x10a, // asynchronous system trap enable register
- RAW_IPR_EXC_ADDR = 0x10b, // exception address register
- RAW_IPR_EXC_SUM = 0x10c, // exception summary register
- RAW_IPR_EXC_MASK = 0x10d, // exception mask register
- RAW_IPR_PAL_BASE = 0x10e, // PAL base address register
- RAW_IPR_ICM = 0x10f, // instruction current mode
- RAW_IPR_IPLR = 0x110, // interrupt priority level register
- RAW_IPR_INTID = 0x111, // interrupt ID register
- RAW_IPR_IFAULT_VA_FORM = 0x112, // formatted faulting virtual addr register
- RAW_IPR_IVPTBR = 0x113, // virtual page table base register
- RAW_IPR_HWINT_CLR = 0x115, // H/W interrupt clear register
- RAW_IPR_SL_XMIT = 0x116, // serial line transmit register
- RAW_IPR_SL_RCV = 0x117, // serial line receive register
- RAW_IPR_ICSR = 0x118, // instruction control and status register
- RAW_IPR_IC_FLUSH = 0x119, // instruction cache flush control
- RAW_IPR_IC_PERR_STAT = 0x11a, // inst cache parity error status register
- RAW_IPR_PMCTR = 0x11c, // performance counter register
+ RAW_IPR_ISR = 0x100, // interrupt summary register
+ RAW_IPR_ITB_TAG = 0x101, // ITLB tag register
+ RAW_IPR_ITB_PTE = 0x102, // ITLB page table entry register
+ RAW_IPR_ITB_ASN = 0x103, // ITLB address space register
+ RAW_IPR_ITB_PTE_TEMP = 0x104, // ITLB page table entry temp register
+ RAW_IPR_ITB_IA = 0x105, // ITLB invalidate all register
+ RAW_IPR_ITB_IAP = 0x106, // ITLB invalidate all process register
+ RAW_IPR_ITB_IS = 0x107, // ITLB invalidate select register
+ RAW_IPR_SIRR = 0x108, // software interrupt request register
+ RAW_IPR_ASTRR = 0x109, // asynchronous system trap request register
+ RAW_IPR_ASTER = 0x10a, // asynchronous system trap enable register
+ RAW_IPR_EXC_ADDR = 0x10b, // exception address register
+ RAW_IPR_EXC_SUM = 0x10c, // exception summary register
+ RAW_IPR_EXC_MASK = 0x10d, // exception mask register
+ RAW_IPR_PAL_BASE = 0x10e, // PAL base address register
+ RAW_IPR_ICM = 0x10f, // instruction current mode
+ RAW_IPR_IPLR = 0x110, // interrupt priority level register
+ RAW_IPR_INTID = 0x111, // interrupt ID register
+ RAW_IPR_IFAULT_VA_FORM = 0x112, // formatted faulting virtual addr register
+ RAW_IPR_IVPTBR = 0x113, // virtual page table base register
+ RAW_IPR_HWINT_CLR = 0x115, // H/W interrupt clear register
+ RAW_IPR_SL_XMIT = 0x116, // serial line transmit register
+ RAW_IPR_SL_RCV = 0x117, // serial line receive register
+ RAW_IPR_ICSR = 0x118, // instruction control and status register
+ RAW_IPR_IC_FLUSH = 0x119, // instruction cache flush control
+ RAW_IPR_IC_PERR_STAT = 0x11a, // inst cache parity error status register
+ RAW_IPR_PMCTR = 0x11c, // performance counter register
// PAL temporary registers...
// register meanings gleaned from osfpal.s source code
- RAW_IPR_PALtemp0 = 0x140, // local scratch
- RAW_IPR_PALtemp1 = 0x141, // local scratch
- RAW_IPR_PALtemp2 = 0x142, // entUna
- RAW_IPR_PALtemp3 = 0x143, // CPU specific impure area pointer
- RAW_IPR_PALtemp4 = 0x144, // memory management temp
- RAW_IPR_PALtemp5 = 0x145, // memory management temp
- RAW_IPR_PALtemp6 = 0x146, // memory management temp
- RAW_IPR_PALtemp7 = 0x147, // entIF
- RAW_IPR_PALtemp8 = 0x148, // intmask
- RAW_IPR_PALtemp9 = 0x149, // entSys
- RAW_IPR_PALtemp10 = 0x14a, // ??
- RAW_IPR_PALtemp11 = 0x14b, // entInt
- RAW_IPR_PALtemp12 = 0x14c, // entArith
- RAW_IPR_PALtemp13 = 0x14d, // reserved for platform specific PAL
- RAW_IPR_PALtemp14 = 0x14e, // reserved for platform specific PAL
- RAW_IPR_PALtemp15 = 0x14f, // reserved for platform specific PAL
- RAW_IPR_PALtemp16 = 0x150, // scratch / whami<7:0> / mces<4:0>
- RAW_IPR_PALtemp17 = 0x151, // sysval
- RAW_IPR_PALtemp18 = 0x152, // usp
- RAW_IPR_PALtemp19 = 0x153, // ksp
- RAW_IPR_PALtemp20 = 0x154, // PTBR
- RAW_IPR_PALtemp21 = 0x155, // entMM
- RAW_IPR_PALtemp22 = 0x156, // kgp
- RAW_IPR_PALtemp23 = 0x157, // PCBB
-
- RAW_IPR_DTB_ASN = 0x200, // DTLB address space number register
- RAW_IPR_DTB_CM = 0x201, // DTLB current mode register
- RAW_IPR_DTB_TAG = 0x202, // DTLB tag register
- RAW_IPR_DTB_PTE = 0x203, // DTLB page table entry register
- RAW_IPR_DTB_PTE_TEMP = 0x204, // DTLB page table entry temporary register
-
- RAW_IPR_MM_STAT = 0x205, // data MMU fault status register
- RAW_IPR_VA = 0x206, // fault virtual address register
- RAW_IPR_VA_FORM = 0x207, // formatted virtual address register
- RAW_IPR_MVPTBR = 0x208, // MTU virtual page table base register
- RAW_IPR_DTB_IAP = 0x209, // DTLB invalidate all process register
- RAW_IPR_DTB_IA = 0x20a, // DTLB invalidate all register
- RAW_IPR_DTB_IS = 0x20b, // DTLB invalidate single register
- RAW_IPR_ALT_MODE = 0x20c, // alternate mode register
- RAW_IPR_CC = 0x20d, // cycle counter register
- RAW_IPR_CC_CTL = 0x20e, // cycle counter control register
- RAW_IPR_MCSR = 0x20f, // MTU control register
+ RAW_IPR_PALtemp0 = 0x140, // local scratch
+ RAW_IPR_PALtemp1 = 0x141, // local scratch
+ RAW_IPR_PALtemp2 = 0x142, // entUna
+ RAW_IPR_PALtemp3 = 0x143, // CPU specific impure area pointer
+ RAW_IPR_PALtemp4 = 0x144, // memory management temp
+ RAW_IPR_PALtemp5 = 0x145, // memory management temp
+ RAW_IPR_PALtemp6 = 0x146, // memory management temp
+ RAW_IPR_PALtemp7 = 0x147, // entIF
+ RAW_IPR_PALtemp8 = 0x148, // intmask
+ RAW_IPR_PALtemp9 = 0x149, // entSys
+ RAW_IPR_PALtemp10 = 0x14a, // ??
+ RAW_IPR_PALtemp11 = 0x14b, // entInt
+ RAW_IPR_PALtemp12 = 0x14c, // entArith
+ RAW_IPR_PALtemp13 = 0x14d, // reserved for platform specific PAL
+ RAW_IPR_PALtemp14 = 0x14e, // reserved for platform specific PAL
+ RAW_IPR_PALtemp15 = 0x14f, // reserved for platform specific PAL
+ RAW_IPR_PALtemp16 = 0x150, // scratch / whami<7:0> / mces<4:0>
+ RAW_IPR_PALtemp17 = 0x151, // sysval
+ RAW_IPR_PALtemp18 = 0x152, // usp
+ RAW_IPR_PALtemp19 = 0x153, // ksp
+ RAW_IPR_PALtemp20 = 0x154, // PTBR
+ RAW_IPR_PALtemp21 = 0x155, // entMM
+ RAW_IPR_PALtemp22 = 0x156, // kgp
+ RAW_IPR_PALtemp23 = 0x157, // PCBB
+
+ RAW_IPR_DTB_ASN = 0x200, // DTLB address space number register
+ RAW_IPR_DTB_CM = 0x201, // DTLB current mode register
+ RAW_IPR_DTB_TAG = 0x202, // DTLB tag register
+ RAW_IPR_DTB_PTE = 0x203, // DTLB page table entry register
+ RAW_IPR_DTB_PTE_TEMP = 0x204, // DTLB page table entry temporary register
+
+ RAW_IPR_MM_STAT = 0x205, // data MMU fault status register
+ RAW_IPR_VA = 0x206, // fault virtual address register
+ RAW_IPR_VA_FORM = 0x207, // formatted virtual address register
+ RAW_IPR_MVPTBR = 0x208, // MTU virtual page table base register
+ RAW_IPR_DTB_IAP = 0x209, // DTLB invalidate all process register
+ RAW_IPR_DTB_IA = 0x20a, // DTLB invalidate all register
+ RAW_IPR_DTB_IS = 0x20b, // DTLB invalidate single register
+ RAW_IPR_ALT_MODE = 0x20c, // alternate mode register
+ RAW_IPR_CC = 0x20d, // cycle counter register
+ RAW_IPR_CC_CTL = 0x20e, // cycle counter control register
+ RAW_IPR_MCSR = 0x20f, // MTU control register
RAW_IPR_DC_FLUSH = 0x210,
- RAW_IPR_DC_PERR_STAT = 0x212, // Dcache parity error status register
- RAW_IPR_DC_TEST_CTL = 0x213, // Dcache test tag control register
- RAW_IPR_DC_TEST_TAG = 0x214, // Dcache test tag register
+ RAW_IPR_DC_PERR_STAT = 0x212, // Dcache parity error status register
+ RAW_IPR_DC_TEST_CTL = 0x213, // Dcache test tag control register
+ RAW_IPR_DC_TEST_TAG = 0x214, // Dcache test tag register
RAW_IPR_DC_TEST_TAG_TEMP = 0x215, // Dcache test tag temporary register
- RAW_IPR_DC_MODE = 0x216, // Dcache mode register
- RAW_IPR_MAF_MODE = 0x217, // miss address file mode register
+ RAW_IPR_DC_MODE = 0x216, // Dcache mode register
+ RAW_IPR_MAF_MODE = 0x217, // miss address file mode register
- MaxInternalProcRegs // number of IPR registers
+ MaxInternalProcRegs // number of IPR registers
};
enum MiscRegIpr
IPR_DC_MODE,
IPR_MAF_MODE,
- NumInternalProcRegs // number of IPR registers
+ NumInternalProcRegs // number of IPR registers
};
inline bool IprIsWritable(int index)
// EV5 modes
enum mode_type
{
- mode_kernel = 0, // kernel
- mode_executive = 1, // executive (unused by unix)
- mode_supervisor = 2, // supervisor (unused by unix)
- mode_user = 3, // user mode
- mode_number // number of modes
+ mode_kernel = 0, // kernel
+ mode_executive = 1, // executive (unused by unix)
+ mode_supervisor = 2, // supervisor (unused by unix)
+ mode_user = 3, // user mode
+ mode_number // number of modes
};
// Constants Related to the number of registers
const int TotalDataRegs = NumIntRegs + NumFloatRegs;
// semantically meaningful register indices
- const int ZeroReg = 31; // architecturally meaningful
+ const int ZeroReg = 31; // architecturally meaningful
// the rest of these depend on the ABI
const int StackPointerReg = 30;
const int GlobalPointerReg = 29;
const int SyscallPseudoReturnReg = ArgumentReg[4];
const int SyscallSuccessReg = 19;
- const int LogVMPageSize = 13; // 8K bytes
+ const int LogVMPageSize = 13; // 8K bytes
const int VMPageSize = (1 << LogVMPageSize);
const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
// open(2) flags translation table
OpenFlagTransTable AlphaLinux::openFlagTable[] = {
#ifdef _MSC_VER
- { AlphaLinux::TGT_O_RDONLY, _O_RDONLY },
- { AlphaLinux::TGT_O_WRONLY, _O_WRONLY },
- { AlphaLinux::TGT_O_RDWR, _O_RDWR },
- { AlphaLinux::TGT_O_APPEND, _O_APPEND },
- { AlphaLinux::TGT_O_CREAT, _O_CREAT },
- { AlphaLinux::TGT_O_TRUNC, _O_TRUNC },
- { AlphaLinux::TGT_O_EXCL, _O_EXCL },
+ { AlphaLinux::TGT_O_RDONLY, _O_RDONLY },
+ { AlphaLinux::TGT_O_WRONLY, _O_WRONLY },
+ { AlphaLinux::TGT_O_RDWR, _O_RDWR },
+ { AlphaLinux::TGT_O_APPEND, _O_APPEND },
+ { AlphaLinux::TGT_O_CREAT, _O_CREAT },
+ { AlphaLinux::TGT_O_TRUNC, _O_TRUNC },
+ { AlphaLinux::TGT_O_EXCL, _O_EXCL },
#ifdef _O_NONBLOCK
- { AlphaLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
+ { AlphaLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
#endif
#ifdef _O_NOCTTY
- { AlphaLinux::TGT_O_NOCTTY, _O_NOCTTY },
+ { AlphaLinux::TGT_O_NOCTTY, _O_NOCTTY },
#endif
#ifdef _O_SYNC
- { AlphaLinux::TGT_O_SYNC, _O_SYNC },
+ { AlphaLinux::TGT_O_SYNC, _O_SYNC },
#endif
#else /* !_MSC_VER */
- { AlphaLinux::TGT_O_RDONLY, O_RDONLY },
- { AlphaLinux::TGT_O_WRONLY, O_WRONLY },
- { AlphaLinux::TGT_O_RDWR, O_RDWR },
- { AlphaLinux::TGT_O_APPEND, O_APPEND },
- { AlphaLinux::TGT_O_CREAT, O_CREAT },
- { AlphaLinux::TGT_O_TRUNC, O_TRUNC },
- { AlphaLinux::TGT_O_EXCL, O_EXCL },
- { AlphaLinux::TGT_O_NONBLOCK, O_NONBLOCK },
- { AlphaLinux::TGT_O_NOCTTY, O_NOCTTY },
+ { AlphaLinux::TGT_O_RDONLY, O_RDONLY },
+ { AlphaLinux::TGT_O_WRONLY, O_WRONLY },
+ { AlphaLinux::TGT_O_RDWR, O_RDWR },
+ { AlphaLinux::TGT_O_APPEND, O_APPEND },
+ { AlphaLinux::TGT_O_CREAT, O_CREAT },
+ { AlphaLinux::TGT_O_TRUNC, O_TRUNC },
+ { AlphaLinux::TGT_O_EXCL, O_EXCL },
+ { AlphaLinux::TGT_O_NONBLOCK, O_NONBLOCK },
+ { AlphaLinux::TGT_O_NOCTTY, O_NOCTTY },
#ifdef O_SYNC
- { AlphaLinux::TGT_O_SYNC, O_SYNC },
+ { AlphaLinux::TGT_O_SYNC, O_SYNC },
#endif
#endif /* _MSC_VER */
};
//@{
/// open(2) flag values.
- static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 00000010; //!< O_APPEND
- static const int TGT_O_CREAT = 00001000; //!< O_CREAT
- static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC
- static const int TGT_O_EXCL = 00004000; //!< O_EXCL
- static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY
- static const int TGT_O_SYNC = 00040000; //!< O_SYNC
- static const int TGT_O_DRD = 00100000; //!< O_DRD
- static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO
- static const int TGT_O_CACHE = 00400000; //!< O_CACHE
- static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC
- static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC
+ static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 00000010; //!< O_APPEND
+ static const int TGT_O_CREAT = 00001000; //!< O_CREAT
+ static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC
+ static const int TGT_O_EXCL = 00004000; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 00040000; //!< O_SYNC
+ static const int TGT_O_DRD = 00100000; //!< O_DRD
+ static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO
+ static const int TGT_O_CACHE = 00400000; //!< O_CACHE
+ static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC
+ static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC
//@}
/// For mmap().
class MiscRegFile {
protected:
- uint64_t fpcr; // floating point condition codes
- uint64_t uniq; // process-unique register
- bool lock_flag; // lock flag for LL/SC
- Addr lock_addr; // lock address for LL/SC
- int intr_flag;
+ uint64_t fpcr; // floating point condition codes
+ uint64_t uniq; // process-unique register
+ bool lock_flag; // lock flag for LL/SC
+ Addr lock_addr; // lock address for LL/SC
+ int intr_flag;
public:
MiscRegFile()
namespace {
const char *strings[PAL::NumCodes] = {
// Priviledged PAL instructions
- "halt", // 0x00
- "cflush", // 0x01
- "draina", // 0x02
- 0, // 0x03
- 0, // 0x04
- 0, // 0x05
- 0, // 0x06
- 0, // 0x07
- 0, // 0x08
- "cserve", // 0x09
- "swppal", // 0x0a
- 0, // 0x0b
- 0, // 0x0c
- "wripir", // 0x0d
- 0, // 0x0e
- 0, // 0x0f
- "rdmces", // 0x10
- "wrmces", // 0x11
- 0, // 0x12
- 0, // 0x13
- 0, // 0x14
- 0, // 0x15
- 0, // 0x16
- 0, // 0x17
- 0, // 0x18
- 0, // 0x19
- 0, // 0x1a
- 0, // 0x1b
- 0, // 0x1c
- 0, // 0x1d
- 0, // 0x1e
- 0, // 0x1f
- 0, // 0x20
- 0, // 0x21
- 0, // 0x22
- 0, // 0x23
- 0, // 0x24
- 0, // 0x25
- 0, // 0x26
- 0, // 0x27
- 0, // 0x28
- 0, // 0x29
- 0, // 0x2a
- "wrfen", // 0x2b
- 0, // 0x2c
- "wrvptptr", // 0x2d
- 0, // 0x2e
- 0, // 0x2f
- "swpctx", // 0x30
- "wrval", // 0x31
- "rdval", // 0x32
- "tbi", // 0x33
- "wrent", // 0x34
- "swpipl", // 0x35
- "rdps", // 0x36
- "wrkgp", // 0x37
- "wrusp", // 0x38
- "wrperfmon", // 0x39
- "rdusp", // 0x3a
- 0, // 0x3b
- "whami", // 0x3c
- "retsys", // 0x3d
- "wtint", // 0x3e
- "rti", // 0x3f
- 0, // 0x40
- 0, // 0x41
- 0, // 0x42
- 0, // 0x43
- 0, // 0x44
- 0, // 0x45
- 0, // 0x46
- 0, // 0x47
- 0, // 0x48
- 0, // 0x49
- 0, // 0x4a
- 0, // 0x4b
- 0, // 0x4c
- 0, // 0x4d
- 0, // 0x4e
- 0, // 0x4f
- 0, // 0x50
- 0, // 0x51
- 0, // 0x52
- 0, // 0x53
- 0, // 0x54
- 0, // 0x55
- 0, // 0x56
- 0, // 0x57
- 0, // 0x58
- 0, // 0x59
- 0, // 0x5a
- 0, // 0x5b
- 0, // 0x5c
- 0, // 0x5d
- 0, // 0x5e
- 0, // 0x5f
- 0, // 0x60
- 0, // 0x61
- 0, // 0x62
- 0, // 0x63
- 0, // 0x64
- 0, // 0x65
- 0, // 0x66
- 0, // 0x67
- 0, // 0x68
- 0, // 0x69
- 0, // 0x6a
- 0, // 0x6b
- 0, // 0x6c
- 0, // 0x6d
- 0, // 0x6e
- 0, // 0x6f
- 0, // 0x70
- 0, // 0x71
- 0, // 0x72
- 0, // 0x73
- 0, // 0x74
- 0, // 0x75
- 0, // 0x76
- 0, // 0x77
- 0, // 0x78
- 0, // 0x79
- 0, // 0x7a
- 0, // 0x7b
- 0, // 0x7c
- 0, // 0x7d
- 0, // 0x7e
- 0, // 0x7f
+ "halt", // 0x00
+ "cflush", // 0x01
+ "draina", // 0x02
+ 0, // 0x03
+ 0, // 0x04
+ 0, // 0x05
+ 0, // 0x06
+ 0, // 0x07
+ 0, // 0x08
+ "cserve", // 0x09
+ "swppal", // 0x0a
+ 0, // 0x0b
+ 0, // 0x0c
+ "wripir", // 0x0d
+ 0, // 0x0e
+ 0, // 0x0f
+ "rdmces", // 0x10
+ "wrmces", // 0x11
+ 0, // 0x12
+ 0, // 0x13
+ 0, // 0x14
+ 0, // 0x15
+ 0, // 0x16
+ 0, // 0x17
+ 0, // 0x18
+ 0, // 0x19
+ 0, // 0x1a
+ 0, // 0x1b
+ 0, // 0x1c
+ 0, // 0x1d
+ 0, // 0x1e
+ 0, // 0x1f
+ 0, // 0x20
+ 0, // 0x21
+ 0, // 0x22
+ 0, // 0x23
+ 0, // 0x24
+ 0, // 0x25
+ 0, // 0x26
+ 0, // 0x27
+ 0, // 0x28
+ 0, // 0x29
+ 0, // 0x2a
+ "wrfen", // 0x2b
+ 0, // 0x2c
+ "wrvptptr", // 0x2d
+ 0, // 0x2e
+ 0, // 0x2f
+ "swpctx", // 0x30
+ "wrval", // 0x31
+ "rdval", // 0x32
+ "tbi", // 0x33
+ "wrent", // 0x34
+ "swpipl", // 0x35
+ "rdps", // 0x36
+ "wrkgp", // 0x37
+ "wrusp", // 0x38
+ "wrperfmon", // 0x39
+ "rdusp", // 0x3a
+ 0, // 0x3b
+ "whami", // 0x3c
+ "retsys", // 0x3d
+ "wtint", // 0x3e
+ "rti", // 0x3f
+ 0, // 0x40
+ 0, // 0x41
+ 0, // 0x42
+ 0, // 0x43
+ 0, // 0x44
+ 0, // 0x45
+ 0, // 0x46
+ 0, // 0x47
+ 0, // 0x48
+ 0, // 0x49
+ 0, // 0x4a
+ 0, // 0x4b
+ 0, // 0x4c
+ 0, // 0x4d
+ 0, // 0x4e
+ 0, // 0x4f
+ 0, // 0x50
+ 0, // 0x51
+ 0, // 0x52
+ 0, // 0x53
+ 0, // 0x54
+ 0, // 0x55
+ 0, // 0x56
+ 0, // 0x57
+ 0, // 0x58
+ 0, // 0x59
+ 0, // 0x5a
+ 0, // 0x5b
+ 0, // 0x5c
+ 0, // 0x5d
+ 0, // 0x5e
+ 0, // 0x5f
+ 0, // 0x60
+ 0, // 0x61
+ 0, // 0x62
+ 0, // 0x63
+ 0, // 0x64
+ 0, // 0x65
+ 0, // 0x66
+ 0, // 0x67
+ 0, // 0x68
+ 0, // 0x69
+ 0, // 0x6a
+ 0, // 0x6b
+ 0, // 0x6c
+ 0, // 0x6d
+ 0, // 0x6e
+ 0, // 0x6f
+ 0, // 0x70
+ 0, // 0x71
+ 0, // 0x72
+ 0, // 0x73
+ 0, // 0x74
+ 0, // 0x75
+ 0, // 0x76
+ 0, // 0x77
+ 0, // 0x78
+ 0, // 0x79
+ 0, // 0x7a
+ 0, // 0x7b
+ 0, // 0x7c
+ 0, // 0x7d
+ 0, // 0x7e
+ 0, // 0x7f
// Unpriviledged PAL instructions
- "bpt", // 0x80
- "bugchk", // 0x81
- 0, // 0x82
- "callsys", // 0x83
- 0, // 0x84
- 0, // 0x85
- "imb", // 0x86
- 0, // 0x87
- 0, // 0x88
- 0, // 0x89
- 0, // 0x8a
- 0, // 0x8b
- 0, // 0x8c
- 0, // 0x8d
- 0, // 0x8e
- 0, // 0x8f
- 0, // 0x90
- 0, // 0x91
- "urti", // 0x92
- 0, // 0x93
- 0, // 0x94
- 0, // 0x95
- 0, // 0x96
- 0, // 0x97
- 0, // 0x98
- 0, // 0x99
- 0, // 0x9a
- 0, // 0x9b
- 0, // 0x9c
- 0, // 0x9d
- "rdunique", // 0x9e
- "wrunique", // 0x9f
- 0, // 0xa0
- 0, // 0xa1
- 0, // 0xa2
- 0, // 0xa3
- 0, // 0xa4
- 0, // 0xa5
- 0, // 0xa6
- 0, // 0xa7
- 0, // 0xa8
- 0, // 0xa9
- "gentrap", // 0xaa
- 0, // 0xab
- 0, // 0xac
- 0, // 0xad
- "clrfen", // 0xae
- 0, // 0xaf
- 0, // 0xb0
- 0, // 0xb1
- 0, // 0xb2
- 0, // 0xb3
- 0, // 0xb4
- 0, // 0xb5
- 0, // 0xb6
- 0, // 0xb7
- 0, // 0xb8
- 0, // 0xb9
- 0, // 0xba
- 0, // 0xbb
- 0, // 0xbc
- 0, // 0xbd
- "nphalt", // 0xbe
- "copypal", // 0xbf
+ "bpt", // 0x80
+ "bugchk", // 0x81
+ 0, // 0x82
+ "callsys", // 0x83
+ 0, // 0x84
+ 0, // 0x85
+ "imb", // 0x86
+ 0, // 0x87
+ 0, // 0x88
+ 0, // 0x89
+ 0, // 0x8a
+ 0, // 0x8b
+ 0, // 0x8c
+ 0, // 0x8d
+ 0, // 0x8e
+ 0, // 0x8f
+ 0, // 0x90
+ 0, // 0x91
+ "urti", // 0x92
+ 0, // 0x93
+ 0, // 0x94
+ 0, // 0x95
+ 0, // 0x96
+ 0, // 0x97
+ 0, // 0x98
+ 0, // 0x99
+ 0, // 0x9a
+ 0, // 0x9b
+ 0, // 0x9c
+ 0, // 0x9d
+ "rdunique", // 0x9e
+ "wrunique", // 0x9f
+ 0, // 0xa0
+ 0, // 0xa1
+ 0, // 0xa2
+ 0, // 0xa3
+ 0, // 0xa4
+ 0, // 0xa5
+ 0, // 0xa6
+ 0, // 0xa7
+ 0, // 0xa8
+ 0, // 0xa9
+ "gentrap", // 0xaa
+ 0, // 0xab
+ 0, // 0xac
+ 0, // 0xad
+ "clrfen", // 0xae
+ 0, // 0xaf
+ 0, // 0xb0
+ 0, // 0xb1
+ 0, // 0xb2
+ 0, // 0xb3
+ 0, // 0xb4
+ 0, // 0xb5
+ 0, // 0xb6
+ 0, // 0xb7
+ 0, // 0xb8
+ 0, // 0xb9
+ 0, // 0xba
+ 0, // 0xbb
+ 0, // 0xbc
+ 0, // 0xbd
+ "nphalt", // 0xbe
+ "copypal", // 0xbf
#if 0
- 0, // 0xc0
- 0, // 0xc1
- 0, // 0xc2
- 0, // 0xc3
- 0, // 0xc4
- 0, // 0xc5
- 0, // 0xc6
- 0, // 0xc7
- 0, // 0xc8
- 0, // 0xc9
- 0, // 0xca
- 0, // 0xcb
- 0, // 0xcc
- 0, // 0xcd
- 0, // 0xce
- 0, // 0xcf
- 0, // 0xd0
- 0, // 0xd1
- 0, // 0xd2
- 0, // 0xd3
- 0, // 0xd4
- 0, // 0xd5
- 0, // 0xd6
- 0, // 0xd7
- 0, // 0xd8
- 0, // 0xd9
- 0, // 0xda
- 0, // 0xdb
- 0, // 0xdc
- 0, // 0xdd
- 0, // 0xde
- 0, // 0xdf
- 0, // 0xe0
- 0, // 0xe1
- 0, // 0xe2
- 0, // 0xe3
- 0, // 0xe4
- 0, // 0xe5
- 0, // 0xe6
- 0, // 0xe7
- 0, // 0xe8
- 0, // 0xe9
- 0, // 0xea
- 0, // 0xeb
- 0, // 0xec
- 0, // 0xed
- 0, // 0xee
- 0, // 0xef
- 0, // 0xf0
- 0, // 0xf1
- 0, // 0xf2
- 0, // 0xf3
- 0, // 0xf4
- 0, // 0xf5
- 0, // 0xf6
- 0, // 0xf7
- 0, // 0xf8
- 0, // 0xf9
- 0, // 0xfa
- 0, // 0xfb
- 0, // 0xfc
- 0, // 0xfd
- 0, // 0xfe
- 0 // 0xff
+ 0, // 0xc0
+ 0, // 0xc1
+ 0, // 0xc2
+ 0, // 0xc3
+ 0, // 0xc4
+ 0, // 0xc5
+ 0, // 0xc6
+ 0, // 0xc7
+ 0, // 0xc8
+ 0, // 0xc9
+ 0, // 0xca
+ 0, // 0xcb
+ 0, // 0xcc
+ 0, // 0xcd
+ 0, // 0xce
+ 0, // 0xcf
+ 0, // 0xd0
+ 0, // 0xd1
+ 0, // 0xd2
+ 0, // 0xd3
+ 0, // 0xd4
+ 0, // 0xd5
+ 0, // 0xd6
+ 0, // 0xd7
+ 0, // 0xd8
+ 0, // 0xd9
+ 0, // 0xda
+ 0, // 0xdb
+ 0, // 0xdc
+ 0, // 0xdd
+ 0, // 0xde
+ 0, // 0xdf
+ 0, // 0xe0
+ 0, // 0xe1
+ 0, // 0xe2
+ 0, // 0xe3
+ 0, // 0xe4
+ 0, // 0xe5
+ 0, // 0xe6
+ 0, // 0xe7
+ 0, // 0xe8
+ 0, // 0xe9
+ 0, // 0xea
+ 0, // 0xeb
+ 0, // 0xec
+ 0, // 0xed
+ 0, // 0xee
+ 0, // 0xef
+ 0, // 0xf0
+ 0, // 0xf1
+ 0, // 0xf2
+ 0, // 0xf3
+ 0, // 0xf4
+ 0, // 0xf5
+ 0, // 0xf6
+ 0, // 0xf7
+ 0, // 0xf8
+ 0, // 0xf9
+ 0, // 0xfa
+ 0, // 0xfb
+ 0, // 0xfc
+ 0, // 0xfd
+ 0, // 0xfe
+ 0 // 0xff
#endif
};
}
TlbEntry()
{}
- Addr tag; // virtual page number tag
- Addr ppn; // physical page number
- uint8_t xre; // read permissions - VMEM_PERM_* mask
- uint8_t xwe; // write permissions - VMEM_PERM_* mask
- uint8_t asn; // address space number
- bool asma; // address space match
- bool fonr; // fault on read
- bool fonw; // fault on write
- bool valid; // valid page table entry
+ Addr tag; // virtual page number tag
+ Addr ppn; // physical page number
+ uint8_t xre; // read permissions - VMEM_PERM_* mask
+ uint8_t xwe; // write permissions - VMEM_PERM_* mask
+ uint8_t asn; // address space number
+ bool asma; // address space match
+ bool fonr; // fault on read
+ bool fonw; // fault on write
+ bool valid; // valid page table entry
Addr pageStart()
{
class RegFile {
protected:
- Addr pc; // program counter
- Addr npc; // next-cycle program counter
+ Addr pc; // program counter
+ Addr npc; // next-cycle program counter
Addr nnpc;
public:
{ }
protected:
- IntRegFile intRegFile; // (signed) integer register file
- FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
+ IntRegFile intRegFile; // (signed) integer register file
+ FloatRegFile floatRegFile; // floating point register file
+ MiscRegFile miscRegFile; // control register file
public:
#if FULL_SYSTEM
- int intrflag; // interrupt flag
+ int intrflag; // interrupt flag
inline int instAsid()
{ return miscRegFile.getInstAsid(); }
inline int dataAsid()
/*
* Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
+ * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
///////////////////////////////////////////////////////////
// RemoteGDB::acc
//
-// Determine if the mapping at va..(va+len) is valid.
+// Determine if the mapping at va..(va+len) is valid.
//
bool
RemoteGDB::acc(Addr va, size_t len)
///////////////////////////////////////////////////////////
// RemoteGDB::getregs
//
-// Translate the kernel debugger register format into
-// the GDB register format.
+// Translate the kernel debugger register format into
+// the GDB register format.
void
RemoteGDB::getregs()
{
///////////////////////////////////////////////////////////
// RemoteGDB::setregs
//
-// Translate the GDB register format into the kernel
-// debugger register format.
+// Translate the GDB register format into the kernel
+// debugger register format.
//
void
RemoteGDB::setregs()
* in the procedure value register (pv aka t12 == r27). This sequence
* looks like the following:
*
- * opcode Ra Rb offset
- * ldah gp,X(pv) 09 29 27 X
- * lda gp,Y(gp) 08 29 29 Y
+ * opcode Ra Rb offset
+ * ldah gp,X(pv) 09 29 27 X
+ * lda gp,Y(gp) 08 29 29 Y
*
* for some constant offsets X and Y. The catch is that the linker
* (or maybe even the compiler, I'm not sure) may recognize that the
bool uncacheBit40 = false;
#endif
-#define MODE2MASK(X) (1 << (X))
+#define MODE2MASK(X) (1 << (X))
TLB::TLB(const Params *p)
: BaseTLB(p), size(p->size), nlu(0)
case AlphaTru64::GSI_PHYSMEM: {
TypedBufferArg<uint64_t> physmem(tc->getSyscallArg(1));
- *physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
+ *physmem = htog((uint64_t)1024 * 1024); // physical memory in KB
physmem.copyOut(tc->getMemPort());
return 1;
}
using namespace std;
using namespace TheISA;
- int id = tc->getSyscallArg(0); // table ID
- int index = tc->getSyscallArg(1); // index into table
+ int id = tc->getSyscallArg(0); // table ID
+ int index = tc->getSyscallArg(1); // index into table
// arg 2 is buffer pointer; type depends on table ID
- int nel = tc->getSyscallArg(3); // number of elements
- int lel = tc->getSyscallArg(4); // expected element size
+ int nel = tc->getSyscallArg(3); // number of elements
+ int lel = tc->getSyscallArg(4); // expected element size
switch (id) {
case AlphaTru64::TBL_SYSINFO: {
// open(2) flags translation table
OpenFlagTransTable AlphaTru64::openFlagTable[] = {
#ifdef _MSC_VER
- { AlphaTru64::TGT_O_RDONLY, _O_RDONLY },
- { AlphaTru64::TGT_O_WRONLY, _O_WRONLY },
- { AlphaTru64::TGT_O_RDWR, _O_RDWR },
- { AlphaTru64::TGT_O_APPEND, _O_APPEND },
- { AlphaTru64::TGT_O_CREAT, _O_CREAT },
- { AlphaTru64::TGT_O_TRUNC, _O_TRUNC },
- { AlphaTru64::TGT_O_EXCL, _O_EXCL },
+ { AlphaTru64::TGT_O_RDONLY, _O_RDONLY },
+ { AlphaTru64::TGT_O_WRONLY, _O_WRONLY },
+ { AlphaTru64::TGT_O_RDWR, _O_RDWR },
+ { AlphaTru64::TGT_O_APPEND, _O_APPEND },
+ { AlphaTru64::TGT_O_CREAT, _O_CREAT },
+ { AlphaTru64::TGT_O_TRUNC, _O_TRUNC },
+ { AlphaTru64::TGT_O_EXCL, _O_EXCL },
#ifdef _O_NONBLOCK
- { AlphaTru64::TGT_O_NONBLOCK, _O_NONBLOCK },
+ { AlphaTru64::TGT_O_NONBLOCK, _O_NONBLOCK },
#endif
#ifdef _O_NOCTTY
- { AlphaTru64::TGT_O_NOCTTY, _O_NOCTTY },
+ { AlphaTru64::TGT_O_NOCTTY, _O_NOCTTY },
#endif
#ifdef _O_SYNC
- { AlphaTru64::TGT_O_SYNC, _O_SYNC },
+ { AlphaTru64::TGT_O_SYNC, _O_SYNC },
#endif
#else /* !_MSC_VER */
- { AlphaTru64::TGT_O_RDONLY, O_RDONLY },
- { AlphaTru64::TGT_O_WRONLY, O_WRONLY },
- { AlphaTru64::TGT_O_RDWR, O_RDWR },
- { AlphaTru64::TGT_O_APPEND, O_APPEND },
- { AlphaTru64::TGT_O_CREAT, O_CREAT },
- { AlphaTru64::TGT_O_TRUNC, O_TRUNC },
- { AlphaTru64::TGT_O_EXCL, O_EXCL },
- { AlphaTru64::TGT_O_NONBLOCK, O_NONBLOCK },
- { AlphaTru64::TGT_O_NOCTTY, O_NOCTTY },
+ { AlphaTru64::TGT_O_RDONLY, O_RDONLY },
+ { AlphaTru64::TGT_O_WRONLY, O_WRONLY },
+ { AlphaTru64::TGT_O_RDWR, O_RDWR },
+ { AlphaTru64::TGT_O_APPEND, O_APPEND },
+ { AlphaTru64::TGT_O_CREAT, O_CREAT },
+ { AlphaTru64::TGT_O_TRUNC, O_TRUNC },
+ { AlphaTru64::TGT_O_EXCL, O_EXCL },
+ { AlphaTru64::TGT_O_NONBLOCK, O_NONBLOCK },
+ { AlphaTru64::TGT_O_NOCTTY, O_NOCTTY },
#ifdef O_SYNC
- { AlphaTru64::TGT_O_SYNC, O_SYNC },
+ { AlphaTru64::TGT_O_SYNC, O_SYNC },
#endif
#endif /* _MSC_VER */
};
//@{
/// open(2) flag values.
- static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 00000010; //!< O_APPEND
- static const int TGT_O_CREAT = 00001000; //!< O_CREAT
- static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC
- static const int TGT_O_EXCL = 00004000; //!< O_EXCL
- static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY
- static const int TGT_O_SYNC = 00040000; //!< O_SYNC
- static const int TGT_O_DRD = 00100000; //!< O_DRD
- static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO
- static const int TGT_O_CACHE = 00400000; //!< O_CACHE
- static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC
- static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC
+ static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 00000004; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 00000010; //!< O_APPEND
+ static const int TGT_O_CREAT = 00001000; //!< O_CREAT
+ static const int TGT_O_TRUNC = 00002000; //!< O_TRUNC
+ static const int TGT_O_EXCL = 00004000; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 00010000; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 00040000; //!< O_SYNC
+ static const int TGT_O_DRD = 00100000; //!< O_DRD
+ static const int TGT_O_DIRECTIO = 00200000; //!< O_DIRECTIO
+ static const int TGT_O_CACHE = 00400000; //!< O_CACHE
+ static const int TGT_O_DSYNC = 02000000; //!< O_DSYNC
+ static const int TGT_O_RSYNC = 04000000; //!< O_RSYNC
//@}
/// For mmap().
//@{
/// For getsysinfo().
static const unsigned GSI_PLATFORM_NAME = 103; //!< platform name as string
- static const unsigned GSI_CPU_INFO = 59; //!< CPU information
- static const unsigned GSI_PROC_TYPE = 60; //!< get proc_type
+ static const unsigned GSI_CPU_INFO = 59; //!< CPU information
+ static const unsigned GSI_PROC_TYPE = 60; //!< get proc_type
static const unsigned GSI_MAX_CPU = 30; //!< max # cpu's on this machine
- static const unsigned GSI_CPUS_IN_BOX = 55; //!< number of CPUs in system
- static const unsigned GSI_PHYSMEM = 19; //!< Physical memory in KB
- static const unsigned GSI_CLK_TCK = 42; //!< clock freq in Hz
+ static const unsigned GSI_CPUS_IN_BOX = 55; //!< number of CPUs in system
+ static const unsigned GSI_PHYSMEM = 19; //!< Physical memory in KB
+ static const unsigned GSI_CLK_TCK = 42; //!< clock freq in Hz
//@}
//@{
t_DOT = r'\.'
t_COLON = r':'
t_DBLCOLON = r'::'
-t_ASTERISK = r'\*'
+t_ASTERISK = r'\*'
# Identifiers and reserved words
reserved_map = { }
#
# A decode block looks like:
-# decode <field1> [, <field2>]* [default <inst>] { ... }
+# decode <field1> [, <field2>]* [default <inst>] { ... }
#
def p_decode_block(t):
'decode_block : DECODE ID opt_default LBRACE decode_stmt_list RBRACE'
ctype = 'uint%d_t' % size
is_signed = 0
elif desc == 'float':
- is_signed = 1 # shouldn't really matter
+ is_signed = 1 # shouldn't really matter
if size == 32:
ctype = 'float'
elif size == 64:
operands = userDict.keys()
operandsREString = (r'''
- (?<![\w\.]) # neg. lookbehind assertion: prevent partial matches
+ (?<![\w\.]) # neg. lookbehind assertion: prevent partial matches
((%s)(?:\.(\w+))?) # match: operand with optional '.' then suffix
- (?![\w\.]) # neg. lookahead assertion: prevent partial matches
+ (?![\w\.]) # neg. lookahead assertion: prevent partial matches
'''
% string.join(operands, '|'))
//To use them, do something like:
//
//#if THE_ISA == YOUR_FAVORITE_ISA
-// conditional_code
+// conditional_code
//#endif
//
//Note that this is how this file sets up the TheISA macro.
// MIPS modes
enum mode_type
{
- mode_kernel = 0, // kernel
- mode_supervisor = 1, // supervisor
- mode_user = 2, // user mode
+ mode_kernel = 0, // kernel
+ mode_supervisor = 1, // supervisor
+ mode_user = 2, // user mode
mode_debug = 3, // debug mode
- mode_number // number of modes
+ mode_number // number of modes
};
inline mode_type getOperatingMode(MiscReg Stat)
const int SyscallPseudoReturnReg = ReturnValueReg2;
const int SyscallSuccessReg = ArgumentReg3;
- const int LogVMPageSize = 13; // 8K bytes
+ const int LogVMPageSize = 13; // 8K bytes
const int VMPageSize = (1 << LogVMPageSize);
const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned
// open(2) flags translation table
OpenFlagTransTable MipsLinux::openFlagTable[] = {
#ifdef _MSC_VER
- { MipsLinux::TGT_O_RDONLY, _O_RDONLY },
- { MipsLinux::TGT_O_WRONLY, _O_WRONLY },
- { MipsLinux::TGT_O_RDWR, _O_RDWR },
- { MipsLinux::TGT_O_APPEND, _O_APPEND },
- { MipsLinux::TGT_O_CREAT, _O_CREAT },
- { MipsLinux::TGT_O_TRUNC, _O_TRUNC },
- { MipsLinux::TGT_O_EXCL, _O_EXCL },
+ { MipsLinux::TGT_O_RDONLY, _O_RDONLY },
+ { MipsLinux::TGT_O_WRONLY, _O_WRONLY },
+ { MipsLinux::TGT_O_RDWR, _O_RDWR },
+ { MipsLinux::TGT_O_APPEND, _O_APPEND },
+ { MipsLinux::TGT_O_CREAT, _O_CREAT },
+ { MipsLinux::TGT_O_TRUNC, _O_TRUNC },
+ { MipsLinux::TGT_O_EXCL, _O_EXCL },
#ifdef _O_NONBLOCK
- { MipsLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
+ { MipsLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
#endif
#ifdef _O_NOCTTY
- { MipsLinux::TGT_O_NOCTTY, _O_NOCTTY },
+ { MipsLinux::TGT_O_NOCTTY, _O_NOCTTY },
#endif
#ifdef _O_SYNC
- { MipsLinux::TGT_O_SYNC, _O_SYNC },
+ { MipsLinux::TGT_O_SYNC, _O_SYNC },
#endif
#else /* !_MSC_VER */
- { MipsLinux::TGT_O_RDONLY, O_RDONLY },
- { MipsLinux::TGT_O_WRONLY, O_WRONLY },
- { MipsLinux::TGT_O_RDWR, O_RDWR },
- { MipsLinux::TGT_O_APPEND, O_APPEND },
- { MipsLinux::TGT_O_CREAT, O_CREAT },
- { MipsLinux::TGT_O_TRUNC, O_TRUNC },
- { MipsLinux::TGT_O_EXCL, O_EXCL },
- { MipsLinux::TGT_O_NONBLOCK, O_NONBLOCK },
- { MipsLinux::TGT_O_NOCTTY, O_NOCTTY },
+ { MipsLinux::TGT_O_RDONLY, O_RDONLY },
+ { MipsLinux::TGT_O_WRONLY, O_WRONLY },
+ { MipsLinux::TGT_O_RDWR, O_RDWR },
+ { MipsLinux::TGT_O_APPEND, O_APPEND },
+ { MipsLinux::TGT_O_CREAT, O_CREAT },
+ { MipsLinux::TGT_O_TRUNC, O_TRUNC },
+ { MipsLinux::TGT_O_EXCL, O_EXCL },
+ { MipsLinux::TGT_O_NONBLOCK, O_NONBLOCK },
+ { MipsLinux::TGT_O_NOCTTY, O_NOCTTY },
#ifdef O_SYNC
- { MipsLinux::TGT_O_SYNC, O_SYNC },
+ { MipsLinux::TGT_O_SYNC, O_SYNC },
#endif
#endif /* _MSC_VER */
};
//@{
/// open(2) flag values.
- static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 0x00000080; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
- static const int TGT_O_CREAT = 0x00000100; //!< O_CREAT
- static const int TGT_O_TRUNC = 0x00000200; //!< O_TRUNC
- static const int TGT_O_EXCL = 0x00000400; //!< O_EXCL
- static const int TGT_O_NOCTTY = 0x00000800; //!< O_NOCTTY
- static const int TGT_O_SYNC = 0x00000010; //!< O_SYNC
- static const int TGT_O_DRD = 0x00010000; //!< O_DRD
- static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
- static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
- static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
- static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
+ static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 0x00000080; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
+ static const int TGT_O_CREAT = 0x00000100; //!< O_CREAT
+ static const int TGT_O_TRUNC = 0x00000200; //!< O_TRUNC
+ static const int TGT_O_EXCL = 0x00000400; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 0x00000800; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 0x00000010; //!< O_SYNC
+ static const int TGT_O_DRD = 0x00010000; //!< O_DRD
+ static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
+ static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
+ static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
+ static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
//@}
/// For mmap().
//@{
/// For getsysinfo().
static const unsigned GSI_PLATFORM_NAME = 103; //!< platform name as string
- static const unsigned GSI_CPU_INFO = 59; //!< CPU information
- static const unsigned GSI_PROC_TYPE = 60; //!< get proc_type
+ static const unsigned GSI_CPU_INFO = 59; //!< CPU information
+ static const unsigned GSI_PROC_TYPE = 60; //!< get proc_type
static const unsigned GSI_MAX_CPU = 30; //!< max # cpu's on this machine
- static const unsigned GSI_CPUS_IN_BOX = 55; //!< number of CPUs in system
- static const unsigned GSI_PHYSMEM = 19; //!< Physical memory in KB
- static const unsigned GSI_CLK_TCK = 42; //!< clock freq in Hz
+ static const unsigned GSI_CPUS_IN_BOX = 55; //!< number of CPUs in system
+ static const unsigned GSI_PHYSMEM = 19; //!< Physical memory in KB
+ static const unsigned GSI_CLK_TCK = 42; //!< clock freq in Hz
//@}
//@{
{
class RegFile {
protected:
- Addr pc; // program counter
- Addr npc; // next-cycle program counter
- Addr nnpc; // next-next-cycle program counter
+ Addr pc; // program counter
+ Addr npc; // next-cycle program counter
+ Addr nnpc; // next-next-cycle program counter
// used to implement branch delay slot
// not real register
- IntRegFile intRegFile; // (signed) integer register file
- FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
+ IntRegFile intRegFile; // (signed) integer register file
+ FloatRegFile floatRegFile; // floating point register file
+ MiscRegFile miscRegFile; // control register file
public:
void clear();
* in the procedure value register (pv aka t12 == r27). This sequence
* looks like the following:
*
- * opcode Ra Rb offset
- * ldah gp,X(pv) 09 29 27 X
- * lda gp,Y(gp) 08 29 29 Y
+ * opcode Ra Rb offset
+ * ldah gp,X(pv) 09 29 27 X
+ * lda gp,Y(gp) 08 29 29 Y
*
* for some constant offsets X and Y. The catch is that the linker
* (or maybe even the compiler, I'm not sure) may recognize that the
// MIPS TLB
//
-#define MODE2MASK(X) (1 << (X))
+#define MODE2MASK(X) (1 << (X))
TLB::TLB(const Params *p)
: BaseTLB(p), size(p->size), nlu(0)
Addr Mask = pte->Mask;
Addr InvMask = ~Mask;
Addr VPN = pte->VPN;
- // warn("Valid: %d - %d\n",pte->V0,pte->V1);
+ // warn("Valid: %d - %d\n",pte->V0,pte->V1);
if(((vpn & InvMask) == (VPN & InvMask)) && (pte->G || (asn == pte->asid)))
{ // We have a VPN + ASID Match
retval = pte;
}
else
{// Ok, this is really a match, set paddr
- // hits++;
+ // hits++;
Addr PAddr;
if(EvenOdd == 0){
PAddr = pte->PFN0;
}
else
{ // Didn't find any match, return a TLB Refill Exception
- // misses++;
+ // misses++;
ItbRefillFault *Flt=new ItbRefillFault();
/* EntryHi VPN, ASID fields must be set */
Flt->EntryHi_Asid = Asid;
if(Valid == false)
{//Invalid entry
- // invalids++;
+ // invalids++;
DtbInvalidFault *Flt = new DtbInvalidFault();
/* EntryHi VPN, ASID fields must be set */
Flt->EntryHi_Asid = Asid;
}
else
{// Ok, this is really a match, set paddr
- // hits++;
+ // hits++;
if(!Dirty)
{
TLBModifiedFault *Flt = new TLBModifiedFault();
}
else
{ // Didn't find any match, return a TLB Refill Exception
- // misses++;
+ // misses++;
DtbRefillFault *Flt=new DtbRefillFault();
/* EntryHi VPN, ASID fields must be set */
Flt->EntryHi_Asid = Asid;
// ITB::regStats()
// {
// /* hits - causes failure for some reason
-// .name(name() + ".hits")
-// .desc("ITB hits");
+// .name(name() + ".hits")
+// .desc("ITB hits");
// misses
-// .name(name() + ".misses")
-// .desc("ITB misses");
+// .name(name() + ".misses")
+// .desc("ITB misses");
// acv
-// .name(name() + ".acv")
-// .desc("ITB acv");
+// .name(name() + ".acv")
+// .desc("ITB acv");
// accesses
-// .name(name() + ".accesses")
-// .desc("ITB accesses");
+// .name(name() + ".accesses")
+// .desc("ITB accesses");
-// accesses = hits + misses + invalids; */
+// accesses = hits + misses + invalids; */
// }
{
protected:
typedef std::multimap<Addr, int> PageTable;
- PageTable lookupTable; // Quick lookup into page table
+ PageTable lookupTable; // Quick lookup into page table
- MipsISA::PTE *table; // the Page Table
- int size; // TLB Size
- int nlu; // not last used entry (for replacement)
+ MipsISA::PTE *table; // the Page Table
+ int size; // TLB Size
+ int nlu; // not last used entry (for replacement)
void nextnlu() { if (++nlu >= size) nlu = 0; }
MipsISA::PTE *lookup(Addr vpn, uint8_t asn) const;
};
// semantically meaningful register indices
- const int ZeroReg = 0; // architecturally meaningful
+ const int ZeroReg = 0; // architecturally meaningful
// the rest of these depend on the ABI
const int StackPointerReg = 14;
const int ReturnAddressReg = 31; // post call, precall is 15
// open(2) flags translation table
OpenFlagTransTable SparcLinux::openFlagTable[] = {
#ifdef _MSC_VER
- { SparcLinux::TGT_O_RDONLY, _O_RDONLY },
- { SparcLinux::TGT_O_WRONLY, _O_WRONLY },
- { SparcLinux::TGT_O_RDWR, _O_RDWR },
- { SparcLinux::TGT_O_APPEND, _O_APPEND },
- { SparcLinux::TGT_O_CREAT, _O_CREAT },
- { SparcLinux::TGT_O_TRUNC, _O_TRUNC },
- { SparcLinux::TGT_O_EXCL, _O_EXCL },
+ { SparcLinux::TGT_O_RDONLY, _O_RDONLY },
+ { SparcLinux::TGT_O_WRONLY, _O_WRONLY },
+ { SparcLinux::TGT_O_RDWR, _O_RDWR },
+ { SparcLinux::TGT_O_APPEND, _O_APPEND },
+ { SparcLinux::TGT_O_CREAT, _O_CREAT },
+ { SparcLinux::TGT_O_TRUNC, _O_TRUNC },
+ { SparcLinux::TGT_O_EXCL, _O_EXCL },
#ifdef _O_NONBLOCK
- { SparcLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
+ { SparcLinux::TGT_O_NONBLOCK, _O_NONBLOCK },
#endif
#ifdef _O_NOCTTY
- { SparcLinux::TGT_O_NOCTTY, _O_NOCTTY },
+ { SparcLinux::TGT_O_NOCTTY, _O_NOCTTY },
#endif
#ifdef _O_SYNC
- { SparcLinux::TGT_O_SYNC, _O_SYNC },
+ { SparcLinux::TGT_O_SYNC, _O_SYNC },
#endif
#else /* !_MSC_VER */
- { SparcLinux::TGT_O_RDONLY, O_RDONLY },
- { SparcLinux::TGT_O_WRONLY, O_WRONLY },
- { SparcLinux::TGT_O_RDWR, O_RDWR },
- { SparcLinux::TGT_O_APPEND, O_APPEND },
- { SparcLinux::TGT_O_CREAT, O_CREAT },
- { SparcLinux::TGT_O_TRUNC, O_TRUNC },
- { SparcLinux::TGT_O_EXCL, O_EXCL },
- { SparcLinux::TGT_O_NONBLOCK, O_NONBLOCK },
- { SparcLinux::TGT_O_NOCTTY, O_NOCTTY },
+ { SparcLinux::TGT_O_RDONLY, O_RDONLY },
+ { SparcLinux::TGT_O_WRONLY, O_WRONLY },
+ { SparcLinux::TGT_O_RDWR, O_RDWR },
+ { SparcLinux::TGT_O_APPEND, O_APPEND },
+ { SparcLinux::TGT_O_CREAT, O_CREAT },
+ { SparcLinux::TGT_O_TRUNC, O_TRUNC },
+ { SparcLinux::TGT_O_EXCL, O_EXCL },
+ { SparcLinux::TGT_O_NONBLOCK, O_NONBLOCK },
+ { SparcLinux::TGT_O_NOCTTY, O_NOCTTY },
#ifdef O_SYNC
- { SparcLinux::TGT_O_SYNC, O_SYNC },
+ { SparcLinux::TGT_O_SYNC, O_SYNC },
#endif
#endif /* _MSC_VER */
};
static OpenFlagTransTable openFlagTable[];
- static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 0x00004000; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
- static const int TGT_O_CREAT = 0x00000200; //!< O_CREAT
- static const int TGT_O_TRUNC = 0x00000400; //!< O_TRUNC
- static const int TGT_O_EXCL = 0x00000800; //!< O_EXCL
- static const int TGT_O_NOCTTY = 0x00008000; //!< O_NOCTTY
- static const int TGT_O_SYNC = 0x00002000; //!< O_SYNC
-// static const int TGT_O_DRD = 0x00010000; //!< O_DRD
-// static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
-// static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
-// static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
-// static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
+ static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 0x00004000; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
+ static const int TGT_O_CREAT = 0x00000200; //!< O_CREAT
+ static const int TGT_O_TRUNC = 0x00000400; //!< O_TRUNC
+ static const int TGT_O_EXCL = 0x00000800; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 0x00008000; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 0x00002000; //!< O_SYNC
+// static const int TGT_O_DRD = 0x00010000; //!< O_DRD
+// static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
+// static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
+// static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
+// static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
static const int NUM_OPEN_FLAGS;
private:
/* ASR Registers */
- //uint64_t y; // Y (used in obsolete multiplication)
- //uint8_t ccr; // Condition Code Register
- uint8_t asi; // Address Space Identifier
- uint64_t tick; // Hardware clock-tick counter
- uint8_t fprs; // Floating-Point Register State
- uint64_t gsr; // General Status Register
+ //uint64_t y; // Y (used in obsolete multiplication)
+ //uint8_t ccr; // Condition Code Register
+ uint8_t asi; // Address Space Identifier
+ uint64_t tick; // Hardware clock-tick counter
+ uint8_t fprs; // Floating-Point Register State
+ uint64_t gsr; // General Status Register
uint64_t softint;
- uint64_t tick_cmpr; // Hardware tick compare registers
- uint64_t stick; // Hardware clock-tick counter
- uint64_t stick_cmpr; // Hardware tick compare registers
+ uint64_t tick_cmpr; // Hardware tick compare registers
+ uint64_t stick; // Hardware clock-tick counter
+ uint64_t stick_cmpr; // Hardware tick compare registers
/* Privileged Registers */
- uint64_t tpc[MaxTL]; // Trap Program Counter (value from
+ uint64_t tpc[MaxTL]; // Trap Program Counter (value from
// previous trap level)
- uint64_t tnpc[MaxTL]; // Trap Next Program Counter (value from
+ uint64_t tnpc[MaxTL]; // Trap Next Program Counter (value from
// previous trap level)
- uint64_t tstate[MaxTL]; // Trap State
- uint16_t tt[MaxTL]; // Trap Type (Type of trap which occured
+ uint64_t tstate[MaxTL]; // Trap State
+ uint16_t tt[MaxTL]; // Trap Type (Type of trap which occured
// on the previous level)
- uint64_t tba; // Trap Base Address
-
- uint16_t pstate; // Process State Register
- uint8_t tl; // Trap Level
- uint8_t pil; // Process Interrupt Register
- uint8_t cwp; // Current Window Pointer
- //uint8_t cansave; // Savable windows
- //uint8_t canrestore; // Restorable windows
- //uint8_t cleanwin; // Clean windows
- //uint8_t otherwin; // Other windows
- //uint8_t wstate; // Window State
+ uint64_t tba; // Trap Base Address
+
+ uint16_t pstate; // Process State Register
+ uint8_t tl; // Trap Level
+ uint8_t pil; // Process Interrupt Register
+ uint8_t cwp; // Current Window Pointer
+ //uint8_t cansave; // Savable windows
+ //uint8_t canrestore; // Restorable windows
+ //uint8_t cleanwin; // Clean windows
+ //uint8_t otherwin; // Other windows
+ //uint8_t wstate; // Window State
uint8_t gl; // Global level register
/** Hyperprivileged Registers */
- uint64_t hpstate; // Hyperprivileged State Register
+ uint64_t hpstate; // Hyperprivileged State Register
uint64_t htstate[MaxTL];// Hyperprivileged Trap State Register
uint64_t hintp;
- uint64_t htba; // Hyperprivileged Trap Base Address register
- uint64_t hstick_cmpr; // Hardware tick compare registers
+ uint64_t htba; // Hyperprivileged Trap Base Address register
+ uint64_t hstick_cmpr; // Hardware tick compare registers
uint64_t strandStatusReg;// Per strand status register
/** Floating point misc registers. */
- uint64_t fsr; // Floating-Point State Register
+ uint64_t fsr; // Floating-Point State Register
/** MMU Internal Registers */
uint16_t priContext;
class RegFile
{
protected:
- Addr pc; // Program Counter
- Addr npc; // Next Program Counter
+ Addr pc; // Program Counter
+ Addr npc; // Next Program Counter
Addr nnpc;
public:
void setNextNPC(Addr val);
protected:
- IntRegFile intRegFile; // integer register file
- FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
+ IntRegFile intRegFile; // integer register file
+ FloatRegFile floatRegFile; // floating point register file
+ MiscRegFile miscRegFile; // control register file
public:
/*
* Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
+ * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
///////////////////////////////////////////////////////////
// RemoteGDB::acc
//
-// Determine if the mapping at va..(va+len) is valid.
+// Determine if the mapping at va..(va+len) is valid.
//
bool
RemoteGDB::acc(Addr va, size_t len)
///////////////////////////////////////////////////////////
// RemoteGDB::getregs
//
-// Translate the kernel debugger register format into
-// the GDB register format.
+// Translate the kernel debugger register format into
+// the GDB register format.
void
RemoteGDB::getregs()
{
///////////////////////////////////////////////////////////
// RemoteGDB::setregs
//
-// Translate the GDB register format into the kernel
-// debugger register format.
+// Translate the GDB register format into the kernel
+// debugger register format.
//
void
RemoteGDB::setregs()
// open(2) flags translation table
OpenFlagTransTable SparcSolaris::openFlagTable[] = {
#ifdef _MSC_VER
- { SparcSolaris::TGT_O_RDONLY, _O_RDONLY },
- { SparcSolaris::TGT_O_WRONLY, _O_WRONLY },
- { SparcSolaris::TGT_O_RDWR, _O_RDWR },
- { SparcSolaris::TGT_O_APPEND, _O_APPEND },
- { SparcSolaris::TGT_O_CREAT, _O_CREAT },
- { SparcSolaris::TGT_O_TRUNC, _O_TRUNC },
- { SparcSolaris::TGT_O_EXCL, _O_EXCL },
+ { SparcSolaris::TGT_O_RDONLY, _O_RDONLY },
+ { SparcSolaris::TGT_O_WRONLY, _O_WRONLY },
+ { SparcSolaris::TGT_O_RDWR, _O_RDWR },
+ { SparcSolaris::TGT_O_APPEND, _O_APPEND },
+ { SparcSolaris::TGT_O_CREAT, _O_CREAT },
+ { SparcSolaris::TGT_O_TRUNC, _O_TRUNC },
+ { SparcSolaris::TGT_O_EXCL, _O_EXCL },
#ifdef _O_NONBLOCK
- { SparcSolaris::TGT_O_NONBLOCK, _O_NONBLOCK },
- { SparcSolaris::TGT_O_NDELAY , _O_NONBLOCK },
+ { SparcSolaris::TGT_O_NONBLOCK, _O_NONBLOCK },
+ { SparcSolaris::TGT_O_NDELAY , _O_NONBLOCK },
#endif
#ifdef _O_NOCTTY
- { SparcSolaris::TGT_O_NOCTTY, _O_NOCTTY },
+ { SparcSolaris::TGT_O_NOCTTY, _O_NOCTTY },
#endif
#ifdef _O_SYNC
- { SparcSolaris::TGT_O_SYNC, _O_SYNC },
- { SparcSolaris::TGT_O_DSYNC, _O_SYNC },
- { SparcSolaris::TGT_O_RSYNC, _O_SYNC },
+ { SparcSolaris::TGT_O_SYNC, _O_SYNC },
+ { SparcSolaris::TGT_O_DSYNC, _O_SYNC },
+ { SparcSolaris::TGT_O_RSYNC, _O_SYNC },
#endif
#else /* !_MSC_VER */
- { SparcSolaris::TGT_O_RDONLY, O_RDONLY },
- { SparcSolaris::TGT_O_WRONLY, O_WRONLY },
- { SparcSolaris::TGT_O_RDWR, O_RDWR },
- { SparcSolaris::TGT_O_APPEND, O_APPEND },
- { SparcSolaris::TGT_O_CREAT, O_CREAT },
- { SparcSolaris::TGT_O_TRUNC, O_TRUNC },
- { SparcSolaris::TGT_O_EXCL, O_EXCL },
- { SparcSolaris::TGT_O_NONBLOCK, O_NONBLOCK },
- { SparcSolaris::TGT_O_NDELAY , O_NONBLOCK },
- { SparcSolaris::TGT_O_NOCTTY, O_NOCTTY },
+ { SparcSolaris::TGT_O_RDONLY, O_RDONLY },
+ { SparcSolaris::TGT_O_WRONLY, O_WRONLY },
+ { SparcSolaris::TGT_O_RDWR, O_RDWR },
+ { SparcSolaris::TGT_O_APPEND, O_APPEND },
+ { SparcSolaris::TGT_O_CREAT, O_CREAT },
+ { SparcSolaris::TGT_O_TRUNC, O_TRUNC },
+ { SparcSolaris::TGT_O_EXCL, O_EXCL },
+ { SparcSolaris::TGT_O_NONBLOCK, O_NONBLOCK },
+ { SparcSolaris::TGT_O_NDELAY , O_NONBLOCK },
+ { SparcSolaris::TGT_O_NOCTTY, O_NOCTTY },
#ifdef O_SYNC
- { SparcSolaris::TGT_O_SYNC, O_SYNC },
- { SparcSolaris::TGT_O_DSYNC, O_SYNC },
- { SparcSolaris::TGT_O_RSYNC, O_SYNC },
+ { SparcSolaris::TGT_O_SYNC, O_SYNC },
+ { SparcSolaris::TGT_O_DSYNC, O_SYNC },
+ { SparcSolaris::TGT_O_RSYNC, O_SYNC },
#endif
#endif /* _MSC_VER */
};
static OpenFlagTransTable openFlagTable[];
- static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
- static const int TGT_O_NDELAY = 0x00000004; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
+ static const int TGT_O_RDONLY = 0x00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 0x00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 0x00000002; //!< O_RDWR
+ static const int TGT_O_NDELAY = 0x00000004; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 0x00000008; //!< O_APPEND
static const int TGT_O_SYNC = 0x00000010; //!< O_SYNC
static const int TGT_O_DSYNC = 0x00000040; //!< O_SYNC
static const int TGT_O_RSYNC = 0x00008000; //!< O_SYNC
static const int TGT_O_NONBLOCK = 0x00000080; //!< O_NONBLOCK
static const int TGT_O_PRIV = 0x00001000; //??
static const int TGT_O_LARGEFILE = 0x00002000; //??
- static const int TGT_O_CREAT = 0x00000100; //!< O_CREAT
- static const int TGT_O_TRUNC = 0x00000200; //!< O_TRUNC
- static const int TGT_O_EXCL = 0x00000400; //!< O_EXCL
- static const int TGT_O_NOCTTY = 0x00000800; //!< O_NOCTTY
- static const int TGT_O_XATTR = 0x00004000; //??
+ static const int TGT_O_CREAT = 0x00000100; //!< O_CREAT
+ static const int TGT_O_TRUNC = 0x00000200; //!< O_TRUNC
+ static const int TGT_O_EXCL = 0x00000400; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 0x00000800; //!< O_NOCTTY
+ static const int TGT_O_XATTR = 0x00004000; //??
static const int NUM_OPEN_FLAGS;
// const int NumRegularIntRegs = MaxGL * 8 + NWindows * 16;
// const int NumMicroIntRegs = 1;
// const int NumIntRegs =
-// NumRegularIntRegs +
-// NumMicroIntRegs;
+// NumRegularIntRegs +
+// NumMicroIntRegs;
// const int NumFloatRegs = 64;
// const int NumMiscRegs = 40;
}
microcode = ""
#let {{
# class LFENCE(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class SFENCE(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class MFENCE(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class PREFETCHlevel(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class PREFETCH(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class PREFETCHW(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class CLFLUSH(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
'''
#let {{
# class CALL(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
'''
#let {{
# class INT(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class INTO(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class AAA(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class AAD(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class AAM(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class AAS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class DAA(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class DAS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class BSWAP(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class MOVMSKPS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class MOVMSKPD(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
'''
#let {{
# class MOVD(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class MOVNTI(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class LDS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class LES(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class LFS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class LGS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class LSS(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class MOV_SEG(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class POP(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
'''
#let {{
# class XADD(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class XCHG(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
microcode = ""
#let {{
# class SYSENTER(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class SYSEXIT(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class SYSCALL(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
# class SYSRET(Inst):
-# "GenFault ${new UnimpInstFault}"
+# "GenFault ${new UnimpInstFault}"
#}};
static OpenFlagTransTable openFlagTable[];
- static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
- static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
- static const int TGT_O_RDWR = 00000002; //!< O_RDWR
- static const int TGT_O_NONBLOCK = 00004000; //!< O_NONBLOCK
- static const int TGT_O_APPEND = 00002000; //!< O_APPEND
- static const int TGT_O_CREAT = 00000100; //!< O_CREAT
- static const int TGT_O_TRUNC = 00001000; //!< O_TRUNC
- static const int TGT_O_EXCL = 00000200; //!< O_EXCL
- static const int TGT_O_NOCTTY = 00000400; //!< O_NOCTTY
- static const int TGT_O_SYNC = 00010000; //!< O_SYNC
-// static const int TGT_O_DRD = 0x00010000; //!< O_DRD
-// static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
-// static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
-// static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
-// static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
+ static const int TGT_O_RDONLY = 00000000; //!< O_RDONLY
+ static const int TGT_O_WRONLY = 00000001; //!< O_WRONLY
+ static const int TGT_O_RDWR = 00000002; //!< O_RDWR
+ static const int TGT_O_NONBLOCK = 00004000; //!< O_NONBLOCK
+ static const int TGT_O_APPEND = 00002000; //!< O_APPEND
+ static const int TGT_O_CREAT = 00000100; //!< O_CREAT
+ static const int TGT_O_TRUNC = 00001000; //!< O_TRUNC
+ static const int TGT_O_EXCL = 00000200; //!< O_EXCL
+ static const int TGT_O_NOCTTY = 00000400; //!< O_NOCTTY
+ static const int TGT_O_SYNC = 00010000; //!< O_SYNC
+// static const int TGT_O_DRD = 0x00010000; //!< O_DRD
+// static const int TGT_O_DIRECTIO = 0x00020000; //!< O_DIRECTIO
+// static const int TGT_O_CACHE = 0x00002000; //!< O_CACHE
+// static const int TGT_O_DSYNC = 0x00008000; //!< O_DSYNC
+// static const int TGT_O_RSYNC = 0x00040000; //!< O_RSYNC
static const int NUM_OPEN_FLAGS;
/*
* Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
+ * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
#include <inttypes.h>
#include "base/bitfield.hh"
-// The following implements the BitUnion system of defining bitfields
+// The following implements the BitUnion system of defining bitfields
//on top of an underlying class. This is done through the pervasive use of
//both named and unnamed unions which all contain the same actual storage.
//Since they're unioned with each other, all of these storage locations
/*
* Copyright (c) 1988, 1992, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
assert(bucket > 0 && bucket < Num_Buckets);
int sz = bucket * Alloc_Quantum;
- const int nstructs = Num_Structs_Per_New; // how many to allocate?
+ const int nstructs = Num_Structs_Per_New; // how many to allocate?
char *p = ::new char[nstructs * sz];
#if FAST_ALLOC_STATS
#if FAST_ALLOC_DEBUG
FastAlloc();
- FastAlloc(FastAlloc*,FastAlloc*); // for inUseHead, see below
+ FastAlloc(FastAlloc*,FastAlloc*); // for inUseHead, see below
virtual ~FastAlloc();
#else
virtual ~FastAlloc() {}
#if FAST_ALLOC_DEBUG
// per-object debugging fields
- bool inUse; // in-use flag
- FastAlloc *inUsePrev; // ptrs to build list of in-use objects
+ bool inUse; // in-use flag
+ FastAlloc *inUsePrev; // ptrs to build list of in-use objects
FastAlloc *inUseNext;
// static (global) debugging vars
- static int numInUse; // count in-use objects
- static FastAlloc inUseHead; // dummy head for list of in-use objects
+ static int numInUse; // count in-use objects
+ static FastAlloc inUseHead; // dummy head for list of in-use objects
public:
// functions to dump debugging info (see fast_alloc.cc for C
///
class Entry
{
- std::string value; ///< The entry value.
- mutable bool referenced; ///< Has this entry been used?
+ std::string value; ///< The entry value.
+ mutable bool referenced; ///< Has this entry been used?
public:
/// Constructor.
/// EntryTable type. Map of strings to Entry object pointers.
typedef m5::hash_map<std::string, Entry *> EntryTable;
- EntryTable table; ///< Table of entries.
- mutable bool referenced; ///< Has this section been used?
+ EntryTable table; ///< Table of entries.
+ mutable bool referenced; ///< Has this section been used?
public:
/// Constructor.
#include "base/loader/symtab.hh"
-#include "base/trace.hh" // for DPRINTF
+#include "base/trace.hh" // for DPRINTF
#include "base/loader/exec_aout.h"
*
* Symbols are assumed to be in 'encounter order' - i.e. the order that
* the things they represent were encountered by the compiler/assembler/loader.
- * EXCEPT for globals! These are assumed to be bunched together,
+ * EXCEPT for globals! These are assumed to be bunched together,
* probably right after the last 'normal' symbol. Globals ARE sorted
* in ascending order.
*
* All "ifooMax" values are the highest legal value PLUS ONE. This makes
* them good for allocating arrays, etc. All checks are "ifoo < ifooMax".
*
- * "isym" Index into the SYMbol table.
- * "ipd" Index into the Procedure Descriptor array.
- * "ifd" Index into the File Descriptor array.
- * "iss" Index into String Space.
- * "cb" Count of Bytes.
- * "rgPd" array whose domain is "0..ipdMax-1" and RanGe is PDR.
- * "rgFd" array whose domain is "0..ifdMax-1" and RanGe is FDR.
+ * "isym" Index into the SYMbol table.
+ * "ipd" Index into the Procedure Descriptor array.
+ * "ifd" Index into the File Descriptor array.
+ * "iss" Index into String Space.
+ * "cb" Count of Bytes.
+ * "rgPd" array whose domain is "0..ipdMax-1" and RanGe is PDR.
+ * "rgFd" array whose domain is "0..ifdMax-1" and RanGe is FDR.
*/
*/
typedef struct ecoff_symhdr {
- coff_short magic; /* to verify validity of the table */
- coff_short vstamp; /* version stamp */
- coff_int ilineMax; /* number of line number entries */
- coff_int idnMax; /* max index into dense number table */
- coff_int ipdMax; /* number of procedures */
- coff_int isymMax; /* number of local symbols */
- coff_int ioptMax; /* max index into optimization symbol entries */
- coff_int iauxMax; /* number of auxillary symbol entries */
- coff_int issMax; /* max index into local strings */
- coff_int issExtMax; /* max index into external strings */
- coff_int ifdMax; /* number of file descriptor entries */
- coff_int crfd; /* number of relative file descriptor entries */
- coff_int iextMax; /* max index into external symbols */
- coff_addr cbLine; /* number of bytes for line number entries */
- coff_addr cbLineOffset; /* offset to start of line number entries*/
- coff_addr cbDnOffset; /* offset to start dense number table */
- coff_addr cbPdOffset; /* offset to procedure descriptor table */
- coff_addr cbSymOffset; /* offset to start of local symbols*/
- coff_addr cbOptOffset; /* offset to optimization symbol entries */
- coff_addr cbAuxOffset; /* offset to start of auxillary symbol entries*/
- coff_addr cbSsOffset; /* offset to start of local strings */
- coff_addr cbSsExtOffset; /* offset to start of external strings */
- coff_addr cbFdOffset; /* offset to file descriptor table */
- coff_addr cbRfdOffset; /* offset to relative file descriptor table */
- coff_addr cbExtOffset; /* offset to start of external symbol entries*/
+ coff_short magic; /* to verify validity of the table */
+ coff_short vstamp; /* version stamp */
+ coff_int ilineMax; /* number of line number entries */
+ coff_int idnMax; /* max index into dense number table */
+ coff_int ipdMax; /* number of procedures */
+ coff_int isymMax; /* number of local symbols */
+ coff_int ioptMax; /* max index into optimization symbol entries */
+ coff_int iauxMax; /* number of auxillary symbol entries */
+ coff_int issMax; /* max index into local strings */
+ coff_int issExtMax; /* max index into external strings */
+ coff_int ifdMax; /* number of file descriptor entries */
+ coff_int crfd; /* number of relative file descriptor entries */
+ coff_int iextMax; /* max index into external symbols */
+ coff_addr cbLine; /* number of bytes for line number entries */
+ coff_addr cbLineOffset; /* offset to start of line number entries*/
+ coff_addr cbDnOffset; /* offset to start dense number table */
+ coff_addr cbPdOffset; /* offset to procedure descriptor table */
+ coff_addr cbSymOffset; /* offset to start of local symbols*/
+ coff_addr cbOptOffset; /* offset to optimization symbol entries */
+ coff_addr cbAuxOffset; /* offset to start of auxillary symbol entries*/
+ coff_addr cbSsOffset; /* offset to start of local strings */
+ coff_addr cbSsExtOffset; /* offset to start of external strings */
+ coff_addr cbFdOffset; /* offset to file descriptor table */
+ coff_addr cbRfdOffset; /* offset to relative file descriptor table */
+ coff_addr cbExtOffset; /* offset to start of external symbol entries*/
/* If you add machine dependent fields, add them here */
} HDRR, *pHDRR;
#define cbHDRR sizeof(HDRR)
*
* There is one of these for EVERY FILE, whether compiled with
* full debugging symbols or not. The name of a file should be
- * the path name given to the compiler. This allows the user
+ * the path name given to the compiler. This allows the user
* to simply specify the names of the directories where the COMPILES
* were done, and we will be able to find their files.
* A field whose comment starts with "R - " indicates that it will be
* setup at runtime.
*/
typedef struct ecoff_fdr {
- coff_addr adr; /* memory address of beginning of file */
- coff_addr cbLineOffset; /* byte offset from header for this file ln's */
- coff_addr cbLine; /* size of lines for this file */
- coff_addr cbSs; /* number of bytes in the ss */
- coff_int rss; /* file name (of source, if known) */
- coff_int issBase; /* file's string space */
- coff_int isymBase; /* beginning of symbols */
- coff_int csym; /* count file's of symbols */
- coff_int ilineBase; /* file's line symbols */
- coff_int cline; /* count of file's line symbols */
- coff_int ioptBase; /* file's optimization entries */
- coff_int copt; /* count of file's optimization entries */
- coff_int ipdFirst; /* start of procedures for this file */
- coff_int cpd; /* count of procedures for this file */
- coff_int iauxBase; /* file's auxiliary entries */
- coff_int caux; /* count of file's auxiliary entries */
- coff_int rfdBase; /* index into the file indirect table */
- coff_int crfd; /* count file indirect entries */
- unsigned lang: 5; /* language for this file */
- unsigned fMerge : 1; /* whether this file can be merged */
- unsigned fReadin : 1; /* true if it was read in (not just created) */
+ coff_addr adr; /* memory address of beginning of file */
+ coff_addr cbLineOffset; /* byte offset from header for this file ln's */
+ coff_addr cbLine; /* size of lines for this file */
+ coff_addr cbSs; /* number of bytes in the ss */
+ coff_int rss; /* file name (of source, if known) */
+ coff_int issBase; /* file's string space */
+ coff_int isymBase; /* beginning of symbols */
+ coff_int csym; /* count file's of symbols */
+ coff_int ilineBase; /* file's line symbols */
+ coff_int cline; /* count of file's line symbols */
+ coff_int ioptBase; /* file's optimization entries */
+ coff_int copt; /* count of file's optimization entries */
+ coff_int ipdFirst; /* start of procedures for this file */
+ coff_int cpd; /* count of procedures for this file */
+ coff_int iauxBase; /* file's auxiliary entries */
+ coff_int caux; /* count of file's auxiliary entries */
+ coff_int rfdBase; /* index into the file indirect table */
+ coff_int crfd; /* count file indirect entries */
+ unsigned lang: 5; /* language for this file */
+ unsigned fMerge : 1; /* whether this file can be merged */
+ unsigned fReadin : 1; /* true if it was read in (not just created) */
unsigned fBigendian : 1;/* if set, was compiled on big endian machine */
- /* aux's will be in compile host's sex */
- unsigned glevel : 2; /* level this file was compiled with */
+ /* aux's will be in compile host's sex */
+ unsigned glevel : 2; /* level this file was compiled with */
unsigned reserved : 22; /* reserved for future use */
- coff_uint reserved2;
+ coff_uint reserved2;
} FDR, *pFDR;
#define cbFDR sizeof(FDR)
#define fdNil ((pFDR)0)
*/
typedef struct pdr {
- coff_addr adr; /* memory address of start of procedure */
- coff_addr cbLineOffset; /* byte offset for this procedure from the fd base */
- coff_int isym; /* start of local symbol entries */
- coff_int iline; /* start of line number entries*/
- coff_uint regmask; /* save register mask */
- coff_int regoffset; /* save register offset */
- coff_int iopt; /* start of optimization symbol entries*/
- coff_uint fregmask; /* save floating point register mask */
- coff_int fregoffset; /* save floating point register offset */
- coff_int frameoffset; /* frame size */
- coff_int lnLow; /* lowest line in the procedure */
- coff_int lnHigh; /* highest line in the procedure */
+ coff_addr adr; /* memory address of start of procedure */
+ coff_addr cbLineOffset; /* byte offset for this procedure from the fd base */
+ coff_int isym; /* start of local symbol entries */
+ coff_int iline; /* start of line number entries*/
+ coff_uint regmask; /* save register mask */
+ coff_int regoffset; /* save register offset */
+ coff_int iopt; /* start of optimization symbol entries*/
+ coff_uint fregmask; /* save floating point register mask */
+ coff_int fregoffset; /* save floating point register offset */
+ coff_int frameoffset; /* frame size */
+ coff_int lnLow; /* lowest line in the procedure */
+ coff_int lnHigh; /* highest line in the procedure */
/* These fields are new for 64 bit ECOFF. */
unsigned gp_prologue : 8; /* byte size of GP prologue */
- unsigned gp_used : 1; /* true if the procedure uses GP */
- unsigned reg_frame : 1; /* true if register frame procedure */
- unsigned prof : 1; /* true if compiled with -pg */
- unsigned reserved : 13; /* reserved: must be zero */
- unsigned localoff : 8; /* offset of local variables from vfp */
- coff_short framereg; /* frame pointer register */
- coff_short pcreg; /* offset or reg of return pc */
+ unsigned gp_used : 1; /* true if the procedure uses GP */
+ unsigned reg_frame : 1; /* true if register frame procedure */
+ unsigned prof : 1; /* true if compiled with -pg */
+ unsigned reserved : 13; /* reserved: must be zero */
+ unsigned localoff : 8; /* offset of local variables from vfp */
+ coff_short framereg; /* frame pointer register */
+ coff_short pcreg; /* offset or reg of return pc */
} PDR, *pPDR;
#define cbPDR sizeof(PDR)
#define pdNil ((pPDR) 0)
-#define ipdNil -1
+#define ipdNil -1
/*
* The structure of the runtime procedure descriptor created by the loader
*/
#if 0
typedef struct runtime_pdr {
- coff_addr adr; /* memory address of start of procedure */
- coff_uint regmask; /* save register mask */
- coff_int regoffset; /* save register offset */
- coff_uint fregmask; /* save floating point register mask */
- coff_int fregoffset; /* save floating point register offset */
- coff_int frameoffset; /* frame size */
- coff_ushort framereg; /* frame pointer register */
- coff_ushort pcreg; /* offset or reg of return pc */
- coff_int irpss; /* index into the runtime string table */
- coff_uint reserved;
+ coff_addr adr; /* memory address of start of procedure */
+ coff_uint regmask; /* save register mask */
+ coff_int regoffset; /* save register offset */
+ coff_uint fregmask; /* save floating point register mask */
+ coff_int fregoffset; /* save floating point register offset */
+ coff_int frameoffset; /* frame size */
+ coff_ushort framereg; /* frame pointer register */
+ coff_ushort pcreg; /* offset or reg of return pc */
+ coff_int irpss; /* index into the runtime string table */
+ coff_uint reserved;
struct exception_info *exception_info;/* pointer to exception array */
} RPDR, *pRPDR;
#define cbRPDR sizeof(RPDR)
* the first line of a procedure and represent the first address.
*/
-typedef coff_int LINER, *pLINER;
+typedef coff_int LINER, *pLINER;
#define lineNil ((pLINER)0)
#define cbLINER sizeof(LINER)
-#define ilineNil -1
+#define ilineNil -1
/*
- * The Symbol Structure (GFW, to those who Know!)
+ * The Symbol Structure (GFW, to those who Know!)
*/
typedef struct ecoff_sym {
- coff_long value; /* value of symbol */
- coff_int iss; /* index into String Space of name */
- unsigned st : 6; /* symbol type */
- unsigned sc : 5; /* storage class - text, data, etc */
- unsigned reserved : 1; /* reserved */
- unsigned index : 20; /* index into sym/aux table */
+ coff_long value; /* value of symbol */
+ coff_int iss; /* index into String Space of name */
+ unsigned st : 6; /* symbol type */
+ unsigned sc : 5; /* storage class - text, data, etc */
+ unsigned reserved : 1; /* reserved */
+ unsigned index : 20; /* index into sym/aux table */
} SYMR, *pSYMR;
#define symNil ((pSYMR)0)
#define cbSYMR sizeof(SYMR)
/* E X T E R N A L S Y M B O L R E C O R D
*
- * Same as the SYMR except it contains file context to determine where
- * the index is.
+ * Same as the SYMR except it contains file context to determine where
+ * the index is.
*/
typedef struct ecoff_extsym {
- SYMR asym; /* symbol for the external */
- unsigned jmptbl:1; /* symbol is a jump table entry for shlibs */
- unsigned cobol_main:1; /* symbol is a cobol main procedure */
- unsigned weakext:1; /* symbol is weak external */
- unsigned reserved:29; /* reserved for future use */
- coff_int ifd; /* where the iss and index fields point into */
+ SYMR asym; /* symbol for the external */
+ unsigned jmptbl:1; /* symbol is a jump table entry for shlibs */
+ unsigned cobol_main:1; /* symbol is a cobol main procedure */
+ unsigned weakext:1; /* symbol is weak external */
+ unsigned reserved:29; /* reserved for future use */
+ coff_int ifd; /* where the iss and index fields point into */
} EXTR, *pEXTR;
#define extNil ((pEXTR)0)
#define cbEXTR sizeof(EXTR)
-/* A U X I L L A R Y T Y P E I N F O R M A T I O N */
+/* A U X I L L A R Y T Y P E I N F O R M A T I O N */
/*
* Type Information Record
typedef struct {
unsigned fBitfield : 1; /* set if bit width is specified */
unsigned continued : 1; /* indicates additional TQ info in next AUX */
- unsigned bt : 6; /* basic type */
+ unsigned bt : 6; /* basic type */
unsigned tq4 : 4;
unsigned tq5 : 4;
/* ---- 16 bit boundary ---- */
unsigned tq0 : 4;
- unsigned tq1 : 4; /* 6 type qualifiers - tqPtr, etc. */
+ unsigned tq1 : 4; /* 6 type qualifiers - tqPtr, etc. */
unsigned tq2 : 4;
unsigned tq3 : 4;
} TIR, *pTIR;
* Relative symbol record
*
* If the rfd field is 4095, the index field indexes into the global symbol
- * table.
+ * table.
*/
typedef struct {
- unsigned rfd : 12; /* index into the file indirect table */
- unsigned index : 20; /* index int sym/aux/iss tables */
+ unsigned rfd : 12; /* index into the file indirect table */
+ unsigned index : 20; /* index int sym/aux/iss tables */
} RNDXR, *pRNDXR;
#define cbRNDXR sizeof(RNDXR)
#define rndxNil ((pRNDXR)0)
/* dense numbers or sometimes called block numbers are stored in this type,
- * a rfd of 0xffffffff is an index into the global table.
+ * a rfd of 0xffffffff is an index into the global table.
*/
typedef struct {
- coff_uint rfd; /* index into the file table */
- coff_uint index; /* index int sym/aux/iss tables */
+ coff_uint rfd; /* index into the file table */
+ coff_uint index; /* index int sym/aux/iss tables */
} DNR, *pDNR;
#define cbDNR sizeof(DNR)
#define dnNil ((pDNR)0)
* Auxillary information occurs only if needed.
* It ALWAYS occurs in this order when present.
- isymMac used by stProc only
- TIR type info
- TIR additional TQ info (if first TIR was not enough)
- rndx if (bt == btStruct,btUnion,btEnum,btSet,btRange,
+ isymMac used by stProc only
+ TIR type info
+ TIR additional TQ info (if first TIR was not enough)
+ rndx if (bt == btStruct,btUnion,btEnum,btSet,btRange,
btTypedef):
rsym.index == iaux for btSet or btRange
else rsym.index == isym
- dimLow btRange, btSet
- dimMac btRange, btSet
- rndx0 As many as there are tq arrays
+ dimLow btRange, btSet
+ dimMac btRange, btSet
+ rndx0 As many as there are tq arrays
dimLow0
dimHigh0
...
rndxMax-1
dimLowMax-1
dimHighMax-1
- width in bits if (bit field), width in bits.
+ width in bits if (bit field), width in bits.
*/
#define cAuxMax (6 + (idimMax*3))
/* a union of all possible info in the AUX universe */
typedef union {
- TIR ti; /* type information record */
- RNDXR rndx; /* relative index into symbol table */
- coff_int dnLow; /* low dimension */
- coff_int dnHigh; /* high dimension */
- coff_int isym; /* symbol table index (end of proc) */
- coff_int iss; /* index into string space (not used) */
- coff_int width; /* width for non-default sized struc fields */
- coff_int count; /* count of ranges for variant arm */
+ TIR ti; /* type information record */
+ RNDXR rndx; /* relative index into symbol table */
+ coff_int dnLow; /* low dimension */
+ coff_int dnHigh; /* high dimension */
+ coff_int isym; /* symbol table index (end of proc) */
+ coff_int iss; /* index into string space (not used) */
+ coff_int width; /* width for non-default sized struc fields */
+ coff_int count; /* count of ranges for variant arm */
} AUXU, *pAUXU;
#define cbAUXU sizeof(AUXU)
#define auxNil ((pAUXU)0)
*/
typedef struct {
- unsigned ot: 8; /* optimization type */
- unsigned value: 24; /* address where we are moving it to */
- RNDXR rndx; /* points to a symbol or opt entry */
- coff_ulong offset; /* relative offset this occured */
+ unsigned ot: 8; /* optimization type */
+ unsigned value: 24; /* address where we are moving it to */
+ RNDXR rndx; /* points to a symbol or opt entry */
+ coff_ulong offset; /* relative offset this occured */
} OPTR, *pOPTR;
-#define optNil ((pOPTR) 0)
+#define optNil ((pOPTR) 0)
#define cbOPTR sizeof(OPTR)
#define ioptNil -1
* File Indirect
*
* When a symbol is referenced across files the following procedure is used:
- * 1) use the file index to get the File indirect entry.
- * 2) use the file indirect entry to get the File descriptor.
- * 3) add the sym index to the base of that file's sym table
+ * 1) use the file index to get the File indirect entry.
+ * 2) use the file indirect entry to get the File descriptor.
+ * 3) add the sym index to the base of that file's sym table
*
*/
typedef coff_long RFDT, *pRFDT;
#define cbRFDT sizeof(RFDT)
-#define rfdNil -1
+#define rfdNil -1
/*
* The file indirect table in the mips loader is known as an array of FITs.
* these tables are merged. Note this is only a name change.
*/
typedef coff_int FIT, *pFIT;
-#define cbFIT sizeof(FIT)
-#define ifiNil -1
-#define fiNil ((pFIT) 0)
+#define cbFIT sizeof(FIT)
+#define ifiNil -1
+#define fiNil ((pFIT) 0)
#ifdef _LANGUAGE_PASCAL
#define ifdNil -1
#define ioptNil -1
#define rfdNil -1
#define ifiNil -1
-#endif /* _LANGUAGE_PASCAL */
+#endif /* _LANGUAGE_PASCAL */
/* Dense numbers
*
* Rather than use file index, symbol index pairs to represent symbols
- * and globals, we use dense number so that they can be easily embeded
- * in intermediate code and the programs that process them can
- * use direct access tabls instead of hash table (which would be
- * necesary otherwise because of the sparse name space caused by
- * file index, symbol index pairs. Dense number are represented
- * by RNDXRs.
+ * and globals, we use dense number so that they can be easily embeded
+ * in intermediate code and the programs that process them can
+ * use direct access tabls instead of hash table (which would be
+ * necesary otherwise because of the sparse name space caused by
+ * file index, symbol index pairs. Dense number are represented
+ * by RNDXRs.
*/
/*
* a function of the "st". (scD/B == scData OR scBss)
*
* Note: the value "isymMac" is used by symbols that have the concept
- * of enclosing a block of related information. This value is the
+ * of enclosing a block of related information. This value is the
* isym of the first symbol AFTER the end associated with the primary
* symbol. For example if a procedure was at isym==90 and had an
* isymMac==155, the associated end would be at isym==154, and the
* isym of the primary symbol that started the block.
*
-ST SC VALUE INDEX
--------- ------ -------- ------
-stFile scText address isymMac
-stLabel scText address ---
-stGlobal scD/B address iaux
-stStatic scD/B address iaux
-stParam scAbs offset iaux
-stLocal scAbs offset iaux
-stProc scText address iaux (isymMac is first AUX)
-stStaticProc scText address iaux (isymMac is first AUX)
-
-stMember scNil ordinal --- (if member of enum)
+ST SC VALUE INDEX
+-------- ------ -------- ------
+stFile scText address isymMac
+stLabel scText address ---
+stGlobal scD/B address iaux
+stStatic scD/B address iaux
+stParam scAbs offset iaux
+stLocal scAbs offset iaux
+stProc scText address iaux (isymMac is first AUX)
+stStaticProc scText address iaux (isymMac is first AUX)
+
+stMember scNil ordinal --- (if member of enum)
(mipsread thinks the case below has a bit, not byte, offset.)
-stMember scNil byte offset iaux (if member of struct/union)
-stMember scBits bit offset iaux (bit field spec)
+stMember scNil byte offset iaux (if member of struct/union)
+stMember scBits bit offset iaux (bit field spec)
-stBlock scText address isymMac (text block)
+stBlock scText address isymMac (text block)
(the code seems to think that rather than scNil, we see scInfo for
the two cases below.)
-stBlock scNil cb isymMac (struct/union member define)
-stBlock scNil cMembers isymMac (enum member define)
+stBlock scNil cb isymMac (struct/union member define)
+stBlock scNil cMembers isymMac (enum member define)
(New types added by SGI to simplify things:)
-stStruct scInfo cb isymMac (struct type define)
-stUnion scInfo cb isymMac (union type define)
-stEnum scInfo cMembers isymMac (enum type define)
+stStruct scInfo cb isymMac (struct type define)
+stUnion scInfo cb isymMac (union type define)
+stEnum scInfo cMembers isymMac (enum type define)
-stEnd scText address isymStart
-stEnd scNil ------- isymStart (struct/union/enum)
+stEnd scText address isymStart
+stEnd scNil ------- isymStart (struct/union/enum)
-stTypedef scNil ------- iaux
-stRegReloc sc??? value old register number
-stForward sc??? new address isym to original symbol
+stTypedef scNil ------- iaux
+stRegReloc sc??? value old register number
+stForward sc??? new address isym to original symbol
-stConstant scInfo value --- (scalar)
-stConstant scInfo iss --- (complex, e.g. string)
+stConstant scInfo value --- (scalar)
+stConstant scInfo iss --- (complex, e.g. string)
*
*/
*/
/* glevels for field in FDR */
-#define GLEVEL_0 2
-#define GLEVEL_1 1
-#define GLEVEL_2 0 /* for upward compat reasons. */
-#define GLEVEL_3 3
+#define GLEVEL_0 2
+#define GLEVEL_1 1
+#define GLEVEL_2 0 /* for upward compat reasons. */
+#define GLEVEL_3 3
/* magic number fo symheader */
-#define magicSym 0x7009
+#define magicSym 0x7009
/* The Alpha uses this value instead, for some reason. */
-#define magicSym2 0x1992
+#define magicSym2 0x1992
/* Language codes */
-#define langC 0
-#define langPascal 1
-#define langFortran 2
-#define langAssembler 3 /* one Assembley inst might map to many mach */
-#define langMachine 4
-#define langNil 5
-#define langAda 6
-#define langPl1 7
-#define langCobol 8
-#define langStdc 9 /* FIXME: Collides with SGI langCplusplus */
-#define langCplusplus 9 /* FIXME: Collides with langStdc */
-#define langCplusplusV2 10 /* SGI addition */
-#define langMax 11 /* maximun allowed 32 -- 5 bits */
+#define langC 0
+#define langPascal 1
+#define langFortran 2
+#define langAssembler 3 /* one Assembley inst might map to many mach */
+#define langMachine 4
+#define langNil 5
+#define langAda 6
+#define langPl1 7
+#define langCobol 8
+#define langStdc 9 /* FIXME: Collides with SGI langCplusplus */
+#define langCplusplus 9 /* FIXME: Collides with langStdc */
+#define langCplusplusV2 10 /* SGI addition */
+#define langMax 11 /* maximun allowed 32 -- 5 bits */
/* The following are value definitions for the fields in the SYMR */
* Storage Classes
*/
-#define scNil 0
-#define scText 1 /* text symbol */
-#define scData 2 /* initialized data symbol */
-#define scBss 3 /* un-initialized data symbol */
-#define scRegister 4 /* value of symbol is register number */
-#define scAbs 5 /* value of symbol is absolute */
-#define scUndefined 6 /* who knows? */
-#define scCdbLocal 7 /* variable's value is IN se->va.?? */
-#define scBits 8 /* this is a bit field */
-#define scCdbSystem 9 /* variable's value is IN CDB's address space */
-#define scDbx 9 /* overlap dbx internal use */
-#define scRegImage 10 /* register value saved on stack */
-#define scInfo 11 /* symbol contains debugger information */
-#define scUserStruct 12 /* address in struct user for current process */
-#define scSData 13 /* load time only small data */
-#define scSBss 14 /* load time only small common */
-#define scRData 15 /* load time only read only data */
-#define scVar 16 /* Var parameter (fortran,pascal) */
-#define scCommon 17 /* common variable */
-#define scSCommon 18 /* small common */
-#define scVarRegister 19 /* Var parameter in a register */
-#define scVariant 20 /* Variant record */
-#define scSUndefined 21 /* small undefined(external) data */
-#define scInit 22 /* .init section symbol */
-#define scBasedVar 23 /* Fortran or PL/1 ptr based var */
+#define scNil 0
+#define scText 1 /* text symbol */
+#define scData 2 /* initialized data symbol */
+#define scBss 3 /* un-initialized data symbol */
+#define scRegister 4 /* value of symbol is register number */
+#define scAbs 5 /* value of symbol is absolute */
+#define scUndefined 6 /* who knows? */
+#define scCdbLocal 7 /* variable's value is IN se->va.?? */
+#define scBits 8 /* this is a bit field */
+#define scCdbSystem 9 /* variable's value is IN CDB's address space */
+#define scDbx 9 /* overlap dbx internal use */
+#define scRegImage 10 /* register value saved on stack */
+#define scInfo 11 /* symbol contains debugger information */
+#define scUserStruct 12 /* address in struct user for current process */
+#define scSData 13 /* load time only small data */
+#define scSBss 14 /* load time only small common */
+#define scRData 15 /* load time only read only data */
+#define scVar 16 /* Var parameter (fortran,pascal) */
+#define scCommon 17 /* common variable */
+#define scSCommon 18 /* small common */
+#define scVarRegister 19 /* Var parameter in a register */
+#define scVariant 20 /* Variant record */
+#define scSUndefined 21 /* small undefined(external) data */
+#define scInit 22 /* .init section symbol */
+#define scBasedVar 23 /* Fortran or PL/1 ptr based var */
#define scXData 24 /* exception handling data */
#define scPData 25 /* Procedure section */
#define scFini 26 /* .fini section */
-#define scRConst 27 /* .rconst section */
-#define scMax 32
+#define scRConst 27 /* .rconst section */
+#define scMax 32
/*
* Symbol Types
*/
-#define stNil 0 /* Nuthin' special */
-#define stGlobal 1 /* external symbol */
-#define stStatic 2 /* static */
-#define stParam 3 /* procedure argument */
-#define stLocal 4 /* local variable */
-#define stLabel 5 /* label */
-#define stProc 6 /* " " Procedure */
-#define stBlock 7 /* beginnning of block */
-#define stEnd 8 /* end (of anything) */
-#define stMember 9 /* member (of anything - struct/union/enum */
-#define stTypedef 10 /* type definition */
-#define stFile 11 /* file name */
-#define stRegReloc 12 /* register relocation */
-#define stForward 13 /* forwarding address */
-#define stStaticProc 14 /* load time only static procs */
-#define stConstant 15 /* const */
-#define stStaParam 16 /* Fortran static parameters */
+#define stNil 0 /* Nuthin' special */
+#define stGlobal 1 /* external symbol */
+#define stStatic 2 /* static */
+#define stParam 3 /* procedure argument */
+#define stLocal 4 /* local variable */
+#define stLabel 5 /* label */
+#define stProc 6 /* " " Procedure */
+#define stBlock 7 /* beginnning of block */
+#define stEnd 8 /* end (of anything) */
+#define stMember 9 /* member (of anything - struct/union/enum */
+#define stTypedef 10 /* type definition */
+#define stFile 11 /* file name */
+#define stRegReloc 12 /* register relocation */
+#define stForward 13 /* forwarding address */
+#define stStaticProc 14 /* load time only static procs */
+#define stConstant 15 /* const */
+#define stStaParam 16 /* Fortran static parameters */
/* These new symbol types have been recently added to SGI machines. */
-#define stStruct 26 /* Beginning of block defining a struct type */
-#define stUnion 27 /* Beginning of block defining a union type */
-#define stEnum 28 /* Beginning of block defining an enum type */
-#define stIndirect 34 /* Indirect type specification */
+#define stStruct 26 /* Beginning of block defining a struct type */
+#define stUnion 27 /* Beginning of block defining a union type */
+#define stEnum 28 /* Beginning of block defining an enum type */
+#define stIndirect 34 /* Indirect type specification */
/* Pseudo-symbols - internal to debugger */
-#define stStr 60 /* string */
-#define stNumber 61 /* pure number (ie. 4 NOR 2+2) */
-#define stExpr 62 /* 2+2 vs. 4 */
-#define stType 63 /* post-coersion SER */
-#define stMax 64
+#define stStr 60 /* string */
+#define stNumber 61 /* pure number (ie. 4 NOR 2+2) */
+#define stExpr 62 /* 2+2 vs. 4 */
+#define stType 63 /* post-coersion SER */
+#define stMax 64
/* definitions for fields in TIR */
/* type qualifiers for ti.tq0 -> ti.(itqMax-1) */
-#define tqNil 0 /* bt is what you see */
-#define tqPtr 1 /* pointer */
-#define tqProc 2 /* procedure */
-#define tqArray 3 /* duh */
-#define tqFar 4 /* longer addressing - 8086/8 land */
-#define tqVol 5 /* volatile */
-#define tqConst 6 /* const */
-#define tqMax 8
+#define tqNil 0 /* bt is what you see */
+#define tqPtr 1 /* pointer */
+#define tqProc 2 /* procedure */
+#define tqArray 3 /* duh */
+#define tqFar 4 /* longer addressing - 8086/8 land */
+#define tqVol 5 /* volatile */
+#define tqConst 6 /* const */
+#define tqMax 8
/* basic types as seen in ti.bt */
-#define btNil 0 /* undefined (also, enum members) */
-#define btAdr 1 /* address - integer same size as pointer */
-#define btChar 2 /* character */
-#define btUChar 3 /* unsigned character */
-#define btShort 4 /* short */
-#define btUShort 5 /* unsigned short */
-#define btInt 6 /* int */
-#define btUInt 7 /* unsigned int */
-#define btLong 8 /* long */
-#define btULong 9 /* unsigned long */
-#define btFloat 10 /* float (real) */
-#define btDouble 11 /* Double (real) */
-#define btStruct 12 /* Structure (Record) */
-#define btUnion 13 /* Union (variant) */
-#define btEnum 14 /* Enumerated */
-#define btTypedef 15 /* defined via a typedef, isymRef points */
-#define btRange 16 /* subrange of int */
-#define btSet 17 /* pascal sets */
-#define btComplex 18 /* fortran complex */
-#define btDComplex 19 /* fortran double complex */
-#define btIndirect 20 /* forward or unnamed typedef */
-#define btFixedDec 21 /* Fixed Decimal */
-#define btFloatDec 22 /* Float Decimal */
-#define btString 23 /* Varying Length Character String */
-#define btBit 24 /* Aligned Bit String */
-#define btPicture 25 /* Picture */
-#define btVoid 26 /* void */
-#define btLongLong 27 /* long long */
-#define btULongLong 28 /* unsigned long long */
-#define btMax 64
+#define btNil 0 /* undefined (also, enum members) */
+#define btAdr 1 /* address - integer same size as pointer */
+#define btChar 2 /* character */
+#define btUChar 3 /* unsigned character */
+#define btShort 4 /* short */
+#define btUShort 5 /* unsigned short */
+#define btInt 6 /* int */
+#define btUInt 7 /* unsigned int */
+#define btLong 8 /* long */
+#define btULong 9 /* unsigned long */
+#define btFloat 10 /* float (real) */
+#define btDouble 11 /* Double (real) */
+#define btStruct 12 /* Structure (Record) */
+#define btUnion 13 /* Union (variant) */
+#define btEnum 14 /* Enumerated */
+#define btTypedef 15 /* defined via a typedef, isymRef points */
+#define btRange 16 /* subrange of int */
+#define btSet 17 /* pascal sets */
+#define btComplex 18 /* fortran complex */
+#define btDComplex 19 /* fortran double complex */
+#define btIndirect 20 /* forward or unnamed typedef */
+#define btFixedDec 21 /* Fixed Decimal */
+#define btFloatDec 22 /* Float Decimal */
+#define btString 23 /* Varying Length Character String */
+#define btBit 24 /* Aligned Bit String */
+#define btPicture 25 /* Picture */
+#define btVoid 26 /* void */
+#define btLongLong 27 /* long long */
+#define btULongLong 28 /* unsigned long long */
+#define btMax 64
#include "base/misc.hh"
#include "base/loader/symtab.hh"
-#include "base/trace.hh" // for DPRINTF
+#include "base/trace.hh" // for DPRINTF
#include "base/loader/exec_ecoff.h"
#include "base/loader/coff_sym.h"
#include "base/loader/elf_object.hh"
#include "base/loader/symtab.hh"
#include "base/misc.hh"
-#include "base/trace.hh" // for DPRINTF
+#include "base/trace.hh" // for DPRINTF
#include "sim/byteswap.hh"
using namespace std;
#include <limits>
#include <string>
-#include "sim/host.hh" // for Addr
+#include "sim/host.hh" // for Addr
class Port;
#include <limits>
#include <string>
-#include "sim/host.hh" // for Addr
+#include "sim/host.hh" // for Addr
class Port;
class SymbolTable;
#include <iosfwd>
#include <map>
-#include "sim/host.hh" // for Addr
+#include "sim/host.hh" // for Addr
class Checkpoint;
class SymbolTable
/*
* Copyright (c) 1990, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* This software was developed by the Computer Systems Engineering group
* at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
*
* All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Lawrence Berkeley Laboratories.
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratories.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the University of
- * California, Berkeley and its contributors.
+ * This product includes software developed by the University of
+ * California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
+ * @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
*/
/*-
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
- * This product includes software developed by the NetBSD
- * Foundation, Inc. and its contributors.
+ * This product includes software developed by the NetBSD
+ * Foundation, Inc. and its contributors.
* 4. Neither the name of The NetBSD Foundation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
// A little "garbage collection"
if (++remove_count > 10) {
- // free_extras();
+ // free_extras();
remove_count = 0;
}
typedef uint32_t StatFlags;
/** Nothing extra to print. */
-const StatFlags none = 0x00000000;
+const StatFlags none = 0x00000000;
/** This Stat is Initialized */
-const StatFlags init = 0x00000001;
+const StatFlags init = 0x00000001;
/** Print this stat. */
-const StatFlags print = 0x00000002;
+const StatFlags print = 0x00000002;
/** Print the total. */
-const StatFlags total = 0x00000010;
+const StatFlags total = 0x00000010;
/** Print the percent of the total that this entry represents. */
-const StatFlags pdf = 0x00000020;
+const StatFlags pdf = 0x00000020;
/** Print the cumulative percentage of total upto this entry. */
-const StatFlags cdf = 0x00000040;
+const StatFlags cdf = 0x00000040;
/** Print the distribution. */
-const StatFlags dist = 0x00000080;
+const StatFlags dist = 0x00000080;
/** Don't print if this is zero. */
-const StatFlags nozero = 0x00000100;
+const StatFlags nozero = 0x00000100;
/** Don't print if this is NAN */
-const StatFlags nonan = 0x00000200;
+const StatFlags nonan = 0x00000200;
/** Used for SS compatability. */
-const StatFlags __substat = 0x80000000;
+const StatFlags __substat = 0x80000000;
/** Mask of flags that can't be set directly */
-const StatFlags __reserved = init | print | __substat;
+const StatFlags __reserved = init | print | __substat;
enum DisplayMode
{
mysql.query(insert);
// if (mysql.error)
-// panic("could not insert subdata\n%s\n", mysql.error);
+// panic("could not insert subdata\n%s\n", mysql.error);
if (mysql.commit())
panic("could not commit transaction\n%s\n", mysql.error);
mysql.query(insert_formula);
// if (mysql.error)
-// panic("could not insert formula\n%s\n", mysql.error);
+// panic("could not insert formula\n%s\n", mysql.error);
stringstream insert_ref;
ccprintf(insert_ref,
mysql.query(insert_ref);
// if (mysql.error)
-// panic("could not insert formula reference\n%s\n", mysql.error);
+// panic("could not insert formula reference\n%s\n", mysql.error);
if (mysql.commit())
panic("could not commit transaction\n%s\n", mysql.error);
/*
* Copyright (c) 1982, 1986, 1993
- * The Regents of the University of California. All rights reserved.
+ * The Regents of the University of California. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
- * @(#)time.h 8.2 (Berkeley) 7/10/94
+ * @(#)time.h 8.2 (Berkeley) 7/10/94
*/
#if defined(__sun)
#define DPRINTFN(...) do {} while (0)
#define DPRINTFNR(...) do {} while (0)
-#endif // TRACING_ON
+#endif // TRACING_ON
#endif // __BASE_TRACE_HH__
typedef typename std::list<DynInstPtr>::iterator ListIt;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, /// Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, /// Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, /// Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, /// Max dest regs
};
/** The StaticInst used by this BaseDynInst. */
//
// Instruction types. Forward checks to StaticInst object.
//
- bool isNop() const { return staticInst->isNop(); }
- bool isMemRef() const { return staticInst->isMemRef(); }
- bool isLoad() const { return staticInst->isLoad(); }
- bool isStore() const { return staticInst->isStore(); }
+ bool isNop() const { return staticInst->isNop(); }
+ bool isMemRef() const { return staticInst->isMemRef(); }
+ bool isLoad() const { return staticInst->isLoad(); }
+ bool isStore() const { return staticInst->isStore(); }
bool isStoreConditional() const
{ return staticInst->isStoreConditional(); }
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
bool isCopy() const { return staticInst->isCopy(); }
- bool isInteger() const { return staticInst->isInteger(); }
- bool isFloating() const { return staticInst->isFloating(); }
- bool isControl() const { return staticInst->isControl(); }
- bool isCall() const { return staticInst->isCall(); }
- bool isReturn() const { return staticInst->isReturn(); }
- bool isDirectCtrl() const { return staticInst->isDirectCtrl(); }
+ bool isInteger() const { return staticInst->isInteger(); }
+ bool isFloating() const { return staticInst->isFloating(); }
+ bool isControl() const { return staticInst->isControl(); }
+ bool isCall() const { return staticInst->isCall(); }
+ bool isReturn() const { return staticInst->isReturn(); }
+ bool isDirectCtrl() const { return staticInst->isDirectCtrl(); }
bool isIndirectCtrl() const { return staticInst->isIndirectCtrl(); }
- bool isCondCtrl() const { return staticInst->isCondCtrl(); }
- bool isUncondCtrl() const { return staticInst->isUncondCtrl(); }
+ bool isCondCtrl() const { return staticInst->isCondCtrl(); }
+ bool isUncondCtrl() const { return staticInst->isUncondCtrl(); }
bool isCondDelaySlot() const { return staticInst->isCondDelaySlot(); }
bool isThreadSync() const { return staticInst->isThreadSync(); }
bool isSerializing() const { return staticInst->isSerializing(); }
Addr branchTarget() const { return staticInst->branchTarget(PC); }
/** Returns the number of source registers. */
- int8_t numSrcRegs() const { return staticInst->numSrcRegs(); }
+ int8_t numSrcRegs() const { return staticInst->numSrcRegs(); }
/** Returns the number of destination registers. */
int8_t numDestRegs() const { return staticInst->numDestRegs(); }
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
void setEA(Addr EA) { panic("SimpleCPU::setEA() not implemented\n"); }
- Addr getEA() { panic("SimpleCPU::getEA() not implemented\n"); }
+ Addr getEA() { panic("SimpleCPU::getEA() not implemented\n"); }
void prefetch(Addr addr, unsigned flags)
{
// Try to fetch the instruction
#if FULL_SYSTEM
-#define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0
+#define IFETCH_FLAGS(pc) ((pc) & 1) ? PHYSICAL : 0
#else
-#define IFETCH_FLAGS(pc) 0
+#define IFETCH_FLAGS(pc) 0
#endif
uint64_t fetch_PC = thread->readPC() & ~3;
bool accessRetry;
- unsigned size; // size of testing memory region
+ unsigned size; // size of testing memory region
- unsigned percentReads; // target percentage of read accesses
- unsigned percentFunctional; // target percentage of functional accesses
+ unsigned percentReads; // target percentage of read accesses
+ unsigned percentFunctional; // target percentage of functional accesses
unsigned percentUncacheable;
int id;
Addr traceBlockAddr;
- Addr baseAddr1; // fix this to option
- Addr baseAddr2; // fix this to option
+ Addr baseAddr1; // fix this to option
+ Addr baseAddr2; // fix this to option
Addr uncacheAddr;
- unsigned progressInterval; // frequency of progress reports
- Tick nextProgressMessage; // access # for next progress report
+ unsigned progressInterval; // frequency of progress reports
+ Tick nextProgressMessage; // access # for next progress report
unsigned percentSourceUnaligned;
unsigned percentDestUnaligned;
typedef TheISA::MiscReg MiscReg;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
};
public:
typedef TheISA::MiscReg MiscReg;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
};
public:
#if FULL_SYSTEM
private:
- int intrflag; // interrupt flag
+ int intrflag; // interrupt flag
#endif
private:
Stats::Scalar<> ROB_fcount;
Stats::Formula ROB_full_rate;
- Stats::Vector<> ROB_count; // cumulative ROB occupancy
+ Stats::Vector<> ROB_count; // cumulative ROB occupancy
Stats::Formula ROB_occ_rate;
Stats::VectorDistribution<> ROB_occ_dist;
public:
memReq->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
-// status = DcacheMissStall;
+// unscheduleTickEvent();
+// status = DcacheMissStall;
DPRINTF(OzoneCPU, "Dcache miss stall!\n");
} else {
// do functional access
if (result != MA_HIT && dcacheInterface->doEvents()) {
memReq->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
-// status = DcacheMissStall;
+// unscheduleTickEvent();
+// status = DcacheMissStall;
DPRINTF(OzoneCPU, "Dcache miss stall!\n");
}
}
if (_status == Idle) {
DPRINTF(IPI,"Suspended Processor awoke\n");
-// thread.activate();
+// thread.activate();
// Hack for now. Otherwise might have to go through the tc, or
// I need to figure out what's the right thing to call.
activateContext(thread.readTid(), 1);
Stats::Formula idleRate;
Stats::Formula branchRate;
Stats::Formula fetchRate;
- Stats::Scalar<> IFQCount; // cumulative IFQ occupancy
+ Stats::Scalar<> IFQCount; // cumulative IFQ occupancy
Stats::Formula IFQOccupancy;
Stats::Formula IFQLatency;
Stats::Scalar<> IFQFcount; // cumulative IFQ full count
// are executed twice.
memReq->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
+// unscheduleTickEvent();
status = DcacheMissLoadStall;
DPRINTF(IBE, "Dcache miss stall!\n");
} else {
if (fault == NoFault && dcacheInterface) {
memReq->cmd = Write;
-// memcpy(memReq->data,(uint8_t *)&data,memReq->size);
+// memcpy(memReq->data,(uint8_t *)&data,memReq->size);
memReq->completionEvent = NULL;
memReq->time = curTick;
memReq->flags &= ~INST_READ;
if (result != MA_HIT) {
memReq->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
+// unscheduleTickEvent();
status = DcacheMissStoreStall;
DPRINTF(IBE, "Dcache miss stall!\n");
} else {
if (result != MA_HIT) {
req->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
+// unscheduleTickEvent();
status = DcacheMissLoadStall;
DPRINTF(IBE, "Dcache miss load stall!\n");
} else {
if (result != MA_HIT) {
req->completionEvent = &cacheCompletionEvent;
lastDcacheStall = curTick;
-// unscheduleTickEvent();
+// unscheduleTickEvent();
status = DcacheMissStoreStall;
DPRINTF(IBE, "Dcache miss store stall!\n");
} else {
MemReqPtr req = storeQueue[storeWBIdx].req;
storeQueue[storeWBIdx].committed = true;
-// Fault fault = cpu->translateDataReadReq(req);
+// Fault fault = cpu->translateDataReadReq(req);
req->cmd = Write;
req->completionEvent = NULL;
req->time = curTick;
Stats::Scalar<> ROBFcount;
Stats::Formula ROBFullRate;
- Stats::Vector<> ROBCount; // cumulative ROB occupancy
+ Stats::Vector<> ROBCount; // cumulative ROB occupancy
Stats::Formula ROBOccRate;
// Stats::VectorDistribution<> ROBOccDist;
public:
// These functions are only used in CPU models that split
// effective address computation from the actual memory access.
void setEA(Addr EA) { panic("BaseSimpleCPU::setEA() not implemented\n"); }
- Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n");
+ Addr getEA() { panic("BaseSimpleCPU::getEA() not implemented\n");
M5_DUMMY_RETURN}
void prefetch(Addr addr, unsigned flags)
lastActivate = curTick;
// if (status() == ThreadContext::Unallocated) {
-// cpu->activateWhenReady(tid);
-// return;
+// cpu->activateWhenReady(tid);
+// return;
// }
_status = ThreadContext::Active;
typedef ThreadContext::Status Status;
protected:
- RegFile regs; // correct-path register context
+ RegFile regs; // correct-path register context
public:
// pointer to CPU associated with this SimpleThread
/// implement this behavior via the execute() methods.
///
enum Flags {
- IsNop, ///< Is a no-op (no effect at all).
+ IsNop, ///< Is a no-op (no effect at all).
- IsInteger, ///< References integer regs.
- IsFloating, ///< References FP regs.
+ IsInteger, ///< References integer regs.
+ IsFloating, ///< References FP regs.
- IsMemRef, ///< References memory (load, store, or prefetch).
- IsLoad, ///< Reads from memory (load or prefetch).
- IsStore, ///< Writes to memory.
+ IsMemRef, ///< References memory (load, store, or prefetch).
+ IsLoad, ///< Reads from memory (load or prefetch).
+ IsStore, ///< Writes to memory.
IsStoreConditional, ///< Store conditional instruction.
IsIndexed, ///< Accesses memory with an indexed address computation
- IsInstPrefetch, ///< Instruction-cache prefetch.
- IsDataPrefetch, ///< Data-cache prefetch.
+ IsInstPrefetch, ///< Instruction-cache prefetch.
+ IsDataPrefetch, ///< Data-cache prefetch.
IsCopy, ///< Fast Cache block copy
- IsControl, ///< Control transfer instruction.
- IsDirectControl, ///< PC relative control transfer.
- IsIndirectControl, ///< Register indirect control transfer.
- IsCondControl, ///< Conditional control transfer.
- IsUncondControl, ///< Unconditional control transfer.
- IsCall, ///< Subroutine call.
- IsReturn, ///< Subroutine return.
+ IsControl, ///< Control transfer instruction.
+ IsDirectControl, ///< PC relative control transfer.
+ IsIndirectControl, ///< Register indirect control transfer.
+ IsCondControl, ///< Conditional control transfer.
+ IsUncondControl, ///< Unconditional control transfer.
+ IsCall, ///< Subroutine call.
+ IsReturn, ///< Subroutine return.
IsCondDelaySlot,///< Conditional Delay-Slot Instruction
- IsThreadSync, ///< Thread synchronization operation.
+ IsThreadSync, ///< Thread synchronization operation.
- IsSerializing, ///< Serializes pipeline: won't execute until all
+ IsSerializing, ///< Serializes pipeline: won't execute until all
/// older instructions have committed.
IsSerializeBefore,
IsSerializeAfter,
- IsMemBarrier, ///< Is a memory barrier
- IsWriteBarrier, ///< Is a write barrier
+ IsMemBarrier, ///< Is a memory barrier
+ IsWriteBarrier, ///< Is a write barrier
IsERET, /// <- Causes the IFU to stall (MIPS ISA)
IsNonSpeculative, ///< Should not be executed speculatively
//Flags for microcode
IsMacroop, ///< Is a macroop containing microops
- IsMicroop, ///< Is a microop
- IsDelayedCommit, ///< This microop doesn't commit right away
- IsLastMicroop, ///< This microop ends a microop sequence
- IsFirstMicroop, ///< This microop begins a microop sequence
+ IsMicroop, ///< Is a microop
+ IsDelayedCommit, ///< This microop doesn't commit right away
+ IsLastMicroop, ///< This microop ends a microop sequence
+ IsFirstMicroop, ///< This microop begins a microop sequence
//This flag doesn't do anything yet
- IsMicroBranch, ///< This microop branches within the microcode for a macroop
+ IsMicroBranch, ///< This microop branches within the microcode for a macroop
IsDspOp,
NumFlags
/// of the individual flags.
//@{
- bool isNop() const { return flags[IsNop]; }
+ bool isNop() const { return flags[IsNop]; }
- bool isMemRef() const { return flags[IsMemRef]; }
- bool isLoad() const { return flags[IsLoad]; }
- bool isStore() const { return flags[IsStore]; }
- bool isStoreConditional() const { return flags[IsStoreConditional]; }
+ bool isMemRef() const { return flags[IsMemRef]; }
+ bool isLoad() const { return flags[IsLoad]; }
+ bool isStore() const { return flags[IsStore]; }
+ bool isStoreConditional() const { return flags[IsStoreConditional]; }
bool isInstPrefetch() const { return flags[IsInstPrefetch]; }
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
bool isCopy() const { return flags[IsCopy];}
- bool isInteger() const { return flags[IsInteger]; }
- bool isFloating() const { return flags[IsFloating]; }
+ bool isInteger() const { return flags[IsInteger]; }
+ bool isFloating() const { return flags[IsFloating]; }
- bool isControl() const { return flags[IsControl]; }
- bool isCall() const { return flags[IsCall]; }
- bool isReturn() const { return flags[IsReturn]; }
- bool isDirectCtrl() const { return flags[IsDirectControl]; }
+ bool isControl() const { return flags[IsControl]; }
+ bool isCall() const { return flags[IsCall]; }
+ bool isReturn() const { return flags[IsReturn]; }
+ bool isDirectCtrl() const { return flags[IsDirectControl]; }
bool isIndirectCtrl() const { return flags[IsIndirectControl]; }
- bool isCondCtrl() const { return flags[IsCondControl]; }
- bool isUncondCtrl() const { return flags[IsUncondControl]; }
+ bool isCondCtrl() const { return flags[IsCondControl]; }
+ bool isUncondCtrl() const { return flags[IsUncondControl]; }
bool isCondDelaySlot() const { return flags[IsCondDelaySlot]; }
bool isThreadSync() const { return flags[IsThreadSync]; }
typedef TheISA::RegIndex RegIndex;
enum {
- MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
- MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
+ MaxInstSrcRegs = TheISA::MaxInstSrcRegs, //< Max source regs
+ MaxInstDestRegs = TheISA::MaxInstDestRegs, //< Max dest regs
};
// This structure hacked up from simos
struct AlphaAccess
{
- uint32_t last_offset; // 00: must be first field
- uint32_t version; // 04:
- uint32_t numCPUs; // 08:
- uint32_t intrClockFrequency; // 0C: Hz
- uint64_t cpuClock; // 10: MHz
- uint64_t mem_size; // 18:
+ uint32_t last_offset; // 00: must be first field
+ uint32_t version; // 04:
+ uint32_t numCPUs; // 08:
+ uint32_t intrClockFrequency; // 0C: Hz
+ uint64_t cpuClock; // 10: MHz
+ uint64_t mem_size; // 18:
// Loaded kernel
- uint64_t kernStart; // 20:
- uint64_t kernEnd; // 28:
- uint64_t entryPoint; // 30:
+ uint64_t kernStart; // 20:
+ uint64_t kernEnd; // 28:
+ uint64_t entryPoint; // 30:
// console disk stuff
- uint64_t diskUnit; // 38:
- uint64_t diskCount; // 40:
- uint64_t diskPAddr; // 48:
- uint64_t diskBlock; // 50:
- uint64_t diskOperation; // 58:
+ uint64_t diskUnit; // 38:
+ uint64_t diskCount; // 40:
+ uint64_t diskPAddr; // 48:
+ uint64_t diskBlock; // 50:
+ uint64_t diskOperation; // 58:
// console simple output stuff
- uint64_t outputChar; // 60: Placeholder for output
- uint64_t inputChar; // 68: Placeholder for input
+ uint64_t outputChar; // 60: Placeholder for output
+ uint64_t inputChar; // 68: Placeholder for input
// MP boot
- uint64_t cpuStack[64]; // 70:
+ uint64_t cpuStack[64]; // 70:
};
#endif // __ALPHA_ACCESS_H__
{
}
-#define DLT_EN10MB 1 // Ethernet (10Mb)
-#define TCPDUMP_MAGIC 0xa1b2c3d4
-#define PCAP_VERSION_MAJOR 2
-#define PCAP_VERSION_MINOR 4
+#define DLT_EN10MB 1 // Ethernet (10Mb)
+#define TCPDUMP_MAGIC 0xa1b2c3d4
+#define PCAP_VERSION_MAJOR 2
+#define PCAP_VERSION_MINOR 4
struct pcap_file_header {
uint32_t magic;
uint16_t version_major;
uint16_t version_minor;
- int32_t thiszone; // gmt to local correction
- uint32_t sigfigs; // accuracy of timestamps
- uint32_t snaplen; // max length saved portion of each pkt
- uint32_t linktype; // data link type (DLT_*)
+ int32_t thiszone; // gmt to local correction
+ uint32_t sigfigs; // accuracy of timestamps
+ uint32_t snaplen; // max length saved portion of each pkt
+ uint32_t linktype; // data link type (DLT_*)
};
struct pcap_pkthdr {
uint32_t seconds;
uint32_t microseconds;
- uint32_t caplen; // length of portion present
- uint32_t len; // length this packet (off wire)
+ uint32_t caplen; // length of portion present
+ uint32_t len; // length this packet (off wire)
};
void
// This structure hacked up from simos
struct MipsAccess
{
- uint32_t inputChar; // 00: Placeholder for input
- uint32_t last_offset; // 04: must be first field
- uint32_t version; // 08:
- uint32_t numCPUs; // 0C:
- uint32_t intrClockFrequency; // 10: Hz
+ uint32_t inputChar; // 00: Placeholder for input
+ uint32_t last_offset; // 04: must be first field
+ uint32_t version; // 08:
+ uint32_t numCPUs; // 0C:
+ uint32_t intrClockFrequency; // 10: Hz
// Loaded kernel
- uint32_t kernStart; // 14:
- uint32_t kernEnd; // 18:
- uint32_t entryPoint; // 1c:
+ uint32_t kernStart; // 14:
+ uint32_t kernEnd; // 18:
+ uint32_t entryPoint; // 1c:
// console simple output stuff
- uint32_t outputChar; // 20: Placeholder for output
+ uint32_t outputChar; // 20: Placeholder for output
// console disk stuff
- uint32_t diskUnit; // 24:
- uint32_t diskCount; // 28:
- uint32_t diskPAddr; // 2c:
- uint32_t diskBlock; // 30:
- uint32_t diskOperation; // 34:
+ uint32_t diskUnit; // 24:
+ uint32_t diskCount; // 28:
+ uint32_t diskPAddr; // 2c:
+ uint32_t diskBlock; // 30:
+ uint32_t diskOperation; // 34:
// MP boot
- uint32_t cpuStack[64]; // 70:
+ uint32_t cpuStack[64]; // 70:
/* XXX There appears to be a problem in accessing
* unit64_t in the console.c file. They are treated
* like uint32_int and result in the wrong address for
* everything below. This problem should be investigated.
*/
- uint64_t cpuClock; // 38: MHz
- uint64_t mem_size; // 40:
+ uint64_t cpuClock; // 38: MHz
+ uint64_t mem_size; // 40:
};
#endif // __MIPS_ACCESS_H__
* Ethernet device registers
*/
struct dp_regs {
- uint32_t command;
- uint32_t config;
- uint32_t mear;
- uint32_t ptscr;
+ uint32_t command;
+ uint32_t config;
+ uint32_t mear;
+ uint32_t ptscr;
uint32_t isr;
uint32_t imr;
uint32_t ier;
#include "base/inifile.hh"
#include "base/intmath.hh" // for isPowerOf2(
#include "base/misc.hh"
-#include "base/str.hh" // for to_number
+#include "base/str.hh" // for to_number
#include "base/trace.hh"
#include "dev/pciconfigall.hh"
#include "dev/pcidev.hh"
};
// Common PCI offsets
-#define PCI_VENDOR_ID 0x00 // Vendor ID ro
-#define PCI_DEVICE_ID 0x02 // Device ID ro
-#define PCI_COMMAND 0x04 // Command rw
-#define PCI_STATUS 0x06 // Status rw
-#define PCI_REVISION_ID 0x08 // Revision ID ro
-#define PCI_CLASS_CODE 0x09 // Class Code ro
-#define PCI_SUB_CLASS_CODE 0x0A // Sub Class Code ro
-#define PCI_BASE_CLASS_CODE 0x0B // Base Class Code ro
-#define PCI_CACHE_LINE_SIZE 0x0C // Cache Line Size ro+
-#define PCI_LATENCY_TIMER 0x0D // Latency Timer ro+
-#define PCI_HEADER_TYPE 0x0E // Header Type ro
-#define PCI_BIST 0x0F // Built in self test rw
+#define PCI_VENDOR_ID 0x00 // Vendor ID ro
+#define PCI_DEVICE_ID 0x02 // Device ID ro
+#define PCI_COMMAND 0x04 // Command rw
+#define PCI_STATUS 0x06 // Status rw
+#define PCI_REVISION_ID 0x08 // Revision ID ro
+#define PCI_CLASS_CODE 0x09 // Class Code ro
+#define PCI_SUB_CLASS_CODE 0x0A // Sub Class Code ro
+#define PCI_BASE_CLASS_CODE 0x0B // Base Class Code ro
+#define PCI_CACHE_LINE_SIZE 0x0C // Cache Line Size ro+
+#define PCI_LATENCY_TIMER 0x0D // Latency Timer ro+
+#define PCI_HEADER_TYPE 0x0E // Header Type ro
+#define PCI_BIST 0x0F // Built in self test rw
// some pci command reg bitfields
#define PCI_CMD_BME 0x04 // Bus master function enable
#define PCI_CMD_IOSE 0x01 // I/O space enable
// Type 0 PCI offsets
-#define PCI0_BASE_ADDR0 0x10 // Base Address 0 rw
-#define PCI0_BASE_ADDR1 0x14 // Base Address 1 rw
-#define PCI0_BASE_ADDR2 0x18 // Base Address 2 rw
-#define PCI0_BASE_ADDR3 0x1C // Base Address 3 rw
-#define PCI0_BASE_ADDR4 0x20 // Base Address 4 rw
-#define PCI0_BASE_ADDR5 0x24 // Base Address 5 rw
-#define PCI0_CIS 0x28 // CardBus CIS Pointer ro
-#define PCI0_SUB_VENDOR_ID 0x2C // Sub-Vendor ID ro
-#define PCI0_SUB_SYSTEM_ID 0x2E // Sub-System ID ro
-#define PCI0_ROM_BASE_ADDR 0x30 // Expansion ROM Base Address rw
-#define PCI0_RESERVED0 0x34
-#define PCI0_RESERVED1 0x38
-#define PCI0_INTERRUPT_LINE 0x3C // Interrupt Line rw
-#define PCI0_INTERRUPT_PIN 0x3D // Interrupt Pin ro
-#define PCI0_MINIMUM_GRANT 0x3E // Maximum Grant ro
-#define PCI0_MAXIMUM_LATENCY 0x3F // Maximum Latency ro
+#define PCI0_BASE_ADDR0 0x10 // Base Address 0 rw
+#define PCI0_BASE_ADDR1 0x14 // Base Address 1 rw
+#define PCI0_BASE_ADDR2 0x18 // Base Address 2 rw
+#define PCI0_BASE_ADDR3 0x1C // Base Address 3 rw
+#define PCI0_BASE_ADDR4 0x20 // Base Address 4 rw
+#define PCI0_BASE_ADDR5 0x24 // Base Address 5 rw
+#define PCI0_CIS 0x28 // CardBus CIS Pointer ro
+#define PCI0_SUB_VENDOR_ID 0x2C // Sub-Vendor ID ro
+#define PCI0_SUB_SYSTEM_ID 0x2E // Sub-System ID ro
+#define PCI0_ROM_BASE_ADDR 0x30 // Expansion ROM Base Address rw
+#define PCI0_RESERVED0 0x34
+#define PCI0_RESERVED1 0x38
+#define PCI0_INTERRUPT_LINE 0x3C // Interrupt Line rw
+#define PCI0_INTERRUPT_PIN 0x3D // Interrupt Pin ro
+#define PCI0_MINIMUM_GRANT 0x3E // Maximum Grant ro
+#define PCI0_MAXIMUM_LATENCY 0x3F // Maximum Latency ro
// Type 1 PCI offsets
-#define PCI1_BASE_ADDR0 0x10 // Base Address 0 rw
-#define PCI1_BASE_ADDR1 0x14 // Base Address 1 rw
-#define PCI1_PRI_BUS_NUM 0x18 // Primary Bus Number rw
-#define PCI1_SEC_BUS_NUM 0x19 // Secondary Bus Number rw
-#define PCI1_SUB_BUS_NUM 0x1A // Subordinate Bus Number rw
-#define PCI1_SEC_LAT_TIMER 0x1B // Secondary Latency Timer ro+
-#define PCI1_IO_BASE 0x1C // I/O Base rw
-#define PCI1_IO_LIMIT 0x1D // I/O Limit rw
-#define PCI1_SECONDARY_STATUS 0x1E // Secondary Status rw
-#define PCI1_MEM_BASE 0x20 // Memory Base rw
-#define PCI1_MEM_LIMIT 0x22 // Memory Limit rw
-#define PCI1_PRF_MEM_BASE 0x24 // Prefetchable Memory Base rw
-#define PCI1_PRF_MEM_LIMIT 0x26 // Prefetchable Memory Limit rw
-#define PCI1_PRF_BASE_UPPER 0x28 // Prefetchable Base Upper 32 rw
-#define PCI1_PRF_LIMIT_UPPER 0x2C // Prefetchable Limit Upper 32 rw
-#define PCI1_IO_BASE_UPPER 0x30 // I/O Base Upper 16 bits rw
-#define PCI1_IO_LIMIT_UPPER 0x32 // I/O Limit Upper 16 bits rw
-#define PCI1_RESERVED 0x34 // Reserved ro
-#define PCI1_ROM_BASE_ADDR 0x38 // Expansion ROM Base Address rw
-#define PCI1_INTR_LINE 0x3C // Interrupt Line rw
-#define PCI1_INTR_PIN 0x3D // Interrupt Pin ro
-#define PCI1_BRIDGE_CTRL 0x3E // Bridge Control rw
+#define PCI1_BASE_ADDR0 0x10 // Base Address 0 rw
+#define PCI1_BASE_ADDR1 0x14 // Base Address 1 rw
+#define PCI1_PRI_BUS_NUM 0x18 // Primary Bus Number rw
+#define PCI1_SEC_BUS_NUM 0x19 // Secondary Bus Number rw
+#define PCI1_SUB_BUS_NUM 0x1A // Subordinate Bus Number rw
+#define PCI1_SEC_LAT_TIMER 0x1B // Secondary Latency Timer ro+
+#define PCI1_IO_BASE 0x1C // I/O Base rw
+#define PCI1_IO_LIMIT 0x1D // I/O Limit rw
+#define PCI1_SECONDARY_STATUS 0x1E // Secondary Status rw
+#define PCI1_MEM_BASE 0x20 // Memory Base rw
+#define PCI1_MEM_LIMIT 0x22 // Memory Limit rw
+#define PCI1_PRF_MEM_BASE 0x24 // Prefetchable Memory Base rw
+#define PCI1_PRF_MEM_LIMIT 0x26 // Prefetchable Memory Limit rw
+#define PCI1_PRF_BASE_UPPER 0x28 // Prefetchable Base Upper 32 rw
+#define PCI1_PRF_LIMIT_UPPER 0x2C // Prefetchable Limit Upper 32 rw
+#define PCI1_IO_BASE_UPPER 0x30 // I/O Base Upper 16 bits rw
+#define PCI1_IO_LIMIT_UPPER 0x32 // I/O Limit Upper 16 bits rw
+#define PCI1_RESERVED 0x34 // Reserved ro
+#define PCI1_ROM_BASE_ADDR 0x38 // Expansion ROM Base Address rw
+#define PCI1_INTR_LINE 0x3C // Interrupt Line rw
+#define PCI1_INTR_PIN 0x3D // Interrupt Pin ro
+#define PCI1_BRIDGE_CTRL 0x3E // Bridge Control rw
// Device specific offsets
-#define PCI_DEVICE_SPECIFIC 0x40 // 192 bytes
+#define PCI_DEVICE_SPECIFIC 0x40 // 192 bytes
#define PCI_CONFIG_SIZE 0xFF
// Some Vendor IDs
-#define PCI_VENDOR_DEC 0x1011
-#define PCI_VENDOR_NCR 0x101A
-#define PCI_VENDOR_QLOGIC 0x1077
-#define PCI_VENDOR_SIMOS 0x1291
+#define PCI_VENDOR_DEC 0x1011
+#define PCI_VENDOR_NCR 0x101A
+#define PCI_VENDOR_QLOGIC 0x1077
+#define PCI_VENDOR_SIMOS 0x1291
// Some Product IDs
-#define PCI_PRODUCT_DEC_PZA 0x0008
-#define PCI_PRODUCT_NCR_810 0x0001
-#define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
-#define PCI_PRODUCT_SIMOS_SIMOS 0x1291
-#define PCI_PRODUCT_SIMOS_ETHER 0x1292
+#define PCI_PRODUCT_DEC_PZA 0x0008
+#define PCI_PRODUCT_NCR_810 0x0001
+#define PCI_PRODUCT_QLOGIC_ISP1020 0x1020
+#define PCI_PRODUCT_SIMOS_SIMOS 0x1291
+#define PCI_PRODUCT_SIMOS_ETHER 0x1292
#endif // __PCIREG_H__
static const uint64_t NAME##_width = WIDTH; \
static const uint64_t NAME##_offset = OFFSET; \
static const uint64_t NAME##_mask = (ULL(1) << WIDTH) - 1; \
- static const uint64_t NAME = ((ULL(1) << WIDTH) - 1) << OFFSET; \
+ static const uint64_t NAME = ((ULL(1) << WIDTH) - 1) << OFFSET; \
static inline uint64_t get_##NAME(uint64_t reg) \
{ return (reg & NAME) >> OFFSET; } \
static inline uint64_t set_##NAME(uint64_t reg, uint64_t val) \
/// gets #defined to something else on some systems. This type
/// can be specialized by architecture specific "Linux" classes
typedef struct {
- uint32_t st_dev; //!< device
- uint32_t st_ino; //!< inode
- uint32_t st_mode; //!< mode
- uint32_t st_nlink; //!< link count
- uint32_t st_uid; //!< owner's user ID
- uint32_t st_gid; //!< owner's group ID
- uint32_t st_rdev; //!< device number
- int32_t _pad1; //!< for alignment
- int64_t st_size; //!< file size in bytes
- uint64_t st_atimeX; //!< time of last access
- uint64_t st_mtimeX; //!< time of last modification
- uint64_t st_ctimeX; //!< time of last status change
- uint32_t st_blksize; //!< optimal I/O block size
- int32_t st_blocks; //!< number of blocks allocated
- uint32_t st_flags; //!< flags
- uint32_t st_gen; //!< unknown
+ uint32_t st_dev; //!< device
+ uint32_t st_ino; //!< inode
+ uint32_t st_mode; //!< mode
+ uint32_t st_nlink; //!< link count
+ uint32_t st_uid; //!< owner's user ID
+ uint32_t st_gid; //!< owner's group ID
+ uint32_t st_rdev; //!< device number
+ int32_t _pad1; //!< for alignment
+ int64_t st_size; //!< file size in bytes
+ uint64_t st_atimeX; //!< time of last access
+ uint64_t st_mtimeX; //!< time of last modification
+ uint64_t st_ctimeX; //!< time of last status change
+ uint32_t st_blksize; //!< optimal I/O block size
+ int32_t st_blocks; //!< number of blocks allocated
+ uint32_t st_flags; //!< flags
+ uint32_t st_gen; //!< unknown
} tgt_stat;
// same for stat64
typedef struct {
- uint64_t st_dev;
- uint64_t st_ino;
- uint64_t st_rdev;
- int64_t st_size;
- uint64_t st_blocks;
-
- uint32_t st_mode;
- uint32_t st_uid;
- uint32_t st_gid;
- uint32_t st_blksize;
- uint32_t st_nlink;
- uint32_t __pad0;
-
- uint64_t st_atimeX;
- uint64_t st_atime_nsec;
- uint64_t st_mtimeX;
- uint64_t st_mtime_nsec;
- uint64_t st_ctimeX;
- uint64_t st_ctime_nsec;
- int64_t ___unused[3];
+ uint64_t st_dev;
+ uint64_t st_ino;
+ uint64_t st_rdev;
+ int64_t st_size;
+ uint64_t st_blocks;
+
+ uint32_t st_mode;
+ uint32_t st_uid;
+ uint32_t st_gid;
+ uint32_t st_blksize;
+ uint32_t st_nlink;
+ uint32_t __pad0;
+
+ uint64_t st_atimeX;
+ uint64_t st_atime_nsec;
+ uint64_t st_mtimeX;
+ uint64_t st_mtime_nsec;
+ uint64_t st_ctimeX;
+ uint64_t st_ctime_nsec;
+ int64_t ___unused[3];
} tgt_stat64;
/// Length of strings in struct utsname (plus 1 for null char).
/// Interface struct for uname().
struct utsname {
- char sysname[_SYS_NMLN]; //!< System name.
- char nodename[_SYS_NMLN]; //!< Node name.
- char release[_SYS_NMLN]; //!< OS release.
- char version[_SYS_NMLN]; //!< OS version.
- char machine[_SYS_NMLN]; //!< Machine type.
+ char sysname[_SYS_NMLN]; //!< System name.
+ char nodename[_SYS_NMLN]; //!< Node name.
+ char release[_SYS_NMLN]; //!< OS release.
+ char version[_SYS_NMLN]; //!< OS version.
+ char machine[_SYS_NMLN]; //!< Machine type.
};
/// Limit struct for getrlimit/setrlimit.
struct rlimit {
- uint64_t rlim_cur; //!< soft limit
- uint64_t rlim_max; //!< hard limit
+ uint64_t rlim_cur; //!< soft limit
+ uint64_t rlim_max; //!< hard limit
};
/// For gettimeofday().
struct timeval {
- int64_t tv_sec; //!< seconds
- int64_t tv_usec; //!< microseconds
+ int64_t tv_sec; //!< seconds
+ int64_t tv_usec; //!< microseconds
};
// For writev/readv
/// For getrusage().
struct rusage {
- struct timeval ru_utime; //!< user time used
- struct timeval ru_stime; //!< system time used
- int64_t ru_maxrss; //!< max rss
- int64_t ru_ixrss; //!< integral shared memory size
- int64_t ru_idrss; //!< integral unshared data "
- int64_t ru_isrss; //!< integral unshared stack "
- int64_t ru_minflt; //!< page reclaims - total vmfaults
- int64_t ru_majflt; //!< page faults
- int64_t ru_nswap; //!< swaps
- int64_t ru_inblock; //!< block input operations
- int64_t ru_oublock; //!< block output operations
- int64_t ru_msgsnd; //!< messages sent
- int64_t ru_msgrcv; //!< messages received
- int64_t ru_nsignals; //!< signals received
- int64_t ru_nvcsw; //!< voluntary context switches
- int64_t ru_nivcsw; //!< involuntary "
+ struct timeval ru_utime; //!< user time used
+ struct timeval ru_stime; //!< system time used
+ int64_t ru_maxrss; //!< max rss
+ int64_t ru_ixrss; //!< integral shared memory size
+ int64_t ru_idrss; //!< integral unshared data "
+ int64_t ru_isrss; //!< integral unshared stack "
+ int64_t ru_minflt; //!< page reclaims - total vmfaults
+ int64_t ru_majflt; //!< page faults
+ int64_t ru_nswap; //!< swaps
+ int64_t ru_inblock; //!< block input operations
+ int64_t ru_oublock; //!< block output operations
+ int64_t ru_msgsnd; //!< messages sent
+ int64_t ru_msgrcv; //!< messages received
+ int64_t ru_nsignals; //!< signals received
+ int64_t ru_nvcsw; //!< voluntary context switches
+ int64_t ru_nivcsw; //!< involuntary "
};
}; // class Linux
/// This struct is used to build an target-OS-dependent table that
/// maps the target's open() flags to the host open() flags.
struct OpenFlagTransTable {
- int tgtFlag; //!< Target system flag value.
- int hostFlag; //!< Corresponding host system flag value.
+ int tgtFlag; //!< Target system flag value.
+ int hostFlag; //!< Corresponding host system flag value.
};
/// Interface struct for uname().
typedef struct {
- char sysname[_SYS_NMLN]; //!< System name.
- char nodename[_SYS_NMLN]; //!< Node name.
- char release[_SYS_NMLN]; //!< OS release.
- char version[_SYS_NMLN]; //!< OS version.
- char machine[_SYS_NMLN]; //!< Machine type.
+ char sysname[_SYS_NMLN]; //!< System name.
+ char nodename[_SYS_NMLN]; //!< Node name.
+ char release[_SYS_NMLN]; //!< OS release.
+ char version[_SYS_NMLN]; //!< OS version.
+ char machine[_SYS_NMLN]; //!< Machine type.
} utsname;
/// Limit struct for getrlimit/setrlimit.
typedef struct {
- uint64_t rlim_cur; //!< soft limit
- uint64_t rlim_max; //!< hard limit
+ uint64_t rlim_cur; //!< soft limit
+ uint64_t rlim_max; //!< hard limit
} rlimit;
/// For gettimeofday().
typedef struct {
- int64_t tv_sec; //!< seconds
- int64_t tv_usec; //!< microseconds
+ int64_t tv_sec; //!< seconds
+ int64_t tv_usec; //!< microseconds
} timeval;
// For writev/readv
/// For getrusage().
typedef struct {
- timeval ru_utime; //!< user time used
- timeval ru_stime; //!< system time used
- int64_t ru_maxrss; //!< max rss
- int64_t ru_ixrss; //!< integral shared memory size
- int64_t ru_idrss; //!< integral unshared data "
- int64_t ru_isrss; //!< integral unshared stack "
- int64_t ru_minflt; //!< page reclaims - total vmfaults
- int64_t ru_majflt; //!< page faults
- int64_t ru_nswap; //!< swaps
- int64_t ru_inblock; //!< block input operations
- int64_t ru_oublock; //!< block output operations
- int64_t ru_msgsnd; //!< messages sent
- int64_t ru_msgrcv; //!< messages received
- int64_t ru_nsignals; //!< signals received
- int64_t ru_nvcsw; //!< voluntary context switches
- int64_t ru_nivcsw; //!< involuntary "
+ timeval ru_utime; //!< user time used
+ timeval ru_stime; //!< system time used
+ int64_t ru_maxrss; //!< max rss
+ int64_t ru_ixrss; //!< integral shared memory size
+ int64_t ru_idrss; //!< integral unshared data "
+ int64_t ru_isrss; //!< integral unshared stack "
+ int64_t ru_minflt; //!< page reclaims - total vmfaults
+ int64_t ru_majflt; //!< page faults
+ int64_t ru_nswap; //!< swaps
+ int64_t ru_inblock; //!< block input operations
+ int64_t ru_oublock; //!< block output operations
+ int64_t ru_msgsnd; //!< messages sent
+ int64_t ru_msgrcv; //!< messages received
+ int64_t ru_nsignals; //!< signals received
+ int64_t ru_nvcsw; //!< voluntary context switches
+ int64_t ru_nivcsw; //!< involuntary "
} rusage;
}; // class OperatingSystem
/// Stat buffer. Note that we can't call it 'stat' since that
/// gets #defined to something else on some systems.
typedef struct {
- uint64_t st_dev; //!< device
- uint64_t st_ino; //!< inode
- uint32_t st_mode; //!< mode
- uint32_t st_nlink; //!< link count
- int32_t st_uid; //!< owner's user ID
- int32_t st_gid; //!< owner's group ID
- uint64_t st_rdev; //!< device number
- int64_t st_size; //!< file size in bytes
- //struct tgt_timespec st_atimeX; //!< time of last access
- //struct tgt_timespec st_mtimeX; //!< time of last modification
- //struct tgt_timespec st_ctimeX; //!< time of last status change
+ uint64_t st_dev; //!< device
+ uint64_t st_ino; //!< inode
+ uint32_t st_mode; //!< mode
+ uint32_t st_nlink; //!< link count
+ int32_t st_uid; //!< owner's user ID
+ int32_t st_gid; //!< owner's group ID
+ uint64_t st_rdev; //!< device number
+ int64_t st_size; //!< file size in bytes
+ //struct tgt_timespec st_atimeX; //!< time of last access
+ //struct tgt_timespec st_mtimeX; //!< time of last modification
+ //struct tgt_timespec st_ctimeX; //!< time of last status change
int64_t st_atimeX, st_mtimeX, st_ctimeX;
- int32_t st_blksize; //!< optimal I/O block size
- int64_t st_blocks; //!< number of blocks allocated
+ int32_t st_blksize; //!< optimal I/O block size
+ int64_t st_blocks; //!< number of blocks allocated
char st_fstype[16];
} tgt_stat;
// same for stat64
typedef struct {
- uint64_t st_dev; //!< device
- uint64_t st_ino; //!< inode
- uint32_t st_mode; //!< mode
- uint32_t st_nlink; //!< link count
- int32_t st_uid; //!< owner's user ID
- int32_t st_gid; //!< owner's group ID
- uint64_t st_rdev; //!< device number
- int64_t st_size; //!< file size in bytes
- //struct tgt_timespec st_atimeX; //!< time of last access
- //struct tgt_timespec st_mtimeX; //!< time of last modification
- //struct tgt_timespec st_ctimeX; //!< time of last status change
+ uint64_t st_dev; //!< device
+ uint64_t st_ino; //!< inode
+ uint32_t st_mode; //!< mode
+ uint32_t st_nlink; //!< link count
+ int32_t st_uid; //!< owner's user ID
+ int32_t st_gid; //!< owner's group ID
+ uint64_t st_rdev; //!< device number
+ int64_t st_size; //!< file size in bytes
+ //struct tgt_timespec st_atimeX; //!< time of last access
+ //struct tgt_timespec st_mtimeX; //!< time of last modification
+ //struct tgt_timespec st_ctimeX; //!< time of last status change
int64_t st_atimeX, st_mtimeX, st_ctimeX;
- int32_t st_blksize; //!< optimal I/O block size
- int64_t st_blocks; //!< number of blocks allocated
+ int32_t st_blksize; //!< optimal I/O block size
+ int64_t st_blocks; //!< number of blocks allocated
char st_fstype[16];
} tgt_stat64;
/// Interface struct for uname().
typedef struct utsname {
- char sysname[_SYS_NMLN]; //!< System name.
- char nodename[_SYS_NMLN]; //!< Node name.
- char release[_SYS_NMLN]; //!< OS release.
- char version[_SYS_NMLN]; //!< OS version.
- char machine[_SYS_NMLN]; //!< Machine type.
+ char sysname[_SYS_NMLN]; //!< System name.
+ char nodename[_SYS_NMLN]; //!< Node name.
+ char release[_SYS_NMLN]; //!< OS release.
+ char version[_SYS_NMLN]; //!< OS version.
+ char machine[_SYS_NMLN]; //!< Machine type.
} utsname;
}; // class Solaris
namespace tru64 {
struct m_hdr {
- Addr mh_next; // 0x00
- Addr mh_nextpkt; // 0x08
- Addr mh_data; // 0x10
- int32_t mh_len; // 0x18
- int32_t mh_type; // 0x1C
- int32_t mh_flags; // 0x20
- int32_t mh_pad0; // 0x24
- Addr mh_foo[4]; // 0x28, 0x30, 0x38, 0x40
+ Addr mh_next; // 0x00
+ Addr mh_nextpkt; // 0x08
+ Addr mh_data; // 0x10
+ int32_t mh_len; // 0x18
+ int32_t mh_type; // 0x1C
+ int32_t mh_flags; // 0x20
+ int32_t mh_pad0; // 0x24
+ Addr mh_foo[4]; // 0x28, 0x30, 0x38, 0x40
};
-struct pkthdr {
- int32_t len;
- int32_t protocolSum;
- Addr rcvif;
+struct pkthdr {
+ int32_t len;
+ int32_t protocolSum;
+ Addr rcvif;
};
struct m_ext {
- Addr ext_buf; // 0x00
- Addr ext_free; // 0x08
- uint32_t ext_size; // 0x10
- uint32_t ext_pad0; // 0x14
- Addr ext_arg; // 0x18
- struct ext_refq {
- Addr forw, back; // 0x20, 0x28
+ Addr ext_buf; // 0x00
+ Addr ext_free; // 0x08
+ uint32_t ext_size; // 0x10
+ uint32_t ext_pad0; // 0x14
+ Addr ext_arg; // 0x18
+ struct ext_refq {
+ Addr forw, back; // 0x20, 0x28
} ext_ref;
- Addr uiomove_f; // 0x30
- int32_t protocolSum; // 0x38
- int32_t bytesSummed; // 0x3C
- Addr checksum; // 0x40
+ Addr uiomove_f; // 0x30
+ int32_t protocolSum; // 0x38
+ int32_t bytesSummed; // 0x3C
+ Addr checksum; // 0x40
};
struct mbuf {
- struct m_hdr m_hdr;
+ struct m_hdr m_hdr;
union {
struct {
- struct pkthdr MH_pkthdr;
+ struct pkthdr MH_pkthdr;
union {
- struct m_ext MH_ext;
- char MH_databuf[1];
+ struct m_ext MH_ext;
+ char MH_databuf[1];
} MH_dat;
} MH;
- char M_databuf[1];
+ char M_databuf[1];
} M_dat;
};
#define m_attr m_hdr.mh_attr
-#define m_next m_hdr.mh_next
-#define m_len m_hdr.mh_len
-#define m_data m_hdr.mh_data
-#define m_type m_hdr.mh_type
-#define m_flags m_hdr.mh_flags
-#define m_nextpkt m_hdr.mh_nextpkt
-#define m_act m_nextpkt
-#define m_pkthdr M_dat.MH.MH_pkthdr
-#define m_ext M_dat.MH.MH_dat.MH_ext
-#define m_pktdat M_dat.MH.MH_dat.MH_databuf
-#define m_dat M_dat.M_databuf
+#define m_next m_hdr.mh_next
+#define m_len m_hdr.mh_len
+#define m_data m_hdr.mh_data
+#define m_type m_hdr.mh_type
+#define m_flags m_hdr.mh_flags
+#define m_nextpkt m_hdr.mh_nextpkt
+#define m_act m_nextpkt
+#define m_pkthdr M_dat.MH.MH_pkthdr
+#define m_ext M_dat.MH.MH_dat.MH_ext
+#define m_pktdat M_dat.MH.MH_dat.MH_databuf
+#define m_dat M_dat.M_databuf
}
#include <dirent.h>
#include <errno.h>
#include <fcntl.h>
-#include <string.h> // for memset()
+#include <string.h> // for memset()
#include <unistd.h>
#include "cpu/base.hh"
int32_t f_retired5;
int32_t f_retired6;
int32_t f_retired7;
- fsid_t f_fsid;
+ fsid_t f_fsid;
int32_t f_spare[9];
char f_retired8[90];
char f_retired9[90];
/// For getdirentries().
struct dirent
{
- ino_t d_ino; //!< file number of entry
- uint16_t d_reclen; //!< length of this record
- uint16_t d_namlen; //!< length of string in d_name
- char d_name[256]; //!< dummy name length
+ ino_t d_ino; //!< file number of entry
+ uint16_t d_reclen; //!< length of this record
+ uint16_t d_namlen; //!< length of string in d_name
+ char d_name[256]; //!< dummy name length
};
/// Limit struct for getrlimit/setrlimit.
struct rlimit {
- uint64_t rlim_cur; //!< soft limit
- uint64_t rlim_max; //!< hard limit
+ uint64_t rlim_cur; //!< soft limit
+ uint64_t rlim_max; //!< hard limit
};
/// For getsysinfo() GSI_CPU_INFO option.
struct cpu_info {
- uint32_t current_cpu; //!< current_cpu
- uint32_t cpus_in_box; //!< cpus_in_box
- uint32_t cpu_type; //!< cpu_type
- uint32_t ncpus; //!< ncpus
- uint64_t cpus_present; //!< cpus_present
- uint64_t cpus_running; //!< cpus_running
- uint64_t cpu_binding; //!< cpu_binding
- uint64_t cpu_ex_binding; //!< cpu_ex_binding
- uint32_t mhz; //!< mhz
- uint32_t unused[3]; //!< future expansion
+ uint32_t current_cpu; //!< current_cpu
+ uint32_t cpus_in_box; //!< cpus_in_box
+ uint32_t cpu_type; //!< cpu_type
+ uint32_t ncpus; //!< ncpus
+ uint64_t cpus_present; //!< cpus_present
+ uint64_t cpus_running; //!< cpus_running
+ uint64_t cpu_binding; //!< cpu_binding
+ uint64_t cpu_ex_binding; //!< cpu_ex_binding
+ uint32_t mhz; //!< mhz
+ uint32_t unused[3]; //!< future expansion
};
/// For gettimeofday.
struct timeval {
- uint32_t tv_sec; //!< seconds
- uint32_t tv_usec; //!< microseconds
+ uint32_t tv_sec; //!< seconds
+ uint32_t tv_usec; //!< microseconds
};
/// For getrusage().
struct rusage {
- struct timeval ru_utime; //!< user time used
- struct timeval ru_stime; //!< system time used
- uint64_t ru_maxrss; //!< ru_maxrss
- uint64_t ru_ixrss; //!< integral shared memory size
- uint64_t ru_idrss; //!< integral unshared data "
- uint64_t ru_isrss; //!< integral unshared stack "
- uint64_t ru_minflt; //!< page reclaims - total vmfaults
- uint64_t ru_majflt; //!< page faults
- uint64_t ru_nswap; //!< swaps
- uint64_t ru_inblock; //!< block input operations
- uint64_t ru_oublock; //!< block output operations
- uint64_t ru_msgsnd; //!< messages sent
- uint64_t ru_msgrcv; //!< messages received
- uint64_t ru_nsignals; //!< signals received
- uint64_t ru_nvcsw; //!< voluntary context switches
- uint64_t ru_nivcsw; //!< involuntary "
+ struct timeval ru_utime; //!< user time used
+ struct timeval ru_stime; //!< system time used
+ uint64_t ru_maxrss; //!< ru_maxrss
+ uint64_t ru_ixrss; //!< integral shared memory size
+ uint64_t ru_idrss; //!< integral unshared data "
+ uint64_t ru_isrss; //!< integral unshared stack "
+ uint64_t ru_minflt; //!< page reclaims - total vmfaults
+ uint64_t ru_majflt; //!< page faults
+ uint64_t ru_nswap; //!< swaps
+ uint64_t ru_inblock; //!< block input operations
+ uint64_t ru_oublock; //!< block output operations
+ uint64_t ru_msgsnd; //!< messages sent
+ uint64_t ru_msgrcv; //!< messages received
+ uint64_t ru_nsignals; //!< signals received
+ uint64_t ru_nvcsw; //!< voluntary context switches
+ uint64_t ru_nivcsw; //!< involuntary "
};
/// For sigreturn().
struct sigcontext {
- int64_t sc_onstack; //!< sigstack state to restore
- int64_t sc_mask; //!< signal mask to restore
- int64_t sc_pc; //!< pc at time of signal
- int64_t sc_ps; //!< psl to retore
- int64_t sc_regs[32]; //!< processor regs 0 to 31
- int64_t sc_ownedfp; //!< fp has been used
- int64_t sc_fpregs[32]; //!< fp regs 0 to 31
- uint64_t sc_fpcr; //!< floating point control reg
- uint64_t sc_fp_control; //!< software fpcr
- int64_t sc_reserved1; //!< reserved for kernel
- uint32_t sc_kreserved1; //!< reserved for kernel
- uint32_t sc_kreserved2; //!< reserved for kernel
- size_t sc_ssize; //!< stack size
- caddr_t sc_sbase; //!< stack start
- uint64_t sc_traparg_a0; //!< a0 argument to trap on exc
- uint64_t sc_traparg_a1; //!< a1 argument to trap on exc
- uint64_t sc_traparg_a2; //!< a2 argument to trap on exc
- uint64_t sc_fp_trap_pc; //!< imprecise pc
- uint64_t sc_fp_trigger_sum; //!< Exception summary at trigg
- uint64_t sc_fp_trigger_inst; //!< Instruction at trigger pc
+ int64_t sc_onstack; //!< sigstack state to restore
+ int64_t sc_mask; //!< signal mask to restore
+ int64_t sc_pc; //!< pc at time of signal
+ int64_t sc_ps; //!< psl to retore
+ int64_t sc_regs[32]; //!< processor regs 0 to 31
+ int64_t sc_ownedfp; //!< fp has been used
+ int64_t sc_fpregs[32]; //!< fp regs 0 to 31
+ uint64_t sc_fpcr; //!< floating point control reg
+ uint64_t sc_fp_control; //!< software fpcr
+ int64_t sc_reserved1; //!< reserved for kernel
+ uint32_t sc_kreserved1; //!< reserved for kernel
+ uint32_t sc_kreserved2; //!< reserved for kernel
+ size_t sc_ssize; //!< stack size
+ caddr_t sc_sbase; //!< stack start
+ uint64_t sc_traparg_a0; //!< a0 argument to trap on exc
+ uint64_t sc_traparg_a1; //!< a1 argument to trap on exc
+ uint64_t sc_traparg_a2; //!< a2 argument to trap on exc
+ uint64_t sc_fp_trap_pc; //!< imprecise pc
+ uint64_t sc_fp_trigger_sum; //!< Exception summary at trigg
+ uint64_t sc_fp_trigger_inst; //!< Instruction at trigger pc
};
/// For table().
struct tbl_sysinfo {
- uint64_t si_user; //!< User time
- uint64_t si_nice; //!< Nice time
- uint64_t si_sys; //!< System time
- uint64_t si_idle; //!< Idle time
- uint64_t si_hz; //!< hz
- uint64_t si_phz; //!< phz
- uint64_t si_boottime; //!< Boot time in seconds
- uint64_t wait; //!< Wait time
- uint32_t si_max_procs; //!< rpb->rpb_numprocs
- uint32_t pad; //!< padding
+ uint64_t si_user; //!< User time
+ uint64_t si_nice; //!< Nice time
+ uint64_t si_sys; //!< System time
+ uint64_t si_idle; //!< Idle time
+ uint64_t si_hz; //!< hz
+ uint64_t si_phz; //!< phz
+ uint64_t si_boottime; //!< Boot time in seconds
+ uint64_t wait; //!< Wait time
+ uint32_t si_max_procs; //!< rpb->rpb_numprocs
+ uint32_t pad; //!< padding
};
/// For stack_create.
struct vm_stack {
// was void *
- Addr address; //!< address hint
- size_t rsize; //!< red zone size
- size_t ysize; //!< yellow zone size
- size_t gsize; //!< green zone size
- size_t swap; //!< amount of swap to reserve
- size_t incr; //!< growth increment
- uint64_t align; //!< address alignment
- uint64_t flags; //!< MAP_FIXED etc.
+ Addr address; //!< address hint
+ size_t rsize; //!< red zone size
+ size_t ysize; //!< yellow zone size
+ size_t gsize; //!< green zone size
+ size_t swap; //!< amount of swap to reserve
+ size_t incr; //!< growth increment
+ uint64_t align; //!< address alignment
+ uint64_t flags; //!< MAP_FIXED etc.
// was struct memalloc_attr *
- Addr attr; //!< allocation policy
- uint64_t reserved; //!< reserved
+ Addr attr; //!< allocation policy
+ uint64_t reserved; //!< reserved
};
/// Return values for nxm calls.
};
/// For nxm_task_init.
- static const int NXM_TASK_INIT_VP = 2; //!< initial thread is VP
+ static const int NXM_TASK_INIT_VP = 2; //!< initial thread is VP
/// Task attribute structure.
struct nxm_task_attr {
- int64_t nxm_callback; //!< nxm_callback
- unsigned int nxm_version; //!< nxm_version
- unsigned short nxm_uniq_offset; //!< nxm_uniq_offset
- unsigned short flags; //!< flags
- int nxm_quantum; //!< nxm_quantum
- int pad1; //!< pad1
- int64_t pad2; //!< pad2
+ int64_t nxm_callback; //!< nxm_callback
+ unsigned int nxm_version; //!< nxm_version
+ unsigned short nxm_uniq_offset; //!< nxm_uniq_offset
+ unsigned short flags; //!< flags
+ int nxm_quantum; //!< nxm_quantum
+ int pad1; //!< pad1
+ int64_t pad2; //!< pad2
};
/// Signal set.
// the kernel but are never context-switched by the library.
int nxm_ssig; //!< scheduler's synchronous signals
- int reserved1; //!< reserved1
+ int reserved1; //!< reserved1
int64_t nxm_active; //!< scheduler active
- int64_t reserved2; //!< reserved2
+ int64_t reserved2; //!< reserved2
};
struct nxm_sched_state {
int nxm_set_quantum; //!< quantum reset value
int nxm_sysevent; //!< syscall state
// struct nxm_upcall *
- Addr nxm_uc_ret; //!< stack ptr of null thread
+ Addr nxm_uc_ret; //!< stack ptr of null thread
// void *
Addr nxm_tid; //!< scheduler's thread id
int64_t nxm_va; //!< page fault address
// struct nxm_pth_state *
Addr nxm_pthid; //!< id of null thread
uint64_t nxm_bound_pcs_count; //!< bound PCS thread count
- int64_t pad[2]; //!< pad
+ int64_t pad[2]; //!< pad
};
/// nxm_shared.
int64_t nxm_callback; //!< address of upcall routine
unsigned int nxm_version; //!< version number
unsigned short nxm_uniq_offset; //!< correction factor for TEB
- unsigned short pad1; //!< pad1
+ unsigned short pad1; //!< pad1
int64_t space[2]; //!< future growth
struct nxm_sched_state nxm_ss[1]; //!< array of shared areas
};
/// For nxm_thread_create.
enum nxm_thread_type {
- NXM_TYPE_SCS = 0,
- NXM_TYPE_VP = 1,
- NXM_TYPE_MANAGER = 2
+ NXM_TYPE_SCS = 0,
+ NXM_TYPE_VP = 1,
+ NXM_TYPE_MANAGER = 2
};
/// Thread attributes.
struct nxm_thread_attr {
- int version; //!< version
- int type; //!< type
- int cancel_flags; //!< cancel_flags
- int priority; //!< priority
- int policy; //!< policy
- int signal_type; //!< signal_type
+ int version; //!< version
+ int type; //!< type
+ int cancel_flags; //!< cancel_flags
+ int priority; //!< priority
+ int policy; //!< policy
+ int signal_type; //!< signal_type
// void *
- Addr pthid; //!< pthid
- sigset_t sigmask; //!< sigmask
+ Addr pthid; //!< pthid
+ sigset_t sigmask; //!< sigmask
/// Initial register values.
struct {
- uint64_t pc; //!< pc
- uint64_t sp; //!< sp
- uint64_t a0; //!< a0
+ uint64_t pc; //!< pc
+ uint64_t sp; //!< sp
+ uint64_t a0; //!< a0
} registers;
- uint64_t pad2[2]; //!< pad2
+ uint64_t pad2[2]; //!< pad2
};
/// Helper function to convert a host statfs buffer to a target statfs
process->numCpus() * sizeof(Tru64::nxm_slot_state_t);
cur_addr += slot_state_size;
// now the per-RAD state struct (we only support one RAD)
- cur_addr = 0x14000; // bump up addr for alignment
+ cur_addr = 0x14000; // bump up addr for alignment
Addr rad_state_addr = cur_addr;
int rad_state_size =
(sizeof(Tru64::nxm_shared)
TypedBufferArg<Tru64::nxm_config_info> config(config_addr);
config->nxm_nslots_per_rad = htog(process->numCpus());
- config->nxm_nrads = htog(1); // only one RAD in our system!
+ config->nxm_nrads = htog(1); // only one RAD in our system!
config->nxm_slot_state = htog(slot_state_addr);
config->nxm_rad[0] = htog(rad_state_addr);
/// On some hosts (notably Linux) define st_atime, st_mtime, and
/// st_ctime as macros, so we append an X to get around this.
struct F64_stat {
- dev_t st_dev; //!< st_dev
- int32_t st_retired1; //!< st_retired1
- mode_t st_mode; //!< st_mode
- nlink_t st_nlink; //!< st_nlink
- uint16_t st_nlink_reserved; //!< st_nlink_reserved
- uid_t st_uid; //!< st_uid
- gid_t st_gid; //!< st_gid
- dev_t st_rdev; //!< st_rdev
- dev_t st_ldev; //!< st_ldev
- off_t st_size; //!< st_size
- time_t st_retired2; //!< st_retired2
- int32_t st_uatime; //!< st_uatime
- time_t st_retired3; //!< st_retired3
- int32_t st_umtime; //!< st_umtime
- time_t st_retired4; //!< st_retired4
- int32_t st_uctime; //!< st_uctime
- int32_t st_retired5; //!< st_retired5
- int32_t st_retired6; //!< st_retired6
- uint32_t st_flags; //!< st_flags
- uint32_t st_gen; //!< st_gen
- uint64_t st_spare[4]; //!< st_spare[4]
- ino_t st_ino; //!< st_ino
- int32_t st_ino_reserved; //!< st_ino_reserved
- time_t st_atimeX; //!< st_atime
- int32_t st_atime_reserved; //!< st_atime_reserved
- time_t st_mtimeX; //!< st_mtime
- int32_t st_mtime_reserved; //!< st_mtime_reserved
- time_t st_ctimeX; //!< st_ctime
- int32_t st_ctime_reserved; //!< st_ctime_reserved
- uint64_t st_blksize; //!< st_blksize
- uint64_t st_blocks; //!< st_blocks
+ dev_t st_dev; //!< st_dev
+ int32_t st_retired1; //!< st_retired1
+ mode_t st_mode; //!< st_mode
+ nlink_t st_nlink; //!< st_nlink
+ uint16_t st_nlink_reserved; //!< st_nlink_reserved
+ uid_t st_uid; //!< st_uid
+ gid_t st_gid; //!< st_gid
+ dev_t st_rdev; //!< st_rdev
+ dev_t st_ldev; //!< st_ldev
+ off_t st_size; //!< st_size
+ time_t st_retired2; //!< st_retired2
+ int32_t st_uatime; //!< st_uatime
+ time_t st_retired3; //!< st_retired3
+ int32_t st_umtime; //!< st_umtime
+ time_t st_retired4; //!< st_retired4
+ int32_t st_uctime; //!< st_uctime
+ int32_t st_retired5; //!< st_retired5
+ int32_t st_retired6; //!< st_retired6
+ uint32_t st_flags; //!< st_flags
+ uint32_t st_gen; //!< st_gen
+ uint64_t st_spare[4]; //!< st_spare[4]
+ ino_t st_ino; //!< st_ino
+ int32_t st_ino_reserved; //!< st_ino_reserved
+ time_t st_atimeX; //!< st_atime
+ int32_t st_atime_reserved; //!< st_atime_reserved
+ time_t st_mtimeX; //!< st_mtime
+ int32_t st_mtime_reserved; //!< st_mtime_reserved
+ time_t st_ctimeX; //!< st_ctime
+ int32_t st_ctime_reserved; //!< st_ctime_reserved
+ uint64_t st_blksize; //!< st_blksize
+ uint64_t st_blocks; //!< st_blocks
};
typedef F64_stat tgt_stat;
namespace {
const char *
standard_strings[SystemCalls<Tru64>::StandardNumber] = {
- "syscall", // 0
- "exit", // 1
- "fork", // 2
- "read", // 3
- "write", // 4
- "old_open", // 5
- "close", // 6
- "wait4", // 7
- "old_creat", // 8
- "link", // 9
-
- "unlink", // 10
- "execv", // 11
- "chdir", // 12
- "fchdir", // 13
- "mknod", // 14
- "chmod", // 15
- "chown", // 16
- "obreak", // 17
- "pre_F64_getfsstat", // 18
- "lseek", // 19
-
- "getpid", // 20
- "mount", // 21
- "unmount", // 22
- "setuid", // 23
- "getuid", // 24
- "exec_with_loader", // 25
- "ptrace", // 26
- "recvmsg", // 27
- "sendmsg", // 28
- "recvfrom", // 29
-
- "accept", // 30
- "getpeername", // 31
- "getsockname", // 32
- "access", // 33
- "chflags", // 34
- "fchflags", // 35
- "sync", // 36
- "kill", // 37
- "old_stat", // 38
- "setpgid", // 39
-
- "old_lstat", // 40
- "dup", // 41
- "pipe", // 42
- "set_program_attributes", // 43
- "profil", // 44
- "open", // 45
- "obsolete_osigaction", // 46
- "getgid", // 47
- "sigprocmask", // 48
- "getlogin", // 49
-
- "setlogin", // 50
- "acct", // 51
- "sigpending", // 52
- "classcntl", // 53
- "ioctl", // 54
- "reboot", // 55
- "revoke", // 56
- "symlink", // 57
- "readlink", // 58
- "execve", // 59
-
- "umask", // 60
- "chroot", // 61
- "old_fstat", // 62
- "getpgrp", // 63
- "getpagesize", // 64
- "mremap", // 65
- "vfork", // 66
- "pre_F64_stat", // 67
- "pre_F64_lstat", // 68
- "sbrk", // 69
-
- "sstk", // 70
- "mmap", // 71
- "ovadvise", // 72
- "munmap", // 73
- "mprotect", // 74
- "madvise", // 75
- "old_vhangup", // 76
- "kmodcall", // 77
- "mincore", // 78
- "getgroups", // 79
-
- "setgroups", // 80
- "old_getpgrp", // 81
- "setpgrp", // 82
- "setitimer", // 83
- "old_wait", // 84
- "table", // 85
- "getitimer", // 86
- "gethostname", // 87
- "sethostname", // 88
- "getdtablesize", // 89
-
- "dup2", // 90
- "pre_F64_fstat", // 91
- "fcntl", // 92
- "select", // 93
- "poll", // 94
- "fsync", // 95
- "setpriority", // 96
- "socket", // 97
- "connect", // 98
- "old_accept", // 99
-
- "getpriority", // 100
- "old_send", // 101
- "old_recv", // 102
- "sigreturn", // 103
- "bind", // 104
- "setsockopt", // 105
- "listen", // 106
- "plock", // 107
- "old_sigvec", // 108
- "old_sigblock", // 109
-
- "old_sigsetmask", // 110
- "sigsuspend", // 111
- "sigstack", // 112
- "old_recvmsg", // 113
- "old_sendmsg", // 114
- "obsolete_vtrcae", // 115
- "gettimeofday", // 116
- "getrusage", // 117
- "getsockopt", // 118
- "numa_syscalls", // 119
-
- "readv", // 120
- "writev", // 121
- "settimeofday", // 122
- "fchown", // 123
- "fchmod", // 124
- "old_recvfrom", // 125
- "setreuid", // 126
- "setregid", // 127
- "rename", // 128
- "truncate", // 129
-
- "ftruncate", // 130
- "flock", // 131
- "setgid", // 132
- "sendto", // 133
- "shutdown", // 134
- "socketpair", // 135
- "mkdir", // 136
- "rmdir", // 137
- "utimes", // 138
- "obsolete_42_sigreturn", // 139
-
- "adjtime", // 140
- "old_getpeername", // 141
- "gethostid", // 142
- "sethostid", // 143
- "getrlimit", // 144
- "setrlimit", // 145
- "old_killpg", // 146
- "setsid", // 147
- "quotactl", // 148
- "oldquota", // 149
-
- "old_getsockname", // 150
- "pread", // 151
- "pwrite", // 152
- "pid_block", // 153
- "pid_unblock", // 154
- "signal_urti", // 155
- "sigaction", // 156
- "sigwaitprim", // 157
- "nfssvc", // 158
- "getdirentries", // 159
-
- "pre_F64_statfs", // 160
- "pre_F64_fstatfs", // 161
- 0, // 162
- "async_daemon", // 163
- "getfh", // 164
- "getdomainname", // 165
- "setdomainname", // 166
- 0, // 167
- 0, // 168
- "exportfs", // 169
-
- 0, // 170
- 0, // 171
- 0, // 172
- 0, // 173
- 0, // 174
- 0, // 175
- 0, // 176
- 0, // 177
- 0, // 178
- 0, // 179
-
- 0, // 180
- "alt_plock", // 181
- 0, // 182
- 0, // 183
- "getmnt", // 184
- 0, // 185
- 0, // 186
- "alt_sigpending", // 187
- "alt_setsid", // 188
- 0, // 189
-
- 0, // 190
- 0, // 191
- 0, // 192
- 0, // 193
- 0, // 194
- 0, // 195
- 0, // 196
- 0, // 197
- 0, // 198
- "swapon", // 199
-
- "msgctl", // 200
- "msgget", // 201
- "msgrcv", // 202
- "msgsnd", // 203
- "semctl", // 204
- "semget", // 205
- "semop", // 206
- "uname", // 207
- "lchown", // 208
- "shmat", // 209
-
- "shmctl", // 210
- "shmdt", // 211
- "shmget", // 212
- "mvalid", // 213
- "getaddressconf", // 214
- "msleep", // 215
- "mwakeup", // 216
- "msync", // 217
- "signal", // 218
- "utc_gettime", // 219
-
- "utc_adjtime", // 220
- 0, // 221
- "security", // 222
- "kloadcall", // 223
- "stat", // 224
- "lstat", // 225
- "fstat", // 226
- "statfs", // 227
- "fstatfs", // 228
- "getfsstat", // 229
-
- "gettimeofday64", // 230
- "settimeofday64", // 231
- 0, // 232
- "getpgid", // 233
- "getsid", // 234
- "sigaltstack", // 235
- "waitid", // 236
- "priocntlset", // 237
- "sigsendset", // 238
- "set_speculative", // 239
-
- "msfs_syscall", // 240
- "sysinfo", // 241
- "uadmin", // 242
- "fuser", // 243
- "proplist_syscall", // 244
- "ntp_adjtime", // 245
- "ntp_gettime", // 246
- "pathconf", // 247
- "fpathconf", // 248
- "sync2", // 249
-
- "uswitch", // 250
- "usleep_thread", // 251
- "audcntl", // 252
- "audgen", // 253
- "sysfs", // 254
- "subsys_info", // 255
- "getsysinfo", // 256
- "setsysinfo", // 257
- "afs_syscall", // 258
- "swapctl", // 259
-
- "memcntl", // 260
- "fdatasync", // 261
- "oflock", // 262
- "_F64_readv", // 263
- "_F64_writev", // 264
- "cdslxlate", // 265
- "sendfile", // 266
+ "syscall", // 0
+ "exit", // 1
+ "fork", // 2
+ "read", // 3
+ "write", // 4
+ "old_open", // 5
+ "close", // 6
+ "wait4", // 7
+ "old_creat", // 8
+ "link", // 9
+
+ "unlink", // 10
+ "execv", // 11
+ "chdir", // 12
+ "fchdir", // 13
+ "mknod", // 14
+ "chmod", // 15
+ "chown", // 16
+ "obreak", // 17
+ "pre_F64_getfsstat", // 18
+ "lseek", // 19
+
+ "getpid", // 20
+ "mount", // 21
+ "unmount", // 22
+ "setuid", // 23
+ "getuid", // 24
+ "exec_with_loader", // 25
+ "ptrace", // 26
+ "recvmsg", // 27
+ "sendmsg", // 28
+ "recvfrom", // 29
+
+ "accept", // 30
+ "getpeername", // 31
+ "getsockname", // 32
+ "access", // 33
+ "chflags", // 34
+ "fchflags", // 35
+ "sync", // 36
+ "kill", // 37
+ "old_stat", // 38
+ "setpgid", // 39
+
+ "old_lstat", // 40
+ "dup", // 41
+ "pipe", // 42
+ "set_program_attributes", // 43
+ "profil", // 44
+ "open", // 45
+ "obsolete_osigaction", // 46
+ "getgid", // 47
+ "sigprocmask", // 48
+ "getlogin", // 49
+
+ "setlogin", // 50
+ "acct", // 51
+ "sigpending", // 52
+ "classcntl", // 53
+ "ioctl", // 54
+ "reboot", // 55
+ "revoke", // 56
+ "symlink", // 57
+ "readlink", // 58
+ "execve", // 59
+
+ "umask", // 60
+ "chroot", // 61
+ "old_fstat", // 62
+ "getpgrp", // 63
+ "getpagesize", // 64
+ "mremap", // 65
+ "vfork", // 66
+ "pre_F64_stat", // 67
+ "pre_F64_lstat", // 68
+ "sbrk", // 69
+
+ "sstk", // 70
+ "mmap", // 71
+ "ovadvise", // 72
+ "munmap", // 73
+ "mprotect", // 74
+ "madvise", // 75
+ "old_vhangup", // 76
+ "kmodcall", // 77
+ "mincore", // 78
+ "getgroups", // 79
+
+ "setgroups", // 80
+ "old_getpgrp", // 81
+ "setpgrp", // 82
+ "setitimer", // 83
+ "old_wait", // 84
+ "table", // 85
+ "getitimer", // 86
+ "gethostname", // 87
+ "sethostname", // 88
+ "getdtablesize", // 89
+
+ "dup2", // 90
+ "pre_F64_fstat", // 91
+ "fcntl", // 92
+ "select", // 93
+ "poll", // 94
+ "fsync", // 95
+ "setpriority", // 96
+ "socket", // 97
+ "connect", // 98
+ "old_accept", // 99
+
+ "getpriority", // 100
+ "old_send", // 101
+ "old_recv", // 102
+ "sigreturn", // 103
+ "bind", // 104
+ "setsockopt", // 105
+ "listen", // 106
+ "plock", // 107
+ "old_sigvec", // 108
+ "old_sigblock", // 109
+
+ "old_sigsetmask", // 110
+ "sigsuspend", // 111
+ "sigstack", // 112
+ "old_recvmsg", // 113
+ "old_sendmsg", // 114
+ "obsolete_vtrcae", // 115
+ "gettimeofday", // 116
+ "getrusage", // 117
+ "getsockopt", // 118
+ "numa_syscalls", // 119
+
+ "readv", // 120
+ "writev", // 121
+ "settimeofday", // 122
+ "fchown", // 123
+ "fchmod", // 124
+ "old_recvfrom", // 125
+ "setreuid", // 126
+ "setregid", // 127
+ "rename", // 128
+ "truncate", // 129
+
+ "ftruncate", // 130
+ "flock", // 131
+ "setgid", // 132
+ "sendto", // 133
+ "shutdown", // 134
+ "socketpair", // 135
+ "mkdir", // 136
+ "rmdir", // 137
+ "utimes", // 138
+ "obsolete_42_sigreturn", // 139
+
+ "adjtime", // 140
+ "old_getpeername", // 141
+ "gethostid", // 142
+ "sethostid", // 143
+ "getrlimit", // 144
+ "setrlimit", // 145
+ "old_killpg", // 146
+ "setsid", // 147
+ "quotactl", // 148
+ "oldquota", // 149
+
+ "old_getsockname", // 150
+ "pread", // 151
+ "pwrite", // 152
+ "pid_block", // 153
+ "pid_unblock", // 154
+ "signal_urti", // 155
+ "sigaction", // 156
+ "sigwaitprim", // 157
+ "nfssvc", // 158
+ "getdirentries", // 159
+
+ "pre_F64_statfs", // 160
+ "pre_F64_fstatfs", // 161
+ 0, // 162
+ "async_daemon", // 163
+ "getfh", // 164
+ "getdomainname", // 165
+ "setdomainname", // 166
+ 0, // 167
+ 0, // 168
+ "exportfs", // 169
+
+ 0, // 170
+ 0, // 171
+ 0, // 172
+ 0, // 173
+ 0, // 174
+ 0, // 175
+ 0, // 176
+ 0, // 177
+ 0, // 178
+ 0, // 179
+
+ 0, // 180
+ "alt_plock", // 181
+ 0, // 182
+ 0, // 183
+ "getmnt", // 184
+ 0, // 185
+ 0, // 186
+ "alt_sigpending", // 187
+ "alt_setsid", // 188
+ 0, // 189
+
+ 0, // 190
+ 0, // 191
+ 0, // 192
+ 0, // 193
+ 0, // 194
+ 0, // 195
+ 0, // 196
+ 0, // 197
+ 0, // 198
+ "swapon", // 199
+
+ "msgctl", // 200
+ "msgget", // 201
+ "msgrcv", // 202
+ "msgsnd", // 203
+ "semctl", // 204
+ "semget", // 205
+ "semop", // 206
+ "uname", // 207
+ "lchown", // 208
+ "shmat", // 209
+
+ "shmctl", // 210
+ "shmdt", // 211
+ "shmget", // 212
+ "mvalid", // 213
+ "getaddressconf", // 214
+ "msleep", // 215
+ "mwakeup", // 216
+ "msync", // 217
+ "signal", // 218
+ "utc_gettime", // 219
+
+ "utc_adjtime", // 220
+ 0, // 221
+ "security", // 222
+ "kloadcall", // 223
+ "stat", // 224
+ "lstat", // 225
+ "fstat", // 226
+ "statfs", // 227
+ "fstatfs", // 228
+ "getfsstat", // 229
+
+ "gettimeofday64", // 230
+ "settimeofday64", // 231
+ 0, // 232
+ "getpgid", // 233
+ "getsid", // 234
+ "sigaltstack", // 235
+ "waitid", // 236
+ "priocntlset", // 237
+ "sigsendset", // 238
+ "set_speculative", // 239
+
+ "msfs_syscall", // 240
+ "sysinfo", // 241
+ "uadmin", // 242
+ "fuser", // 243
+ "proplist_syscall", // 244
+ "ntp_adjtime", // 245
+ "ntp_gettime", // 246
+ "pathconf", // 247
+ "fpathconf", // 248
+ "sync2", // 249
+
+ "uswitch", // 250
+ "usleep_thread", // 251
+ "audcntl", // 252
+ "audgen", // 253
+ "sysfs", // 254
+ "subsys_info", // 255
+ "getsysinfo", // 256
+ "setsysinfo", // 257
+ "afs_syscall", // 258
+ "swapctl", // 259
+
+ "memcntl", // 260
+ "fdatasync", // 261
+ "oflock", // 262
+ "_F64_readv", // 263
+ "_F64_writev", // 264
+ "cdslxlate", // 265
+ "sendfile", // 266
};
const char *
mach_strings[SystemCalls<Tru64>::MachNumber] = {
- 0, // 0
- 0, // 1
- 0, // 2
- 0, // 3
- 0, // 4
- 0, // 5
- 0, // 6
- 0, // 7
- 0, // 8
- 0, // 9
-
- "task_self", // 10
- "thread_reply", // 11
- "task_notify", // 12
- "thread_self", // 13
- 0, // 14
- 0, // 15
- 0, // 16
- 0, // 17
- 0, // 18
- 0, // 19
-
- "msg_send_trap", // 20
- "msg_receive_trap", // 21
- "msg_rpc_trap", // 22
- 0, // 23
- "nxm_block", // 24
- "nxm_unblock", // 25
- 0, // 26
- 0, // 27
- 0, // 28
- "nxm_thread_destroy", // 29
-
- "lw_wire", // 30
- "lw_unwire", // 31
- "nxm_thread_create", // 32
- "nxm_task_init", // 33
- 0, // 34
- "nxm_idle", // 35
- "nxm_wakeup_idle", // 36
- "nxm_set_pthid", // 37
- "nxm_thread_kill", // 38
- "nxm_thread_block", // 39
-
- "nxm_thread_wakeup", // 40
- "init_process", // 41
- "nxm_get_binding", // 42
- "map_fd", // 43
- "nxm_resched", // 44
- "nxm_set_cancel", // 45
- "nxm_set_binding", // 46
- "stack_create", // 47
- "nxm_get_state", // 48
- "nxm_thread_suspend", // 49
-
- "nxm_thread_resume", // 50
- "nxm_signal_check", // 51
- "htg_unix_syscall", // 52
- 0, // 53
- 0, // 54
- "host_self", // 55
- "host_priv_self", // 56
- 0, // 57
- 0, // 58
- "swtch_pri", // 59
-
- "swtch", // 60
- "thread_switch", // 61
- "semop_fast", // 62
- "nxm_pshared_init", // 63
- "nxm_pshared_block", // 64
- "nxm_pshared_unblock", // 65
- "nxm_pshared_destroy", // 66
- "nxm_swtch_pri", // 67
- "lw_syscall", // 68
- 0, // 69
-
- "mach_sctimes_0", // 70
- "mach_sctimes_1", // 71
- "mach_sctimes_2", // 72
- "mach_sctimes_3", // 73
- "mach_sctimes_4", // 74
- "mach_sctimes_5", // 75
- "mach_sctimes_6", // 76
- "mach_sctimes_7", // 77
- "mach_sctimes_8", // 78
- "mach_sctimes_9", // 79
-
- "mach_sctimes_10", // 80
- "mach_sctimes_11", // 81
- "mach_sctimes_port_alloc_dealloc", // 82
+ 0, // 0
+ 0, // 1
+ 0, // 2
+ 0, // 3
+ 0, // 4
+ 0, // 5
+ 0, // 6
+ 0, // 7
+ 0, // 8
+ 0, // 9
+
+ "task_self", // 10
+ "thread_reply", // 11
+ "task_notify", // 12
+ "thread_self", // 13
+ 0, // 14
+ 0, // 15
+ 0, // 16
+ 0, // 17
+ 0, // 18
+ 0, // 19
+
+ "msg_send_trap", // 20
+ "msg_receive_trap", // 21
+ "msg_rpc_trap", // 22
+ 0, // 23
+ "nxm_block", // 24
+ "nxm_unblock", // 25
+ 0, // 26
+ 0, // 27
+ 0, // 28
+ "nxm_thread_destroy", // 29
+
+ "lw_wire", // 30
+ "lw_unwire", // 31
+ "nxm_thread_create", // 32
+ "nxm_task_init", // 33
+ 0, // 34
+ "nxm_idle", // 35
+ "nxm_wakeup_idle", // 36
+ "nxm_set_pthid", // 37
+ "nxm_thread_kill", // 38
+ "nxm_thread_block", // 39
+
+ "nxm_thread_wakeup", // 40
+ "init_process", // 41
+ "nxm_get_binding", // 42
+ "map_fd", // 43
+ "nxm_resched", // 44
+ "nxm_set_cancel", // 45
+ "nxm_set_binding", // 46
+ "stack_create", // 47
+ "nxm_get_state", // 48
+ "nxm_thread_suspend", // 49
+
+ "nxm_thread_resume", // 50
+ "nxm_signal_check", // 51
+ "htg_unix_syscall", // 52
+ 0, // 53
+ 0, // 54
+ "host_self", // 55
+ "host_priv_self", // 56
+ 0, // 57
+ 0, // 58
+ "swtch_pri", // 59
+
+ "swtch", // 60
+ "thread_switch", // 61
+ "semop_fast", // 62
+ "nxm_pshared_init", // 63
+ "nxm_pshared_block", // 64
+ "nxm_pshared_unblock", // 65
+ "nxm_pshared_destroy", // 66
+ "nxm_swtch_pri", // 67
+ "lw_syscall", // 68
+ 0, // 69
+
+ "mach_sctimes_0", // 70
+ "mach_sctimes_1", // 71
+ "mach_sctimes_2", // 72
+ "mach_sctimes_3", // 73
+ "mach_sctimes_4", // 74
+ "mach_sctimes_5", // 75
+ "mach_sctimes_6", // 76
+ "mach_sctimes_7", // 77
+ "mach_sctimes_8", // 78
+ "mach_sctimes_9", // 79
+
+ "mach_sctimes_10", // 80
+ "mach_sctimes_11", // 81
+ "mach_sctimes_port_alloc_dealloc", // 82
};
}
#include <list>
#include "base/printable.hh"
-#include "sim/core.hh" // for Tick
-#include "arch/isa_traits.hh" // for Addr
+#include "sim/core.hh" // for Tick
+#include "arch/isa_traits.hh" // for Addr
#include "mem/packet.hh"
#include "mem/request.hh"
*/
enum CacheBlkStatusBits {
/** valid, readable */
- BlkValid = 0x01,
+ BlkValid = 0x01,
/** write permission */
- BlkWritable = 0x02,
+ BlkWritable = 0x02,
/** read permission (yes, block can be valid but not readable) */
- BlkReadable = 0x04,
+ BlkReadable = 0x04,
/** dirty (modified) */
- BlkDirty = 0x08,
+ BlkDirty = 0x08,
/** block was referenced */
- BlkReferenced = 0x10,
+ BlkReferenced = 0x10,
/** block was a hardware prefetch yet unaccessed*/
- BlkHWPrefetched = 0x20
+ BlkHWPrefetched = 0x20
};
/**
*/
class Lock {
public:
- int cpuNum; // locking CPU
- int threadNum; // locking thread ID within CPU
+ int cpuNum; // locking CPU
+ int threadNum; // locking thread ID within CPU
// check for matching execution context
bool matchesContext(Request *req)
return retval; \
} while (0)
-#define BUILD_CACHE_PANIC(x) do { \
- panic("%s not compiled into M5", x); \
+#define BUILD_CACHE_PANIC(x) do { \
+ panic("%s not compiled into M5", x); \
} while (0)
#if defined(USE_CACHE_FALRU)
-#define BUILD_FALRU_CACHE do { \
+#define BUILD_FALRU_CACHE do { \
FALRU *tags = new FALRU(block_size, size, latency); \
- BUILD_CACHE(FALRU, tags); \
+ BUILD_CACHE(FALRU, tags); \
} while (0)
#else
#define BUILD_FALRU_CACHE BUILD_CACHE_PANIC("falru cache")
#endif
#if defined(USE_CACHE_LRU)
-#define BUILD_LRU_CACHE do { \
- LRU *tags = new LRU(numSets, block_size, assoc, latency); \
- BUILD_CACHE(LRU, tags); \
+#define BUILD_LRU_CACHE do { \
+ LRU *tags = new LRU(numSets, block_size, assoc, latency); \
+ BUILD_CACHE(LRU, tags); \
} while (0)
#else
#define BUILD_LRU_CACHE BUILD_CACHE_PANIC("lru cache")
#endif
#if defined(USE_CACHE_SPLIT)
-#define BUILD_SPLIT_CACHE do { \
+#define BUILD_SPLIT_CACHE do { \
Split *tags = new Split(numSets, block_size, assoc, split_size, lifo, \
- two_queue, latency); \
- BUILD_CACHE(Split, tags); \
+ two_queue, latency); \
+ BUILD_CACHE(Split, tags); \
} while (0)
#else
#define BUILD_SPLIT_CACHE BUILD_CACHE_PANIC("split cache")
#endif
#if defined(USE_CACHE_SPLIT_LIFO)
-#define BUILD_SPLIT_LIFO_CACHE do { \
+#define BUILD_SPLIT_LIFO_CACHE do { \
SplitLIFO *tags = new SplitLIFO(block_size, size, assoc, \
- latency, two_queue, -1); \
- BUILD_CACHE(SplitLIFO, tags); \
+ latency, two_queue, -1); \
+ BUILD_CACHE(SplitLIFO, tags); \
} while (0)
#else
#define BUILD_SPLIT_LIFO_CACHE BUILD_CACHE_PANIC("lifo cache")
#endif
#if defined(USE_CACHE_IIC)
-#define BUILD_IIC_CACHE do { \
- IIC *tags = new IIC(iic_params); \
- BUILD_CACHE(IIC, tags); \
+#define BUILD_IIC_CACHE do { \
+ IIC *tags = new IIC(iic_params); \
+ BUILD_CACHE(IIC, tags); \
} while (0)
#else
#define BUILD_IIC_CACHE BUILD_CACHE_PANIC("iic")
#endif
-#define BUILD_CACHES do { \
- if (repl == NULL) { \
- if (numSets == 1) { \
- BUILD_FALRU_CACHE; \
- } else { \
- if (split == true) { \
- BUILD_SPLIT_CACHE; \
- } else if (lifo == true) { \
- BUILD_SPLIT_LIFO_CACHE; \
- } else { \
- BUILD_LRU_CACHE; \
- } \
- } \
- } else { \
- BUILD_IIC_CACHE; \
- } \
+#define BUILD_CACHES do { \
+ if (repl == NULL) { \
+ if (numSets == 1) { \
+ BUILD_FALRU_CACHE; \
+ } else { \
+ if (split == true) { \
+ BUILD_SPLIT_CACHE; \
+ } else if (lifo == true) { \
+ BUILD_SPLIT_LIFO_CACHE; \
+ } else { \
+ BUILD_LRU_CACHE; \
+ } \
+ } \
+ } else { \
+ BUILD_IIC_CACHE; \
+ } \
} while (0)
-#define BUILD_COHERENCE(b) do { \
+#define BUILD_COHERENCE(b) do { \
} while (0)
#if defined(USE_TAGGED)
-#define BUILD_TAGGED_PREFETCHER(t) \
+#define BUILD_TAGGED_PREFETCHER(t) \
pf = new TaggedPrefetcher(this)
#else
#define BUILD_TAGGED_PREFETCHER(t) BUILD_CACHE_PANIC("Tagged Prefetcher")
#endif
#if defined(USE_STRIDED)
-#define BUILD_STRIDED_PREFETCHER(t) \
+#define BUILD_STRIDED_PREFETCHER(t) \
pf = new StridePrefetcher(this)
#else
#define BUILD_STRIDED_PREFETCHER(t) BUILD_CACHE_PANIC("Stride Prefetcher")
#endif
#if defined(USE_GHB)
-#define BUILD_GHB_PREFETCHER(t) \
+#define BUILD_GHB_PREFETCHER(t) \
pf = new GHBPrefetcher(this)
#else
#define BUILD_GHB_PREFETCHER(t) BUILD_CACHE_PANIC("GHB Prefetcher")
#endif
#if defined(USE_TAGGED)
-#define BUILD_NULL_PREFETCHER(t) \
+#define BUILD_NULL_PREFETCHER(t) \
pf = new TaggedPrefetcher(this)
#else
#define BUILD_NULL_PREFETCHER(t) BUILD_CACHE_PANIC("NULL Prefetcher (uses Tagged)")
StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
std::list<Tick> &delays)
{
-// Addr blkAddr = pkt->paddr & ~(Addr)(this->blkSize-1);
+// Addr blkAddr = pkt->paddr & ~(Addr)(this->blkSize-1);
int cpuID = pkt->req->getCpuNum();
if (!useCPUId) cpuID = 0;
/* Scan Table for IAddr Match */
-/* std::list<strideEntry*>::iterator iter;
+/* std::list<strideEntry*>::iterator iter;
for (iter=table[cpuID].begin();
iter !=table[cpuID].end();
iter++) {
int stride;
int64_t confidence;
-/* bool operator < (strideEntry a,strideEntry b)
+/* bool operator < (strideEntry a,strideEntry b)
{
if (a.confidence == b.confidence) {
return true; //??????
tag_ptr->refCount = 0;
if (tag_ptr->isDirty()) {
-/* PacketPtr writeback =
+/* PacketPtr writeback =
buildWritebackReq(regenerateBlkAddr(tag_ptr->tag, 0),
tag_ptr->req->asid, tag_ptr->xc, blkSize,
tag_ptr->data,
// allocate data storage in one big chunk
dataBlks = new uint8_t[numSets*assoc*blkSize];
- blkIndex = 0; // index into blks array
+ blkIndex = 0; // index into blks array
for (i = 0; i < numSets; ++i) {
sets[i].assoc = assoc;
LRUBlk *blk = sets[myset].findBlk(tag);
- return (blk != NULL); // true if in cache
+ return (blk != NULL); // true if in cache
}
LRUBlk*
* @param _assoc The associativity of the cache.
* @param _hit_latency The latency in cycles for a hit.
*/
- LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency);
+ LRU(int _numSets, int _blkSize, int _assoc, int _hit_latency);
/**
* Destructor
// allocate data storage in one big chunk
dataBlks = new uint8_t[numSets*assoc*blkSize];
- blkIndex = 0; // index into blks array
+ blkIndex = 0; // index into blks array
for (i = 0; i < numSets; ++i) {
sets[i].assoc = assoc;
SplitBlk *blk = sets[myset].findBlk(tag);
- return (blk != NULL); // true if in cache
+ return (blk != NULL); // true if in cache
}
SplitBlk*
int lat=0, temp=0, current_bank=0;
int current_row=0, current_device=0;
- int was_miss = 0; // determines if there was an active row miss this access
+ int was_miss = 0; // determines if there was an active row miss this access
//md_addr_t physic_address; /* linear memory address to be accessed */
Addr physic_address; /* linear memory address to be accessed */
int SD_BEST_T_WRITE_WRITE_OBANK = 0; /* WAW, row miss/hit, another bank */
Tick time_since_last_access = curTick-time_last_access;
- Tick time_last_miss = 0; // used for keeping track of times between activations (page misses)
+ Tick time_last_miss = 0; // used for keeping track of times between activations (page misses)
//int was_idle = (curTick > busy_until);
bool srow_flag = false;
int timing_correction = 0;
// SDRAM does not use the active_row array in closed_page mode
// TODO: handle closed page operation
- } else { // DRDRAM uses the active_row array
+ } else { // DRDRAM uses the active_row array
for( int i = 0; i < bank_max; i++ ) {
if( (active_row[current_bank] != row_max)) all_precharged = 0;
}
}
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
/*fprintf(stderr,"%10.0f %10.0f %4d %4d \n",(double)busy_until, (double)curTick, overlap, lat);debug*/
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
}
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return lat;
}
assert(chunks >0);
// if((_cpu_num < num_cpus) && (_cpu_num >= 0))
// cout <<"cpu id = " << _cpu_num << "current_bank = " << current_bank << endl;
- // bank_access_profile[_cpu_num][current_bank]++;
+ // bank_access_profile[_cpu_num][current_bank]++;
return(/* first chunk latency */act_lat +
(/* remainder chunk latency */cas_lat * (chunks - 1)));
}
static Addr mask(Addr paddr) { return (paddr & ~Addr_Mask); }
- Addr addr; // locked address
- int cpuNum; // locking CPU
- int threadNum; // locking thread ID within CPU
+ Addr addr; // locked address
+ int cpuNum; // locking CPU
+ int threadNum; // locking thread ID within CPU
// check for matching execution context
bool matchesContext(Request *req)
/** ASI information for this request if it exsits. */
const uint32_t ASI_BITS = 0x000FF;
/** The request is a Load locked/store conditional. */
-const uint32_t LOCKED = 0x00100;
+const uint32_t LOCKED = 0x00100;
/** The virtual address is also the physical address. */
-const uint32_t PHYSICAL = 0x00200;
+const uint32_t PHYSICAL = 0x00200;
/** The request is an ALPHA VPTE pal access (hw_ld). */
-const uint32_t VPTE = 0x00400;
+const uint32_t VPTE = 0x00400;
/** Use the alternate mode bits in ALPHA. */
-const uint32_t ALTMODE = 0x00800;
+const uint32_t ALTMODE = 0x00800;
/** The request is to an uncacheable address. */
-const uint32_t UNCACHEABLE = 0x01000;
+const uint32_t UNCACHEABLE = 0x01000;
/** The request should not cause a page fault. */
const uint32_t NO_FAULT = 0x02000;
/** The request should be prefetched into the exclusive state. */
-const uint32_t PF_EXCLUSIVE = 0x10000;
+const uint32_t PF_EXCLUSIVE = 0x10000;
/** The request should be marked as LRU. */
-const uint32_t EVICT_NEXT = 0x20000;
+const uint32_t EVICT_NEXT = 0x20000;
/** The request should ignore unaligned access faults */
const uint32_t NO_ALIGN_FAULT = 0x40000;
/** The request was an instruction read. */
self._children[child].unproxy_all()
def print_ini(self, ini_file):
- print >>ini_file, '[' + self.path() + ']' # .ini section header
+ print >>ini_file, '[' + self.path() + ']' # .ini section header
instanceDict[self.path()] = self
if port != None:
print >>ini_file, '%s=%s' % (port_name, port.ini_str())
- print >>ini_file # blank line between objects
+ print >>ini_file # blank line between objects
for child in child_names:
self._children[child].print_ini(ini_file)
/// then checked in the main event loop. Defined in main.cc.
/// @note See the PollQueue object (in pollevent.hh) for the use of async_io and async_alarm.
//@{
-extern volatile bool async_event; ///< Some asynchronous event has happened.
-extern volatile bool async_statdump; ///< Async request to dump stats.
-extern volatile bool async_statreset; ///< Async request to reset stats.
-extern volatile bool async_exit; ///< Async request to exit simulator.
-extern volatile bool async_io; ///< Async I/O request (SIGIO).
-extern volatile bool async_alarm; ///< Async alarm event (SIGALRM).
+extern volatile bool async_event; ///< Some asynchronous event has happened.
+extern volatile bool async_statdump; ///< Async request to dump stats.
+extern volatile bool async_statreset; ///< Async request to reset stats.
+extern volatile bool async_exit; ///< Async request to exit simulator.
+extern volatile bool async_io; ///< Async I/O request (SIGIO).
+extern volatile bool async_alarm; ///< Async alarm event (SIGALRM).
extern volatile bool async_exception; ///< Python exception.
//@}
DebugBreakEvent(EventQueue *q, Tick _when);
- void process(); // process event
+ void process(); // process event
virtual const char *description() const;
};
#include "sim/serialize.hh"
#include "sim/host.hh"
-class EventQueue; // forward declaration
+class EventQueue; // forward declaration
//////////////////////
//
/// scheduled on this queue yet)
EventQueue *_queue;
- Tick _when; //!< timestamp when event should be processed
- short _priority; //!< event priority
+ Tick _when; //!< timestamp when event should be processed
+ short _priority; //!< event priority
short _flags;
#ifndef NDEBUG
EventQueue *queue() const { return _queue; }
// This function isn't really useful if TRACING_ON is not defined
- virtual void trace(const char *action); //!< trace event activity
+ virtual void trace(const char *action); //!< trace event activity
public:
/// Event priorities, to provide tie-breakers for events scheduled
/// be ordered within a cycle.
enum Priority {
/// Minimum priority
- Minimum_Pri = SHRT_MIN,
+ Minimum_Pri = SHRT_MIN,
/// If we enable tracing on a particular cycle, do that as the
/// very first thing so we don't miss any of the events on
/// Breakpoints should happen before anything else (except
/// enabling trace output), so we don't miss any action when
/// debugging.
- Debug_Break_Pri = -100,
+ Debug_Break_Pri = -100,
/// CPU switches schedule the new CPU's tick event for the
/// same cycle (after unscheduling the old CPU's tick event).
/// The switch needs to come before any tick events to make
/// sure we don't tick both CPUs in the same cycle.
- CPU_Switch_Pri = -31,
+ CPU_Switch_Pri = -31,
/// For some reason "delayed" inter-cluster writebacks are
/// scheduled before regular writebacks (which have default
/// priority). Steve?
- Delayed_Writeback_Pri = -1,
+ Delayed_Writeback_Pri = -1,
/// Default is zero for historical reasons.
- Default_Pri = 0,
+ Default_Pri = 0,
/// Serailization needs to occur before tick events also, so
/// that a serialize/unserialize is identical to an on-line
/// CPU switch.
- Serialize_Pri = 32,
+ Serialize_Pri = 32,
/// CPU ticks must come after other associated CPU events
/// (such as writebacks).
- CPU_Tick_Pri = 50,
+ CPU_Tick_Pri = 50,
/// Statistics events (dump, reset, etc.) come after
/// everything else, but before exit.
- Stat_Event_Pri = 90,
+ Stat_Event_Pri = 90,
/// Progress events come at the end.
Progress_Event_Pri = 95,
/// If we want to exit on this cycle, it's the very last thing
/// we do.
- Sim_Exit_Pri = 100,
+ Sim_Exit_Pri = 100,
/// Maximum priority
- Maximum_Pri = SHRT_MAX
+ Maximum_Pri = SHRT_MAX
};
/*
/** uint64_t constant */
-#define ULL(N) ((uint64_t)N##ULL)
+#define ULL(N) ((uint64_t)N##ULL)
/** int64_t constant */
-#define LL(N) ((int64_t)N##LL)
+#define LL(N) ((int64_t)N##LL)
/** Statistics counter type. Not much excuse for not using a 64-bit
* integer here, but if you're desperate and only run short
#include "base/bigint.hh"
#include "base/trace.hh"
-#include "cpu/inst_seq.hh" // for InstSeqNum
+#include "cpu/inst_seq.hh" // for InstSeqNum
#include "cpu/static_inst.hh"
#include "sim/host.hh"
#include "sim/sim_object.hh"
} data;
enum {
DataInvalid = 0,
- DataInt8 = 1, // set to equal number of bytes
+ DataInt8 = 1, // set to equal number of bytes
DataInt16 = 2,
DataInt32 = 4,
DataInt64 = 8,
WaitRec(Addr chan, ThreadContext *ctx)
: waitChan(chan), waitingContext(ctx)
- { }
+ { }
};
// list of all blocked contexts
std::list<WaitRec> waitList;
- Addr brk_point; // top of the data segment
+ Addr brk_point; // top of the data segment
- Addr stack_base; // stack segment base (highest address)
- unsigned stack_size; // initial stack size
- Addr stack_min; // lowest address accessed on the stack
+ Addr stack_base; // stack segment base (highest address)
+ unsigned stack_size; // initial stack size
+ Addr stack_min; // lowest address accessed on the stack
// The maximum size allowed for the stack.
Addr max_stack_size;
Addr nxm_start;
Addr nxm_end;
- std::string prog_fname; // file name
+ std::string prog_fname; // file name
- Stats::Scalar<> num_syscalls; // number of syscalls executed
+ Stats::Scalar<> num_syscalls; // number of syscalls executed
protected:
}
-#define INSTANTIATE_PARAM_TEMPLATES(type) \
-template void \
-paramOut(ostream &os, const std::string &name, type const ¶m); \
-template void \
-paramIn(Checkpoint *cp, const std::string §ion, \
- const std::string &name, type & param); \
-template void \
-arrayParamOut(ostream &os, const std::string &name, \
- type const *param, int size); \
-template void \
-arrayParamIn(Checkpoint *cp, const std::string §ion, \
+#define INSTANTIATE_PARAM_TEMPLATES(type) \
+template void \
+paramOut(ostream &os, const std::string &name, type const ¶m); \
+template void \
+paramIn(Checkpoint *cp, const std::string §ion, \
+ const std::string &name, type & param); \
+template void \
+arrayParamOut(ostream &os, const std::string &name, \
+ type const *param, int size); \
+template void \
+arrayParamIn(Checkpoint *cp, const std::string §ion, \
const std::string &name, type *param, int size); \
-template void \
-arrayParamOut(ostream &os, const std::string &name, \
- const std::vector<type> ¶m); \
-template void \
-arrayParamIn(Checkpoint *cp, const std::string §ion, \
+template void \
+arrayParamOut(ostream &os, const std::string &name, \
+ const std::vector<type> ¶m); \
+template void \
+arrayParamIn(Checkpoint *cp, const std::string §ion, \
const std::string &name, std::vector<type> ¶m);
INSTANTIATE_PARAM_TEMPLATES(signed char)
// These macros are streamlined to use in serialize/unserialize
// functions. It's assumed that serialize() has a parameter 'os' for
// the ostream, and unserialize() has parameters 'cp' and 'section'.
-#define SERIALIZE_SCALAR(scalar) paramOut(os, #scalar, scalar)
+#define SERIALIZE_SCALAR(scalar) paramOut(os, #scalar, scalar)
-#define UNSERIALIZE_SCALAR(scalar) paramIn(cp, section, #scalar, scalar)
+#define UNSERIALIZE_SCALAR(scalar) paramIn(cp, section, #scalar, scalar)
// ENUMs are like SCALARs, but we cast them to ints on the way out
-#define SERIALIZE_ENUM(scalar) paramOut(os, #scalar, (int)scalar)
+#define SERIALIZE_ENUM(scalar) paramOut(os, #scalar, (int)scalar)
-#define UNSERIALIZE_ENUM(scalar) \
- do { \
- int tmp; \
- paramIn(cp, section, #scalar, tmp); \
- scalar = (typeof(scalar))tmp; \
+#define UNSERIALIZE_ENUM(scalar) \
+ do { \
+ int tmp; \
+ paramIn(cp, section, #scalar, tmp); \
+ scalar = (typeof(scalar))tmp; \
} while (0)
-#define SERIALIZE_ARRAY(member, size) \
+#define SERIALIZE_ARRAY(member, size) \
arrayParamOut(os, #member, member, size)
-#define UNSERIALIZE_ARRAY(member, size) \
+#define UNSERIALIZE_ARRAY(member, size) \
arrayParamIn(cp, section, #member, member, size)
-#define SERIALIZE_OBJPTR(objptr) paramOut(os, #objptr, (objptr)->name())
+#define SERIALIZE_OBJPTR(objptr) paramOut(os, #objptr, (objptr)->name())
-#define UNSERIALIZE_OBJPTR(objptr) \
- do { \
- SimObject *sptr; \
- objParamIn(cp, section, #objptr, sptr); \
- objptr = dynamic_cast<typeof(objptr)>(sptr); \
+#define UNSERIALIZE_OBJPTR(objptr) \
+ do { \
+ SimObject *sptr; \
+ objParamIn(cp, section, #objptr, sptr); \
+ objptr = dynamic_cast<typeof(objptr)>(sptr); \
} while (0)
/*
// SerializableBuilder and SerializableClass objects
//
-#define REGISTER_SERIALIZEABLE(CLASS_NAME, OBJ_CLASS) \
-SerializableClass the##OBJ_CLASS##Class(CLASS_NAME, \
+#define REGISTER_SERIALIZEABLE(CLASS_NAME, OBJ_CLASS) \
+SerializableClass the##OBJ_CLASS##Class(CLASS_NAME, \
OBJ_CLASS::createForUnserialize);
void
{ setFlags(IsExitEvent); schedule(_when); }
// SimLoopExitEvent(EventQueue *q,
-// Tick _when, const std::string &_cause,
-// Tick _repeat = 0, int c = 0)
-// : Event(q, Sim_Exit_Pri), cause(_cause), code(c), repeat(_repeat)
+// Tick _when, const std::string &_cause,
+// Tick _repeat = 0, int c = 0)
+// : Event(q, Sim_Exit_Pri), cause(_cause), code(c), repeat(_repeat)
// { setFlags(IsExitEvent); schedule(_when); }
std::string getCause() { return cause; }
int getCode() { return code; }
- void process(); // process event
+ void process(); // process event
virtual const char *description() const;
};
class CountedExitEvent : public Event
{
private:
- std::string cause; // string explaining why we're terminating
- int &downCounter; // decrement & terminate if zero
+ std::string cause; // string explaining why we're terminating
+ int &downCounter; // decrement & terminate if zero
public:
CountedExitEvent(EventQueue *q, const std::string &_cause,
Tick _when, int &_downCounter);
- void process(); // process event
+ void process(); // process event
virtual const char *description() const;
};
: Event(q), interval(ival)
{ schedule(curTick + interval); }
- void process(); // process event
+ void process(); // process event
virtual const char *description() const;
};
// EUID goes in r20.
tc->setIntReg(SyscallPseudoReturnReg, process->euid()); //EUID
- return process->uid(); // UID
+ return process->uid(); // UID
}
getuidFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
ThreadContext *tc)
{
- return process->uid(); // UID
+ return process->uid(); // UID
}
SyscallReturn
geteuidFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
ThreadContext *tc)
{
- return process->euid(); // UID
+ return process->euid(); // UID
}
SyscallReturn
#include <errno.h>
#include <string>
#ifdef __CYGWIN32__
-#include <sys/fcntl.h> // for O_BINARY
+#include <sys/fcntl.h> // for O_BINARY
#endif
#include <sys/stat.h>
#include <fcntl.h>
#include <sys/uio.h>
-#include "sim/host.hh" // for Addr
+#include "sim/host.hh" // for Addr
#include "base/chunk_generator.hh"
-#include "base/intmath.hh" // for RoundUp
+#include "base/intmath.hh" // for RoundUp
#include "base/misc.hh"
#include "base/trace.hh"
#include "cpu/base.hh"
typedef SyscallReturn (*FuncPtr)(SyscallDesc *, int num,
LiveProcess *, ThreadContext *);
- const char *name; //!< Syscall name (e.g., "open").
- FuncPtr funcPtr; //!< Pointer to emulation function.
- int flags; //!< Flags (see Flags enum).
+ const char *name; //!< Syscall name (e.g., "open").
+ FuncPtr funcPtr; //!< Pointer to emulation function.
+ int flags; //!< Flags (see Flags enum).
/// Flag values for controlling syscall behavior.
enum Flags {
virtual bool copyIn(TranslatingPort *memport)
{
memport->readBlob(addr, bufPtr, size);
- return true; // no EFAULT detection for now
+ return true; // no EFAULT detection for now
}
//
virtual bool copyOut(TranslatingPort *memport)
{
memport->writeBlob(addr, bufPtr, size);
- return true; // no EFAULT detection for now
+ return true; // no EFAULT detection for now
}
protected:
{
public:
BufferArg(Addr _addr, int _size) : BaseBufferArg(_addr, _size) { }
- void *bufferPtr() { return bufPtr; }
+ void *bufferPtr() { return bufPtr; }
};
template <class T>
operator T*() { return (T *)bufPtr; }
// dereference operators
- T &operator*() { return *((T *)bufPtr); }
- T* operator->() { return (T *)bufPtr; }
+ T &operator*() { return *((T *)bufPtr); }
+ T* operator->() { return (T *)bufPtr; }
T &operator[](int i) { return ((T *)bufPtr)[i]; }
};
getrusageFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
ThreadContext *tc)
{
- int who = tc->getSyscallArg(0); // THREAD, SELF, or CHILDREN
+ int who = tc->getSyscallArg(0); // THREAD, SELF, or CHILDREN
TypedBufferArg<typename OS::rusage> rup(tc->getSyscallArg(1));
rup->ru_utime.tv_sec = 0;
#define END(func) \
.end func
-#define SIMPLE_OP(_f, _o) \
- LEAF(_f) \
- _o; \
- RET; \
+#define SIMPLE_OP(_f, _o) \
+ LEAF(_f) \
+ _o; \
+ RET; \
END(_f)
-#define ARM(reg) INST(m5_op, reg, 0, arm_func)
+#define ARM(reg) INST(m5_op, reg, 0, arm_func)
#define QUIESCE INST(m5_op, 0, 0, quiesce_func)
#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func)
#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
* Ali Saidi
*/
-#define arm_func 0x00
-#define quiesce_func 0x01
-#define quiescens_func 0x02
-#define quiescecycle_func 0x03
-#define quiescetime_func 0x04
-#define deprecated1_func 0x10 // obsolete ivlb
-#define deprecated2_func 0x11 // obsolete ivle
-#define deprecated3_func 0x20 // deprecated exit function
-#define exit_func 0x21
-#define initparam_func 0x30
-#define loadsymbol_func 0x31
-#define resetstats_func 0x40
-#define dumpstats_func 0x41
-#define dumprststats_func 0x42
-#define ckpt_func 0x43
-#define readfile_func 0x50
-#define debugbreak_func 0x51
-#define switchcpu_func 0x52
-#define addsymbol_func 0x53
-#define panic_func 0x54
+#define arm_func 0x00
+#define quiesce_func 0x01
+#define quiescens_func 0x02
+#define quiescecycle_func 0x03
+#define quiescetime_func 0x04
+#define deprecated1_func 0x10 // obsolete ivlb
+#define deprecated2_func 0x11 // obsolete ivle
+#define deprecated3_func 0x20 // deprecated exit function
+#define exit_func 0x21
+#define initparam_func 0x30
+#define loadsymbol_func 0x31
+#define resetstats_func 0x40
+#define dumpstats_func 0x41
+#define dumprststats_func 0x42
+#define ckpt_func 0x43
+#define readfile_func 0x50
+#define debugbreak_func 0x51
+#define switchcpu_func 0x52
+#define addsymbol_func 0x53
+#define panic_func 0x54
-#define reserved1_func 0x55 // Reserved for user
-#define reserved2_func 0x56 // Reserved for user
-#define reserved3_func 0x57 // Reserved for user
-#define reserved4_func 0x58 // Reserved for user
-#define reserved5_func 0x59 // Reserved for user
+#define reserved1_func 0x55 // Reserved for user
+#define reserved2_func 0x56 // Reserved for user
+#define reserved3_func 0x57 // Reserved for user
+#define reserved4_func 0x58 // Reserved for user
+#define reserved5_func 0x59 // Reserved for user
#include <unistd.h>
#include <fcntl.h>
-ssize_t atomicio(ssize_t (*)(), int, void *, size_t);
-void readwrite(int);
-int remote_connect(char *, char *, struct addrinfo);
+ssize_t atomicio(ssize_t (*)(), int, void *, size_t);
+void readwrite(int);
+int remote_connect(char *, char *, struct addrinfo);
-struct termios saved_ios;
-void raw_term();
-void restore_term();
+struct termios saved_ios;
+void raw_term();
+void restore_term();
-char progname[256];
-void usage(int);
+char progname[256];
+void usage(int);
int
main(int argc, char *argv[])
projects / gem5.git / commitdiff