(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 82a15b22618d2124511da901579a5e41300457c0..b9ee7598f94295d45cc6d4870e9e32b330a50760 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -485,7 +485,9 @@ are at an astonishing four levels of cache (L1 to L4).
 
 It should therefore come as no surprise that attempts are being made
 to move (distribute) processing closer to the DRAM Memory, firmly
-on the *opposite* side of the main CPU's L1/2/3/4 Caches.  However
+on the *opposite* side of the main CPU's L1/2/3/4 Caches,
+where a simple `LOAD-COMPUTE-STORE-LOOP` workload easily illustrates
+why this approach is compelling.  However
 the alarm bells ring here at the keyword "distributed", because by
 moving the processing down next to the Memory, even onto
 the same die as the DRAM, the speed of any