mibuild/lattice/diamond: add verilog include path (thanks Lattice's FAE since it...

diff --git a/mibuild/lattice/diamond.py b/mibuild/lattice/diamond.py
index dbbc99ae18d6040eb977ec4e988c36a549ff1b47..3a12456cfbe76b8e779e5999787646f4f9140fb4 100644 (file)
--- a/mibuild/lattice/diamond.py
+++ b/mibuild/lattice/diamond.py
@@ -40,6 +40,8 @@ def _build_lpf(named_sc, named_pc):
 def _build_files(device, sources, vincpaths, build_name):
        tcl = []
        tcl.append("prj_project new -name \"%s\" -impl \"implementation\" -dev %s -synthesis \"synplify\"" %(build_name, device))
+       for path in vincpaths:
+               tcl.append("prj_impl option {include path} {\"" + path.replace("\\", "/") + "\"}")
        for filename, language in sources:
                tcl.append("prj_src add \"" + filename.replace("\\", "/") + "\"")
        tcl.append("prj_run Synthesis -impl implementation -forceOne")