i386: Use register_operand in AVX512 FMA with memory broadcast
authorH.J. Lu <hongjiu.lu@intel.com>
Fri, 19 Oct 2018 08:56:37 +0000 (08:56 +0000)
committerH.J. Lu <hjl@gcc.gnu.org>
Fri, 19 Oct 2018 08:56:37 +0000 (01:56 -0700)
Use "register_operand" in AVX512 FMA with memory broadcast when only
registers are allowed.

* config/i386/sse.md
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
Replace nonimmediate_operand with register_operand.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
Likewise.
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
Likewise.

From-SVN: r265310

gcc/ChangeLog
gcc/config/i386/sse.md

index 1b91d7d42a0193fea238aa28577f9e830f17c64f..ee08f80154c73b90810ac67ff4d13b16976ea9cf 100644 (file)
@@ -1,3 +1,13 @@
+2018-10-19  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/i386/sse.md
+       (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1):
+       Replace nonimmediate_operand with register_operand.
+       (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2):
+       Likewise.
+       (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3):
+       Likewise.
+
 2018-10-19  Ilya Leoshkevich  <iii@linux.ibm.com>
 
        PR rtl-optimization/87596
index 71684d63423d74d0bcda5ae9c70b48bbd1be8700..06144dc466223ce76dc818320453921d45a91793 100644 (file)
 (define_insn "*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1"
   [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v")
        (fma:VF_AVX512
-         (match_operand:VF_AVX512 1 "nonimmediate_operand" "0,v")
-         (match_operand:VF_AVX512 2 "nonimmediate_operand" "v,0")
+         (match_operand:VF_AVX512 1 "register_operand" "0,v")
+         (match_operand:VF_AVX512 2 "register_operand" "v,0")
          (vec_duplicate:VF_AVX512
            (match_operand:<ssescalarmode> 3 "memory_operand" "m,m"))))]
   "TARGET_AVX512F && <sd_mask_mode512bit_condition>"
        (fma:VF_AVX512
          (vec_duplicate:VF_AVX512
            (match_operand:<ssescalarmode> 1 "memory_operand" "m,m"))
-         (match_operand:VF_AVX512 2 "nonimmediate_operand" "0,v")
-         (match_operand:VF_AVX512 3 "nonimmediate_operand" "v,0")))]
+         (match_operand:VF_AVX512 2 "register_operand" "0,v")
+         (match_operand:VF_AVX512 3 "register_operand" "v,0")))]
   "TARGET_AVX512F && <sd_mask_mode512bit_condition>"
   "@
    vfmadd132<ssemodesuffix>\t{%1<avx512bcst>, %3, %0<sd_mask_op4>|%0<sd_mask_op4>, %3, %1<avx512bcst>}
 (define_insn "*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3"
   [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v")
        (fma:VF_AVX512
-         (match_operand:VF_AVX512 1 "nonimmediate_operand" "0,v")
+         (match_operand:VF_AVX512 1 "register_operand" "0,v")
          (vec_duplicate:VF_AVX512
            (match_operand:<ssescalarmode> 2 "memory_operand" "m,m"))
-         (match_operand:VF_AVX512 3 "nonimmediate_operand" "v,0")))]
+         (match_operand:VF_AVX512 3 "register_operand" "v,0")))]
   "TARGET_AVX512F && <sd_mask_mode512bit_condition>"
   "@
    vfmadd132<ssemodesuffix>\t{%2<avx512bcst>, %3, %0<sd_mask_op4>|%0<sd_mask_op4>, %3, %2<avx512bcst>}