run_to = args[argidx].substr(pos+1);
continue;
}
- if (args[argidx] == "-flatten") {
- flatten = true;
+ if (args[argidx] == "-noflatten") {
+ flatten = false;
continue;
}
if (args[argidx] == "-retime") {
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
- if (check_label("flatten", "(unless -noflatten)") && flatten)
+ if (flatten && check_label("flatten", "(unless -noflatten)"))
{
run("proc");
run("flatten");
log(" -nobram\n");
log(" do not use BRAM cells in output netlist\n");
log("\n");
+ log(" -noflatten\n");
+ log(" do not flatten design before synthesis\n");
+ log("\n");
log(" -retime\n");
log(" run 'abc' with -dff option\n");
log("\n");
}
string top_opt, vout_file;
- bool retime, nobram;
+ bool retime, flatten, nobram;
void clear_flags() YS_OVERRIDE
{
top_opt = "-auto-top";
vout_file = "";
retime = false;
- nobram = true;
+ flatten = true;
+ nobram = true;
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
nobram = true;
continue;
}
+ if (args[argidx] == "-noflatten") {
+ flatten = false;
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
- if (check_label("flatten") && check_label("flatten", "(unless -noflatten)"))
+ if (flatten && check_label("flatten", "(unless -noflatten)"))
{
run("proc");
run("flatten");