(no commit message)

diff --git a/openpower/sv/int_fp_mv/appendix.mdwn b/openpower/sv/int_fp_mv/appendix.mdwn
index 15f6f8c7d4fb974e66c200e09e46eb20c98f565a..8d091a8acc06dc5164b2432b1bad2105180e64e8 100644 (file)
--- a/openpower/sv/int_fp_mv/appendix.mdwn
+++ b/openpower/sv/int_fp_mv/appendix.mdwn
@@ -66,7 +66,10 @@ As always with SVP64, some thought and care has to be put into
 how the override behaviour will interact with the base scalar
 operation.
 
-# Equivalent OpenPower ISA v3.0 Assembly Language for FP -> Integer Conversion Modes
+# Power ISA v3.0 Assembly Equivalents<a name="assembler"></a>
+
+Demonstration of how much assembler is needed if these Language-specific
+FP -> Integer Conversion Modes are not available
 
 ## c (IEEE754 standard compliant)
 
@@ -252,7 +255,7 @@ inline Target bitwise_cast(Src v) {
         Target t;
     } u;
     u.s = v;
-…    if (exp < 32) {
+    if (exp < 32) {
         int32_t missingOne = 1 << exp;
         result &= missingOne - 1;
         result += missingOne;