/* Current frame information calculated by m68k_compute_frame_layout(). */
static struct m68k_frame current_frame;
-/* This flag is used to communicate between movhi and ASM_OUTPUT_CASE_END,
- if SGS_SWITCH_TABLE. */
-int switch_table_difference_label_flag;
-
static rtx find_addr_reg (rtx);
static const char *singlemove_string (rtx *);
static void m68k_output_function_prologue (FILE *, HOST_WIDE_INT);
{
case SImode:
output_asm_insn (MOTOROLA ?
- "clr%.w %0\n\tsubq%.l %#1,%0\n\tjbpl %l1" :
- "clr%.w %0\n\tsubq%.l %#1,%0\n\tjpl %l1",
+ "clr%.w %0\n\tsubq%.l #1,%0\n\tjbpl %l1" :
+ "clr%.w %0\n\tsubq%.l #1,%0\n\tjpl %l1",
operands);
break;
loperands[4] = gen_label_rtx();
if (operand2 != const0_rtx)
{
- if (MOTOROLA)
-#ifdef SGS_CMP_ORDER
- output_asm_insn ("cmp%.l %0,%2\n\tjbne %l4\n\tcmp%.l %1,%3", loperands);
-#else
- output_asm_insn ("cmp%.l %2,%0\n\tjbne %l4\n\tcmp%.l %3,%1", loperands);
-#endif
- else
-#ifdef SGS_CMP_ORDER
- output_asm_insn ("cmp%.l %0,%2\n\tjne %l4\n\tcmp%.l %1,%3", loperands);
-#else
- output_asm_insn ("cmp%.l %2,%0\n\tjne %l4\n\tcmp%.l %3,%1", loperands);
-#endif
+ output_asm_insn (MOTOROLA ?
+ "cmp%.l %2,%0\n\tjbne %l4\n\tcmp%.l %3,%1" :
+ "cmp%.l %2,%0\n\tjne %l4\n\tcmp%.l %3,%1",
+ loperands);
}
else
{
output_asm_insn ("tst%.l %0", loperands);
else
{
-#ifdef SGS_CMP_ORDER
- output_asm_insn ("cmp%.w %0,%#0", loperands);
-#else
- output_asm_insn ("cmp%.w %#0,%0", loperands);
-#endif
+ output_asm_insn ("cmp%.w #0,%0", loperands);
}
output_asm_insn (MOTOROLA ? "jbne %l4" : "jne %l4", loperands);
if (TARGET_68020 || TARGET_COLDFIRE || ! ADDRESS_REG_P (loperands[1]))
output_asm_insn ("tst%.l %1", loperands);
else
- {
-#ifdef SGS_CMP_ORDER
- output_asm_insn ("cmp%.w %1,%#0", loperands);
-#else
- output_asm_insn ("cmp%.w %#0,%1", loperands);
-#endif
- }
+ output_asm_insn ("cmp%.w #0,%1", loperands);
}
loperands[5] = dest;
-
+
switch (op_code)
{
case EQ:
return "moveq %1,%0\n\tnot%.w %0";
case NEGW :
CC_STATUS_INIT;
- return "moveq %#-128,%0\n\tneg%.w %0";
+ return "moveq #-128,%0\n\tneg%.w %0";
case SWAP :
{
unsigned u = i;
&& GET_CODE (XEXP (XEXP (operands[1], 0), 0)) != PLUS)
{
rtx labelref = XEXP (XEXP (operands[1], 0), 1);
-#if MOTOROLA && !defined (SGS_SWITCH_TABLES)
-#ifdef SGS
- asm_fprintf (asm_out_file, "\tset %LLI%d,.+2\n",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#else /* not SGS */
- asm_fprintf (asm_out_file, "\t.set %LLI%d,.+2\n",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#endif /* not SGS */
-#else /* SGS_SWITCH_TABLES or not MOTOROLA */
- (*targetm.asm_out.internal_label) (asm_out_file, "LI",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#ifdef SGS_SWITCH_TABLES
- /* Set flag saying we need to define the symbol
- LD%n (with value L%n-LI%n) at the end of the switch table. */
- switch_table_difference_label_flag = 1;
-#endif /* SGS_SWITCH_TABLES */
-#endif /* SGS_SWITCH_TABLES or not MOTOROLA */
+ if (MOTOROLA)
+ asm_fprintf (asm_out_file, "\t.set %LLI%d,.+2\n",
+ CODE_LABEL_NUMBER (XEXP (labelref, 0)));
+ else
+ (*targetm.asm_out.internal_label) (asm_out_file, "LI",
+ CODE_LABEL_NUMBER (XEXP (labelref, 0)));
}
return "move%.w %1,%0";
}
if (!reg_mentioned_p (stack_pointer_rtx, operands[1]))
{
xoperands[3] = stack_pointer_rtx;
- output_asm_insn ("subq%.l %#2,%3\n\tmove%.b %1,%2", xoperands);
+ output_asm_insn ("subq%.l #2,%3\n\tmove%.b %1,%2", xoperands);
}
else
output_asm_insn ("move%.b %1,%-\n\tmove%.b %@,%2", xoperands);
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
if (size == 12)
- output_asm_insn ("sub%.l %#12,%0", operands);
+ output_asm_insn ("sub%.l #12,%0", operands);
else
- output_asm_insn ("subq%.l %#8,%0", operands);
+ output_asm_insn ("subq%.l #8,%0", operands);
if (GET_MODE (operands[1]) == XFmode)
operands[0] = gen_rtx_MEM (XFmode, operands[0]);
else if (GET_MODE (operands[0]) == DFmode)
{
operands[1] = XEXP (XEXP (operands[1], 0), 0);
if (size == 12)
- output_asm_insn ("sub%.l %#12,%1", operands);
+ output_asm_insn ("sub%.l #12,%1", operands);
else
- output_asm_insn ("subq%.l %#8,%1", operands);
+ output_asm_insn ("subq%.l #8,%1", operands);
if (GET_MODE (operands[1]) == XFmode)
operands[1] = gen_rtx_MEM (XFmode, operands[1]);
else if (GET_MODE (operands[1]) == DFmode)
if (addreg0)
{
if (size == 12)
- output_asm_insn ("addq%.l %#8,%0", &addreg0);
+ output_asm_insn ("addq%.l #8,%0", &addreg0);
else
- output_asm_insn ("addq%.l %#4,%0", &addreg0);
+ output_asm_insn ("addq%.l #4,%0", &addreg0);
}
if (addreg1)
{
if (size == 12)
- output_asm_insn ("addq%.l %#8,%0", &addreg1);
+ output_asm_insn ("addq%.l #8,%0", &addreg1);
else
- output_asm_insn ("addq%.l %#4,%0", &addreg1);
+ output_asm_insn ("addq%.l #4,%0", &addreg1);
}
/* Do that word. */
/* Undo the adds we just did. */
if (addreg0)
- output_asm_insn ("subq%.l %#4,%0", &addreg0);
+ output_asm_insn ("subq%.l #4,%0", &addreg0);
if (addreg1)
- output_asm_insn ("subq%.l %#4,%0", &addreg1);
+ output_asm_insn ("subq%.l #4,%0", &addreg1);
if (size == 12)
{
output_asm_insn (singlemove_string (middlehalf), middlehalf);
if (addreg0)
- output_asm_insn ("subq%.l %#4,%0", &addreg0);
+ output_asm_insn ("subq%.l #4,%0", &addreg0);
if (addreg1)
- output_asm_insn ("subq%.l %#4,%0", &addreg1);
+ output_asm_insn ("subq%.l #4,%0", &addreg1);
}
/* Do low-numbered word. */
if (size == 12)
{
if (addreg0)
- output_asm_insn ("addq%.l %#4,%0", &addreg0);
+ output_asm_insn ("addq%.l #4,%0", &addreg0);
if (addreg1)
- output_asm_insn ("addq%.l %#4,%0", &addreg1);
+ output_asm_insn ("addq%.l #4,%0", &addreg1);
output_asm_insn (singlemove_string (middlehalf), middlehalf);
}
/* Make any unoffsettable addresses point at high-numbered word. */
if (addreg0)
- output_asm_insn ("addq%.l %#4,%0", &addreg0);
+ output_asm_insn ("addq%.l #4,%0", &addreg0);
if (addreg1)
- output_asm_insn ("addq%.l %#4,%0", &addreg1);
+ output_asm_insn ("addq%.l #4,%0", &addreg1);
/* Do that word. */
output_asm_insn (singlemove_string (latehalf), latehalf);
if (addreg0)
{
if (size == 12)
- output_asm_insn ("subq%.l %#8,%0", &addreg0);
+ output_asm_insn ("subq%.l #8,%0", &addreg0);
else
- output_asm_insn ("subq%.l %#4,%0", &addreg0);
+ output_asm_insn ("subq%.l #4,%0", &addreg0);
}
if (addreg1)
{
if (size == 12)
- output_asm_insn ("subq%.l %#8,%0", &addreg1);
+ output_asm_insn ("subq%.l #8,%0", &addreg1);
else
- output_asm_insn ("subq%.l %#4,%0", &addreg1);
+ output_asm_insn ("subq%.l #4,%0", &addreg1);
}
return "";
if (GET_CODE (operands[2]) == CONST_INT
&& (INTVAL (operands[2]) < -32768 || INTVAL (operands[2]) > 32767))
return "move%.l %2,%0\n\tadd%.l %1,%0";
-#ifdef SGS
if (GET_CODE (operands[2]) == REG)
- return "lea 0(%1,%2.l),%0";
- else
- return "lea %c2(%1),%0";
-#else /* !SGS */
- if (MOTOROLA)
- {
- if (GET_CODE (operands[2]) == REG)
- return "lea (%1,%2.l),%0";
- else
- return "lea (%c2,%1),%0";
- }
- else /* !MOTOROLA (MIT syntax) */
- {
- if (GET_CODE (operands[2]) == REG)
- return "lea %1@(0,%2:l),%0";
- else
- return "lea %1@(%c2),%0";
- }
-#endif /* !SGS */
+ return MOTOROLA ? "lea (%1,%2.l),%0" : "lea %1@(0,%2:l),%0";
+ return MOTOROLA ? "lea (%c2,%1),%0" : "lea %1@(%c2),%0";
}
if (GET_CODE (operands[2]) == CONST_INT)
{
&& INTVAL (operands[2]) <= 16)
{
operands[2] = GEN_INT (INTVAL (operands[2]) - 8);
- return "addq%.l %#8,%0\n\taddq%.l %2,%0";
+ return "addq%.l #8,%0\n\taddq%.l %2,%0";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
- return "subq%.l %#8,%0\n\tsubq%.l %2,%0";
+ return "subq%.l #8,%0\n\tsubq%.l %2,%0";
}
}
if (ADDRESS_REG_P (operands[0])
{
static char buf[40];
- sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff);
+ sprintf (buf, "fmovecr #0x%x,%%0", code & 0xff);
return buf;
}
return "fmove%.d %1,%0";
{
static char buf[40];
- sprintf (buf, "fmovecr %%#0x%x,%%0", code & 0xff);
+ sprintf (buf, "fmovecr #0x%x,%%0", code & 0xff);
return buf;
}
return "fmove%.s %f1,%0";
offset is output in word mode (eg movel a5@(_foo:w), a0). When generating
-fPIC code the offset is output in long mode (eg movel a5@(_foo:l), a0) */
-#ifndef ASM_OUTPUT_CASE_FETCH
-# if MOTOROLA
-# ifdef SGS
-# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
- asm_fprintf (file, "%LLD%d(%Rpc,%s.", labelno, regname)
-# else /* !SGS */
-# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
- asm_fprintf (file, "%LL%d-%LLI%d.b(%Rpc,%s.", labelno, labelno, regname)
-# endif /* !SGS */
-# else /* !MOTOROLA */
+#if MOTOROLA
# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
+ asm_fprintf (file, "%LL%d-%LLI%d.b(%Rpc,%s.", labelno, labelno, regname)
+#else /* !MOTOROLA */
+# define ASM_OUTPUT_CASE_FETCH(file, labelno, regname)\
asm_fprintf (file, "%Rpc@(%LL%d-%LLI%d-2:b,%s:", labelno, labelno, regname)
-# endif /* !MOTOROLA */
-#endif /* ASM_OUTPUT_CASE_FETCH */
+#endif /* !MOTOROLA */
void
print_operand_address (FILE *file, rtx addr)
&& INTVAL (addr) < 0x8000
&& INTVAL (addr) >= -0x8000)
{
- if (MOTOROLA)
-#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
- fprintf (file, "%d", (int) INTVAL (addr));
-#else
- fprintf (file, "%d.w", (int) INTVAL (addr));
-#endif
- else /* !MOTOROLA */
- fprintf (file, "%d:w", (int) INTVAL (addr));
+ fprintf (file, MOTOROLA ? "%d.w" : "%d:w", (int) INTVAL (addr));
}
else if (GET_CODE (addr) == CONST_INT)
{
;;- Assembler specs:
;;- "%." size separator ("." or "") move%.l d0,d1
-;;- "%#" immediate separator ("#" or "") move%.l %#0,d0
;;- "%-" push operand "sp@-" move%.l d0,%-
;;- "%+" pop operand "sp@+" move%.l d0,%+
;;- "%@" top of stack "sp@" move%.l d0,%@
/* If you think that the 68020 does not support tstl a0,
reread page B-167 of the 68020 manual more carefully. */
/* On an address reg, cmpw may replace cmpl. */
-#ifdef SGS_CMP_ORDER
- return "cmp%.w %0,%#0";
-#else
- return "cmp%.w %#0,%0";
-#endif
+ return "cmp%.w #0,%0";
})
;; This can't use an address register, because comparisons
"!TARGET_COLDFIRE"
{
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
-#ifdef SGS_CMP_ORDER
- return "cmpm%.l %0,%1";
-#else
return "cmpm%.l %1,%0";
-#endif
if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
- { cc_status.flags |= CC_REVERSED;
-#ifdef SGS_CMP_ORDER
- return "cmp%.l %d1,%d0";
-#else
+ {
+ cc_status.flags |= CC_REVERSED;
return "cmp%.l %d0,%d1";
-#endif
}
if (ADDRESS_REG_P (operands[0])
&& GET_CODE (operands[1]) == CONST_INT
&& INTVAL (operands[1]) < 0x8000
&& INTVAL (operands[1]) >= -0x8000)
- {
-#ifdef SGS_CMP_ORDER
- return "cmp%.w %0,%1";
-#else
- return "cmp%.w %1,%0";
-#endif
- }
-#ifdef SGS_CMP_ORDER
- return "cmp%.l %d0,%d1";
-#else
+ return "cmp%.w %1,%0";
return "cmp%.l %d1,%d0";
-#endif
})
(define_insn ""
{
if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
- { cc_status.flags |= CC_REVERSED;
-#ifdef SGS_CMP_ORDER
- return "cmp%.l %d1,%d0";
-#else
+ {
+ cc_status.flags |= CC_REVERSED;
return "cmp%.l %d0,%d1";
-#endif
}
-#ifdef SGS_CMP_ORDER
- return "cmp%.l %d0,%d1";
-#else
return "cmp%.l %d1,%d0";
-#endif
})
(define_expand "cmphi"
"!TARGET_COLDFIRE"
{
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
-#ifdef SGS_CMP_ORDER
- return "cmpm%.w %0,%1";
-#else
return "cmpm%.w %1,%0";
-#endif
if ((REG_P (operands[1]) && !ADDRESS_REG_P (operands[1]))
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
- { cc_status.flags |= CC_REVERSED;
-#ifdef SGS_CMP_ORDER
- return "cmp%.w %d1,%d0";
-#else
+ {
+ cc_status.flags |= CC_REVERSED;
return "cmp%.w %d0,%d1";
-#endif
}
-#ifdef SGS_CMP_ORDER
- return "cmp%.w %d0,%d1";
-#else
return "cmp%.w %d1,%d0";
-#endif
})
(define_expand "cmpqi"
"!TARGET_COLDFIRE"
{
if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
-#ifdef SGS_CMP_ORDER
- return "cmpm%.b %0,%1";
-#else
return "cmpm%.b %1,%0";
-#endif
if (REG_P (operands[1])
|| (!REG_P (operands[0]) && GET_CODE (operands[0]) != MEM))
- { cc_status.flags |= CC_REVERSED;
-#ifdef SGS_CMP_ORDER
- return "cmp%.b %d1,%d0";
-#else
+ {
+ cc_status.flags |= CC_REVERSED;
return "cmp%.b %d0,%d1";
-#endif
}
-#ifdef SGS_CMP_ORDER
- return "cmp%.b %d0,%d1";
-#else
return "cmp%.b %d1,%d0";
-#endif
})
(define_expand "cmpdf"
"TARGET_68881"
{
cc_status.flags = CC_IN_68881;
-#ifdef SGS_CMP_ORDER
- if (REG_P (operands[0]))
- {
- if (REG_P (operands[1]))
- return "fcmp%.x %0,%1";
- else
- return "fcmp%.d %0,%f1";
- }
- cc_status.flags |= CC_REVERSED;
- return "fcmp%.d %1,%f0";
-#else
if (REG_P (operands[0]))
{
if (REG_P (operands[1]))
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.d %f0,%1";
-#endif
})
(define_expand "cmpsf"
"TARGET_68881"
{
cc_status.flags = CC_IN_68881;
-#ifdef SGS_CMP_ORDER
- if (FP_REG_P (operands[0]))
- {
- if (FP_REG_P (operands[1]))
- return "fcmp%.x %0,%1";
- else
- return "fcmp%.s %0,%f1";
- }
- cc_status.flags |= CC_REVERSED;
- return "fcmp%.s %1,%f0";
-#else
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.s %f0,%1";
-#endif
})
\f
;; Recognizers for btst instructions.
if (!TARGET_68040 && !TARGET_68060)
return "sub%.l %0,%0";
else
- return MOTOROLA ?
-#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
- "lea 0,%0" :
-#else
- "lea 0.w,%0" :
-#endif
- "lea 0:w,%0";
+ return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
}
/* moveq is faster on the 68000. */
if (DATA_REG_P (operands[0]) && (!TARGET_68020 && !TARGET_COLDFIRE))
- return "moveq %#0,%0";
+ return "moveq #0,%0";
return "clr%.l %0";
})
if (!TARGET_68040 && !TARGET_68060)
return "sub%.l %0,%0";
else
- return MOTOROLA ?
-#ifdef SGS
- /* Many SGS assemblers croak on size specifiers for constants. */
- "lea 0,%0" :
-#else
- "lea 0.w,%0" :
-#endif
- "lea 0:w,%0";
+ return MOTOROLA ? "lea 0.w,%0" : "lea 0:w,%0";
}
/* moveq is faster on the 68000. */
if (DATA_REG_P (operands[0]) && !(TARGET_68020 || TARGET_COLDFIRE))
{
- return "moveq %#0,%0";
+ return "moveq #0,%0";
}
return "clr%.l %0";
}
{
CC_STATUS_INIT;
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
- return "moveq %#0,%0\;moveq %#0,%2\;move%.b %1,%2";
+ return "moveq #0,%0\;moveq #0,%2\;move%.b %1,%2";
})
(define_insn "zero_extendhidi2"
{
CC_STATUS_INIT;
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
- return "moveq %#0,%0\;moveq %#0,%2\;move%.w %1,%2";
+ return "moveq #0,%0\;moveq #0,%2\;move%.w %1,%2";
})
;; this is the canonical form for (lshiftrt:DI x 32)
{
if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1]))
- return "and%.l %#0xFFFF,%0";
+ return "and%.l #0xFFFF,%0";
if (reg_mentioned_p (operands[0], operands[1]))
- return "move%.w %1,%0\;and%.l %#0xFFFF,%0";
+ return "move%.w %1,%0\;and%.l #0xFFFF,%0";
return "clr%.l %0\;move%.w %1,%0";
}
else if (GET_CODE (operands[0]) == MEM
{
if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1]))
- return (!TARGET_COLDFIRE ? "and%.w %#0xFF,%0" : "and%.l %#0xFF,%0");
+ return (!TARGET_COLDFIRE ? "and%.w #0xFF,%0" : "and%.l #0xFF,%0");
if (reg_mentioned_p (operands[0], operands[1]))
- return (!TARGET_COLDFIRE ? "move%.b %1,%0\;and%.w %#0xFF,%0"
- : "move%.b %1,%0\;and%.l %#0xFF,%0");
+ return (!TARGET_COLDFIRE ? "move%.b %1,%0\;and%.w #0xFF,%0"
+ : "move%.b %1,%0\;and%.l #0xFF,%0");
return "clr%.w %0\;move%.b %1,%0";
}
else if (GET_CODE (operands[0]) == MEM
{
if (GET_CODE (operands[1]) == REG
&& REGNO (operands[0]) == REGNO (operands[1]))
- return "and%.l %#0xFF,%0";
+ return "and%.l #0xFF,%0";
if (reg_mentioned_p (operands[0], operands[1]))
- return "move%.b %1,%0\;and%.l %#0xFF,%0";
+ return "move%.b %1,%0\;and%.l #0xFF,%0";
return "clr%.l %0\;move%.b %1,%0";
}
else if (GET_CODE (operands[0]) == MEM
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
return MOTOROLA ?
-#ifdef SGS
- "clr%.l -(%0)\;move%.b %1,3(%0)" :
-#else
"clr%.l -(%0)\;move%.b %1,(3,%0)" :
-#endif
"clrl %0@-\;moveb %1,%0@(3)";
}
else if (GET_CODE (operands[0]) == MEM
{
operands[0] = XEXP (XEXP (operands[0], 0), 0);
return MOTOROLA ?
-#ifdef SGS
- "clr%.l (%0)+\;move%.b %1,-1(%0)" :
-#else
"clr%.l (%0)+\;move%.b %1,(-1,%0)" :
-#endif
"clrl %0@+\;moveb %1,%0@(-1)";
}
else
"TARGET_68881 && TARGET_68040"
{
CC_STATUS_INIT;
- return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!";
+ return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!";
})
(define_insn "fix_truncdfhi2"
"TARGET_68881 && TARGET_68040"
{
CC_STATUS_INIT;
- return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!";
+ return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!";
})
(define_insn "fix_truncdfqi2"
"TARGET_68881 && TARGET_68040"
{
CC_STATUS_INIT;
- return "fmovem%.l %!,%2\;moveq %#16,%3\;or%.l %2,%3\;and%.w %#-33,%3\;fmovem%.l %3,%!\;fmove%.b %1,%0\;fmovem%.l %2,%!";
+ return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.b %1,%0\;fmovem%.l %2,%!";
})
;; Convert a float to a float whose value is an integer.
}
output_asm_insn ("move%.l %1,%0", operands);
output_asm_insn (MOTOROLA ? "jbpl %l3" : "jpl %l3", operands);
- output_asm_insn ("addq%.l %#1,%2", operands);
+ output_asm_insn ("addq%.l #1,%2", operands);
(*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[3]));
return "";
&& INTVAL (operands[2]) <= 16)
{
operands[2] = GEN_INT (INTVAL (operands[2]) - 8);
- return "addq%.w %#8,%0\;addq%.w %2,%0";
+ return "addq%.w #8,%0\;addq%.w %2,%0";
}
if (INTVAL (operands[2]) < -8
&& INTVAL (operands[2]) >= -16)
{
operands[2] = GEN_INT (- INTVAL (operands[2]) - 8);
- return "subq%.w %#8,%0\;subq%.w %2,%0";
+ return "subq%.w #8,%0\;subq%.w %2,%0";
}
}
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
&& INTVAL (operands[1]) <= 16)
{
operands[1] = GEN_INT (INTVAL (operands[1]) - 8);
- return "addq%.w %#8,%0\;addq%.w %1,%0";
+ return "addq%.w #8,%0\;addq%.w %1,%0";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
- return "subq%.w %#8,%0\;subq%.w %1,%0";
+ return "subq%.w #8,%0\;subq%.w %1,%0";
}
}
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
&& INTVAL (operands[1]) <= 16)
{
operands[1] = GEN_INT (INTVAL (operands[1]) - 8);
- return "addq%.w %#8,%0\;addq%.w %1,%0";
+ return "addq%.w #8,%0\;addq%.w %1,%0";
}
if (INTVAL (operands[1]) < -8
&& INTVAL (operands[1]) >= -16)
{
operands[1] = GEN_INT (- INTVAL (operands[1]) - 8);
- return "subq%.w %#8,%0\;subq%.w %1,%0";
+ return "subq%.w #8,%0\;subq%.w %1,%0";
}
}
if (ADDRESS_REG_P (operands[0]) && !TARGET_68040)
"!TARGET_COLDFIRE || TARGET_CF_HWDIV"
{
output_asm_insn (MOTOROLA ?
- "and%.l %#0xFFFF,%0\;divu%.w %2,%0" :
- "and%.l %#0xFFFF,%0\;divu %2,%0",
+ "and%.l #0xFFFF,%0\;divu%.w %2,%0" :
+ "and%.l #0xFFFF,%0\;divu %2,%0",
operands);
if (!find_reg_note(insn, REG_UNUSED, operands[3]))
{
case -1 :
/* FIXME : a scratch register would be welcome here if operand[0]
is not a register */
- output_asm_insn ("move%.l %#-1,%0", operands);
+ output_asm_insn ("move%.l #-1,%0", operands);
break;
default :
{
case -1 :
/* FIXME : a scratch register would be welcome here if operand[0]
is not a register */
- output_asm_insn ("move%.l %#-1,%0", operands);
+ output_asm_insn ("move%.l #-1,%0", operands);
break;
default :
{
if (INTVAL (operands[2]) == 1)
return "add%.l %1,%1\;addx%.l %0,%0";
else if (INTVAL (operands[2]) == 8)
- return "rol%.l %#8,%1\;rol%.l %#8,%0\;move%.b %1,%0\;clr%.b %1";
+ return "rol%.l #8,%1\;rol%.l #8,%0\;move%.b %1,%0\;clr%.b %1";
else if (INTVAL (operands[2]) == 16)
return "swap %1\;swap %0\;move%.w %1,%0\;clr%.w %1";
else if (INTVAL (operands[2]) == 48)
operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
output_asm_insn (INTVAL (operands[2]) <= 8 ? "asl%.l %2,%1" :
"moveq %2,%0\;asl%.l %0,%1", operands);
- return "mov%.l %1,%0\;moveq %#0,%1";
+ return "mov%.l %1,%0\;moveq #0,%1";
}
})
return "add%.l %0,%0\;subx%.l %0,%0\;move%.l %0,%1";
CC_STATUS_INIT;
if (INTVAL (operands[2]) == 1)
- return "asr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "asr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 8)
- return "move%.b %0,%1\;asr%.l %#8,%0\;ror%.l %#8,%1";
+ return "move%.b %0,%1\;asr%.l #8,%0\;ror%.l #8,%1";
else if (INTVAL (operands[2]) == 16)
return "move%.w %0,%1\;swap %0\;ext%.l %0\;swap %1";
else if (INTVAL (operands[2]) == 48)
else if (INTVAL (operands[2]) == 31)
return "add%.l %1,%1\;addx%.l %0,%0\;move%.l %0,%1\;subx%.l %0,%0";
else if (INTVAL (operands[2]) == 2)
- return "asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 3)
- return "asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1\;asr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1\;asr%.l #1,%0\;roxr%.l #1,%1";
else /* 32 < INTVAL (operands[2]) <= 63 */
{
operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
return "add%.l %0,%0\;clr%.l %0\;clr%.l %1\;addx%.l %1,%1";
CC_STATUS_INIT;
if (INTVAL (operands[2]) == 1)
- return "lsr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "lsr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 8)
- return "move%.b %0,%1\;lsr%.l %#8,%0\;ror%.l %#8,%1";
+ return "move%.b %0,%1\;lsr%.l #8,%0\;ror%.l #8,%1";
else if (INTVAL (operands[2]) == 16)
return "move%.w %0,%1\;clr%.w %0\;swap %1\;swap %0";
else if (INTVAL (operands[2]) == 48)
return "move%.l %0,%1\;clr%.w %1\;clr%.l %0\;swap %1";
else if (INTVAL (operands[2]) == 2)
- return "lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1";
else if (INTVAL (operands[2]) == 3)
- return "lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1\;lsr%.l %#1,%0\;roxr%.l %#1,%1";
+ return "lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1\;lsr%.l #1,%0\;roxr%.l #1,%1";
else /* 32 < INTVAL (operands[2]) <= 63 */
{
operands[2] = GEN_INT (INTVAL (operands[2]) - 32);
output_asm_insn (INTVAL (operands[2]) <= 8 ? "lsr%.l %2,%0" :
"moveq %2,%1\;lsr%.l %1,%0", operands);
- return "mov%.l %0,%1\;moveq %#0,%0";
+ return "mov%.l %0,%1\;moveq #0,%0";
}
})
else
{
if (MOTOROLA)
-#ifdef SGS_CMP_ORDER
- output_asm_insn ("cmp%.w %0,%#0\;jbne %l4\;cmp%.w %3,%#0\;jbeq %l1", operands);
-#else
- output_asm_insn ("cmp%.w %#0,%0\;jbne %l4\;cmp%.w %#0,%3\;jbeq %l1", operands);
-#endif
+ output_asm_insn ("cmp%.w #0,%0\;jbne %l4\;cmp%.w #0,%3\;jbeq %l1", operands);
else
- output_asm_insn ("cmp%.w %#0,%0\;jne %l4\;cmp%.w %#0,%3\;jeq %l1", operands);
+ output_asm_insn ("cmp%.w #0,%0\;jne %l4\;cmp%.w #0,%3\;jeq %l1", operands);
}
(*targetm.asm_out.internal_label) (asm_out_file, "L",
CODE_LABEL_NUMBER (operands[4]));
else
{
if (MOTOROLA)
-#ifdef SGS_CMP_ORDER
- return "cmp%.w %0,%#0\;jbne %l1\;cmp%.w %3,%#0\;jbne %l1";
-#else
- return "cmp%.w %#0,%0\;jbne %l1\;cmp%.w %#0,%3\;jbne %l1";
-#endif
+ return "cmp%.w #0,%0\;jbne %l1\;cmp%.w #0,%3\;jbne %l1";
else
- return "cmp%.w %#0,%0\;jne %l1\;cmp%.w %#0,%3\;jne %l1";
+ return "cmp%.w #0,%0\;jne %l1\;cmp%.w #0,%3\;jne %l1";
}
})
else
{
/* On an address reg, cmpw may replace cmpl. */
-#ifdef SGS_CMP_ORDER
- output_asm_insn("cmp%.w %0,%#0", operands);
-#else
- output_asm_insn("cmp%.w %#0,%0", operands);
-#endif
+ output_asm_insn("cmp%.w #0,%0", operands);
}
-
return MOTOROLA ? "jbpl %l1" : "jpl %l1";
})
else
{
/* On an address reg, cmpw may replace cmpl. */
-#ifdef SGS_CMP_ORDER
- output_asm_insn("cmp%.w %0,%#0", operands);
-#else
- output_asm_insn("cmp%.w %#0,%0", operands);
-#endif
+ output_asm_insn("cmp%.w #0,%0", operands);
}
return MOTOROLA ? "jbmi %l1" : "jmi %l1";
#ifdef ASM_RETURN_CASE_JUMP
ASM_RETURN_CASE_JUMP;
#else
-#ifdef SGS
-#ifdef ASM_OUTPUT_CASE_LABEL
- if (TARGET_COLDFIRE)
- {
- if (ADDRESS_REG_P (operands[0]))
- return "jmp 6(%%pc,%0.l)";
- else
- return "ext%.l %0\;jmp 6(%%pc,%0.l)";
- }
- else
- return "jmp 6(%%pc,%0.w)";
-#else
- if (TARGET_COLDFIRE)
- {
- if (ADDRESS_REG_P (operands[0]))
- return "jmp 2(%%pc,%0.l)";
- else
- return "extl %0\;jmp 2(%%pc,%0.l)";
- }
- else
- return "jmp 2(%%pc,%0.w)";
-#endif
-#else /* not SGS */
if (TARGET_COLDFIRE)
{
if (ADDRESS_REG_P (operands[0]))
- {
- return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
- }
+ return MOTOROLA ? "jmp (2,pc,%0.l)" : "jmp pc@(2,%0:l)";
else if (MOTOROLA)
return "ext%.l %0\;jmp (2,pc,%0.l)";
else
return "extl %0\;jmp pc@(2,%0:l)";
}
else
- {
- return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
- }
-#endif
+ return MOTOROLA ? "jmp (2,pc,%0.w)" : "jmp pc@(2,%0:w)";
#endif
})
if (DATA_REG_P (operands[0]))
return "dbra %0,%l1";
if (GET_CODE (operands[0]) == MEM)
- {
- if (MOTOROLA)
- return "subq%.w %#1,%0\;jbcc %l1";
- else
- return "subqw %#1,%0\;jcc %l1";
- }
- if (MOTOROLA)
-#ifdef SGS_CMP_ORDER
- return "subq%.w %#1,%0\;cmp%.w %0,%#-1\;jbne %l1";
-#else /* not SGS_CMP_ORDER */
- return "subq%.w %#1,%0\;cmp%.w %#-1,%0\;jbne %l1";
-#endif
- else
- return "subqw %#1,%0\;cmpw %#-1,%0\;jne %l1";
+ return MOTOROLA ?
+ "subq%.w #1,%0\;jbcc %l1" :
+ "subqw #1,%0\;jcc %l1";
+ return MOTOROLA ?
+ "subq%.w #1,%0\;cmp%.w #-1,%0\;jbne %l1" :
+ "subqw #1,%0\;cmpw #-1,%0\;jne %l1";
})
(define_insn ""
"!TARGET_COLDFIRE"
{
CC_STATUS_INIT;
- if (MOTOROLA)
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1\;clr%.w %0\;subq%.l %#1,%0\;jbcc %l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subq%.l %#1,%0\;jbcc %l1";
-#ifdef SGS_CMP_ORDER
- return "subq.l %#1,%0\;cmp.l %0,%#-1\;jbne %l1";
-#else /* not SGS_CMP_ORDER */
- return "subq.l %#1,%0\;cmp.l %#-1,%0\;jbne %l1";
-#endif /* not SGS_CMP_ORDER */
- }
- else
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1\;clr%.w %0\;subql %#1,%0\;jcc %l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subql %#1,%0\;jcc %l1";
- return "subql %#1,%0\;cmpl %#-1,%0\;jne %l1";
- }
+ if (DATA_REG_P (operands[0]))
+ return MOTOROLA ?
+ "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jbcc %l1" :
+ "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jcc %l1";
+ if (GET_CODE (operands[0]) == MEM)
+ return MOTOROLA ?
+ "subq%.l #1,%0\;jbcc %l1" :
+ "subq%.l #1,%0\;jcc %l1";
+ return MOTOROLA ?
+ "subq.l #1,%0\;cmp.l #-1,%0\;jbne %l1" :
+ "subql #1,%0\;cmpl #-1,%0\;jne %l1";
})
;; Two dbra patterns that use REG_NOTES info generated by strength_reduce.
"!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)"
{
CC_STATUS_INIT;
- if (MOTOROLA)
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subq%.w %#1,%0\;jbcc %l1";
-#ifdef SGS_CMP_ORDER
- return "subq.w %#1,%0\;cmp.w %0,%#-1\;jbne %l1";
-#else /* not SGS_CMP_ORDER */
- return "subq.w %#1,%0\;cmp.w %#-1,%0\;jbne %l1";
-#endif /* not SGS_CMP_ORDER */
- }
- else
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subqw %#1,%0\;jcc %l1";
- return "subqw %#1,%0\;cmpw %#-1,%0\;jne %l1";
- }
+ if (DATA_REG_P (operands[0]))
+ return "dbra %0,%l1";
+ if (GET_CODE (operands[0]) == MEM)
+ return MOTOROLA ?
+ "subq%.w #1,%0\;jbcc %l1" :
+ "subq%.w #1,%0\;jcc %l1";
+ return MOTOROLA ?
+ "subq.w #1,%0\;cmp.w #-1,%0\;jbne %l1" :
+ "subqw #1,%0\;cmpw #-1,%0\;jne %l1";
})
(define_expand "decrement_and_branch_until_zero"
"!TARGET_COLDFIRE && find_reg_note (insn, REG_NONNEG, 0)"
{
CC_STATUS_INIT;
- if (MOTOROLA)
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1\;clr%.w %0\;subq%.l %#1,%0\;jbcc %l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subq%.l %#1,%0\;jbcc %l1";
-#ifdef SGS_CMP_ORDER
- return "subq.l %#1,%0\;cmp.l %0,%#-1\;jbne %l1";
-#else /* not SGS_CMP_ORDER */
- return "subq.l %#1,%0\;cmp.l %#-1,%0\;jbne %l1";
-#endif /* not SGS_CMP_ORDER */
- }
- else
- {
- if (DATA_REG_P (operands[0]))
- return "dbra %0,%l1\;clr%.w %0\;subql %#1,%0\;jcc %l1";
- if (GET_CODE (operands[0]) == MEM)
- return "subql %#1,%0\;jcc %l1";
- return "subql %#1,%0\;cmpl %#-1,%0\;jne %l1";
- }
+ if (DATA_REG_P (operands[0]))
+ return MOTOROLA ?
+ "dbra %0,%l1\;clr%.w %0\;subq%.l #1,%0\;jbcc %l1" :
+ "dbra %0,%l1\;clr%.w %0\;subql #1,%0\;jcc %l1";
+ if (GET_CODE (operands[0]) == MEM)
+ return MOTOROLA ?
+ "subq%.l #1,%0\;jbcc %l1" :
+ "subql #1,%0\;jcc %l1";
+ return MOTOROLA ?
+ "subq.l #1,%0\;cmp.l #-1,%0\;jbne %l1" :
+ "subql #1,%0\;cmpl #-1,%0\;jne %l1";
})
&& GET_CODE (XEXP (operands[1], 0)) != PLUS)
{
rtx labelref = XEXP (operands[1], 1);
-#if MOTOROLA && !defined (SGS_SWITCH_TABLES)
-#ifdef SGS
- asm_fprintf (asm_out_file, "\\tset %LLI%d,.+2\\n",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#else /* not SGS */
- asm_fprintf (asm_out_file, "\\t.set %LLI%d,.+2\\n",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#endif /* not SGS */
-#else /* SGS_SWITCH_TABLES or not MOTOROLA */
- (*targetm.asm_out.internal_label) (asm_out_file, "LI",
- CODE_LABEL_NUMBER (XEXP (labelref, 0)));
-#ifdef SGS_SWITCH_TABLES
- /* Set flag saying we need to define the symbol
- LD%n (with value L%n-LI%n) at the end of the switch table. */
- switch_table_difference_label_flag = 1;
-#endif /* SGS_SWITCH_TABLES */
-#endif /* SGS_SWITCH_TABLES or not MOTOROLA */
+ if (MOTOROLA)
+ asm_fprintf (asm_out_file, "\\t.set %LLI%d,.+2\\n",
+ CODE_LABEL_NUMBER (XEXP (labelref, 0)));
+ else
+ (*targetm.asm_out.internal_label) (asm_out_file, "LI",
+ CODE_LABEL_NUMBER (XEXP (labelref, 0)));
}
-
return "lea %a1,%0";
})
\f
else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16)
{
xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8);
- output_asm_insn ("addq%.w %#8,%0\;addq%.w %1,%0", xoperands);
+ output_asm_insn ("addq%.w #8,%0\;addq%.w %1,%0", xoperands);
}
else if (INTVAL (xoperands[1]) <= 0x7FFF)
{
else if (TARGET_CPU32 && INTVAL (xoperands[1]) <= 16)
{
xoperands[1] = GEN_INT (INTVAL (xoperands[1]) - 8);
- output_asm_insn ("addq%.w %#8,%0\;addq%.w %1,%0", xoperands);
+ output_asm_insn ("addq%.w #8,%0\;addq%.w %1,%0", xoperands);
}
else if (INTVAL (xoperands[1]) <= 0x7FFF)
{
= gen_rtx_MEM (QImode, plus_constant (stack_pointer_rtx, 3));
xoperands[3] = stack_pointer_rtx;
if (!TARGET_COLDFIRE)
- output_asm_insn ("subq%.w %#4,%3\;move%.b %1,%2", xoperands);
+ output_asm_insn ("subq%.w #4,%3\;move%.b %1,%2", xoperands);
else
- output_asm_insn ("subq%.l %#4,%3\;move%.b %1,%2", xoperands);
+ output_asm_insn ("subq%.l #4,%3\;move%.b %1,%2", xoperands);
return "";
})
"TARGET_68881"
{
cc_status.flags = CC_IN_68881;
-#ifdef SGS_CMP_ORDER
- if (REG_P (operands[0]))
- {
- if (REG_P (operands[1]))
- return "fcmp%.x %0,%1";
- else
- return "fcmp%.x %0,%f1";
- }
- cc_status.flags |= CC_REVERSED;
- return "fcmp%.x %1,%f0";
-#else
if (REG_P (operands[0]))
{
if (REG_P (operands[1]))
}
cc_status.flags |= CC_REVERSED;
return "fcmp%.x %f0,%1";
-#endif
})
(define_insn "extendsfxf2"
(define_insn "trap"
[(trap_if (const_int -1) (const_int 7))]
""
- "trap %#7")
+ "trap #7")
(define_insn "conditional_trap"
[(trap_if (match_operator 0 "valid_dbcc_comparison_p"