vsx-elemrev-4.c: Change expected code generation to accept D-mode memory accesses.

2017-01-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>

	* gcc.target/powerpc/vsx-elemrev-4.c: Change expected code
	generation to accept D-mode memory accesses.

From-SVN: r244916

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 6a3007331d0e2b1260bb8a600be56791f1836f5f..99bec45d5a758ae8c92eb8be8494e3b9cd67faa2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-01-25  Bill Schmidt  <wschmidt@linux.vnet.ibm.com>
+
+       * gcc.target/powerpc/vsx-elemrev-4.c: Change expected code
+       generation to accept D-mode memory accesses.
+
 2017-01-25  Martin Sebor  <msebor@redhat.com>
 
        PR c++/71290

diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
index a116316c17406df5d6c2491cd7fd67463e89862b..f40946353e48277d89ddf17f74aac3e8b635daed 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c
@@ -3,8 +3,11 @@
 /* { dg-options "-mcpu=power9 -O0" } */
 /* { dg-require-effective-target powerpc_p9vector_ok } */
 /* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */
-/* { dg-final { scan-assembler-times "lxvx" 40 } } */
-/* { dg-final { scan-assembler-times "stxvx" 40 } } */
+
+/* Following will match either lxv or lxvx, either stxv or stxvx.
+   This is purposeful as either is fine.  */
+/* { dg-final { scan-assembler-times "lxv" 40 } } */
+/* { dg-final { scan-assembler-times "stxv" 40 } } */
 
 #include <altivec.h>