Exclude DDRDLLA from tree
authorJean THOMAS <git0@pub.jeanthomas.me>
Fri, 3 Jul 2020 14:37:47 +0000 (16:37 +0200)
committerJean THOMAS <git0@pub.jeanthomas.me>
Fri, 3 Jul 2020 14:37:47 +0000 (16:37 +0200)
gram/simulation/.gitignore

index 7a2e0b35cc03113ae7221d078b3225095444b09d..5bd86a4d554127afeb3d656d3a5555811c91ef9d 100644 (file)
@@ -10,3 +10,6 @@ build_simcrg/
 # Simulation output
 *.vcd
 *.fst
+
+# Patched files
+DDRDLLA.v