FX OX UX XX
VXSNAN VXISI VXIMZ
```
+
+## [DRAFT] Floating Add FFT/DCT [Single]
+
+A-Form
+
+* ffadds FRT,FRA,FRB (Rc=0)
+* ffadds. FRT,FRA,FRB (Rc=1)
+
+Pseudo-code:
+
+```
+ FRT <- FPADD32(FRA, FRB)
+ FRS <- FPSUB32(FRB, FRA)
+```
+
+Special Registers Altered:
+
+```
+ FPRF FR FI
+ FX OX UX XX
+ VXSNAN VXISI
+ CR1 (if Rc=1)
+```
+
+## [DRAFT] Floating Add FFT/DCT [Double]
+
+A-Form
+
+* ffadd FRT,FRA,FRB (Rc=0)
+* ffadd. FRT,FRA,FRB (Rc=1)
+
+Pseudo-code:
+
+```
+ FRT <- FPADD64(FRA, FRB)
+ FRS <- FPSUB64(FRB, FRA)
+```
+
+Special Registers Altered:
+
+```
+ FPRF FR FI
+ FX OX UX XX
+ VXSNAN VXISI
+ CR1 (if Rc=1)
+```
+
+## [DRAFT] Floating Subtract FFT/DCT [Single]
+
+A-Form
+
+* ffsubs FRT,FRA,FRB (Rc=0)
+* ffsubs. FRT,FRA,FRB (Rc=1)
+
+Pseudo-code:
+
+```
+ FRT <- FPSUB32(FRB, FRA)
+ FRS <- FPADD32(FRA, FRB)
+```
+
+Special Registers Altered:
+
+```
+ FPRF FR FI
+ FX OX UX XX
+ VXSNAN VXISI
+ CR1 (if Rc=1)
+```
+
+## [DRAFT] Floating Subtract FFT/DCT [Double]
+
+A-Form
+
+* ffsub FRT,FRA,FRB (Rc=0)
+* ffsub. FRT,FRA,FRB (Rc=1)
+
+Pseudo-code:
+
+```
+ FRT <- FPSUB64(FRB, FRA)
+ FRS <- FPADD64(FRA, FRB)
+```
+
+Special Registers Altered:
+
+```
+ FPRF FR FI
+ FX OX UX XX
+ VXSNAN VXISI
+ CR1 (if Rc=1)
+```