+2018-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23665
+ * testsuite/gas/i386/avx-scalar-intel.d: Updated.
+ * testsuite/gas/i386/avx-scalar.d: Likewise.
+ * testsuite/gas/i386/x86-64-avx-scalar-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-avx-scalar.d: Likewise.
+
2018-09-15 Alan Modra <amodra@gmail.com>
* testsuite/config/default.exp: Make tmpdir.
[ ]*[a-f0-9]+: c5 fd 2e 21 vucomisd xmm4,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 10 21 vmovsd xmm4,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd QWORD PTR \[ecx\],xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[ecx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[ecx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 2c cc vcvttsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ce c2 11 07 vcmpordss xmm2,xmm6,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss xmm2,xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq xmm6,xmm4
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 fd 7e 05 34 12 00 00 vmovd DWORD PTR ds:0x1234,xmm0
[ ]*[a-f0-9]+: c5 ff 10 21 vmovsd xmm4,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd QWORD PTR \[ecx\],xmm4
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd QWORD PTR \[ecx\],xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[ecx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[ecx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[ecx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[ecx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss xmm2,xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[ecx\],0x7
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq xmm6,xmm4
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 fd 7e 05 34 12 00 00 vmovd DWORD PTR ds:0x1234,xmm0
[ ]*[a-f0-9]+: c5 fd 2e 21 vucomisd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 10 21 vmovsd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd %xmm4,\(%ecx\)
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%ecx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%ecx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%ecx\),%ecx
[ ]*[a-f0-9]+: c5 ff 2c cc vcvttsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ce c2 11 07 vcmpordss \(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss \$0x7,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq %xmm4,%xmm6
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 fd 7e 05 34 12 00 00 vmovd %xmm0,0x1234
[ ]*[a-f0-9]+: c5 ff 10 21 vmovsd \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd %xmm4,\(%ecx\)
[ ]*[a-f0-9]+: c5 ff 11 21 vmovsd %xmm4,\(%ecx\)
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%ecx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%ecx\),%xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%ecx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%ecx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%ecx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%ecx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%ecx\),%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%ecx\),%ecx
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss \$0x7,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%ecx\),%xmm6,%xmm2
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq %xmm4,%xmm6
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 fd 7e 05 34 12 00 00 vmovd %xmm0,0x1234
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq xmm4,rcx
[ ]*[a-f0-9]+: c4 e1 fd 7e e1 vmovq rcx,xmm4
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq xmm4,rcx
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[rcx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[rcx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff 2c cc vcvttsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ce c2 11 07 vcmpordss xmm2,xmm6,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss xmm2,xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq xmm6,xmm4
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 7d 7e 04 25 78 56 34 12 vmovd DWORD PTR ds:0x12345678,xmm8
[ ]*[a-f0-9]+: c5 fd 6e 21 vmovd xmm4,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e1 fd 7e e1 vmovq rcx,xmm4
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq xmm4,rcx
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[rcx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq QWORD PTR \[rcx\],xmm4
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[rcx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq QWORD PTR \[rcx\],xmm4
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq xmm4,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si ecx,xmm4
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si ecx,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss xmm2,xmm6,xmm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss xmm2,xmm6,DWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq xmm6,xmm4
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq xmm6,xmm4
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss xmm2,xmm6,xmm4
[ ]*[a-f0-9]+: c5 7d 7e 04 25 78 56 34 12 vmovd DWORD PTR ds:0x12345678,xmm8
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq %rcx,%xmm4
[ ]*[a-f0-9]+: c4 e1 fd 7e e1 vmovq %xmm4,%rcx
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq %rcx,%xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%rcx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%rcx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%rcx\),%ecx
[ ]*[a-f0-9]+: c5 ff 2c cc vcvttsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ce c2 11 07 vcmpordss \(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss \$0x7,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq %xmm4,%xmm6
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 7d 7e 04 25 78 56 34 12 vmovd %xmm8,0x12345678
[ ]*[a-f0-9]+: c5 fd 6e 21 vmovd \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c4 e1 fd 7e e1 vmovq %xmm4,%rcx
[ ]*[a-f0-9]+: c4 e1 fd 6e e1 vmovq %rcx,%xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%rcx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%rcx\),%xmm4
-[ ]*[a-f0-9]+: c5 fd d6 21 vmovq %xmm4,\(%rcx\)
-[ ]*[a-f0-9]+: c5 fe 7e 21 vmovq \(%rcx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%rcx\),%xmm4
+[ ]*[a-f0-9]+: c5 f9 d6 21 vmovq %xmm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fa 7e 21 vmovq \(%rcx\),%xmm4
[ ]*[a-f0-9]+: c5 ff 2d cc vcvtsd2si %xmm4,%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%rcx\),%ecx
[ ]*[a-f0-9]+: c5 ff 2d 09 vcvtsd2si \(%rcx\),%ecx
[ ]*[a-f0-9]+: c4 e3 4d 0a d4 07 vroundss \$0x7,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e3 4d 0a 11 07 vroundss \$0x7,\(%rcx\),%xmm6,%xmm2
-[ ]*[a-f0-9]+: c5 fe 7e f4 vmovq %xmm4,%xmm6
+[ ]*[a-f0-9]+: c5 fa 7e f4 vmovq %xmm4,%xmm6
[ ]*[a-f0-9]+: c5 cf 10 d4 vmovsd %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 ce 10 d4 vmovss %xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c5 7d 7e 04 25 78 56 34 12 vmovd %xmm8,0x12345678
+2018-09-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/23665
+ * i386-dis.c (vex_len_table): Update VEX_LEN_0F7E_P_1 and
+ VEX_LEN_0FD6_P_2 entries.
+ * i386-opc.tbl: Set Vex=1 on VEX.128 only vmovq.
+ * i386-tbl.h: Regenerated.
+
2018-09-14 H.J. Lu <hongjiu.lu@intel.com>
PR gas/23642
/* VEX_LEN_0F7E_P_1 */
{
{ VEX_W_TABLE (VEX_W_0F7E_P_1) },
- { VEX_W_TABLE (VEX_W_0F7E_P_1) },
},
/* VEX_LEN_0F7E_P_2 */
/* VEX_LEN_0FD6_P_2 */
{
{ VEX_W_TABLE (VEX_W_0FD6_P_2) },
- { VEX_W_TABLE (VEX_W_0FD6_P_2) },
},
/* VEX_LEN_0FF7_P_2 */
vmovntdqa, 2, 0x662a, None, 1, CpuAVX, Modrm|Vex|VexOpcode=1|VexW=3|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex, RegXMM }
vmovntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=3|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
vmovntps, 2, 0x2b, None, 1, CpuAVX, Modrm|Vex|VexOpcode=0|VexW=3|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex }
-vmovq, 2, 0xf37e, None, 1, CpuAVX, Load|Modrm|Vex=3|VexOpcode=0|VexW=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
-vmovq, 2, 0x66d6, None, 1, CpuAVX, Modrm|Vex=3|VexOpcode=0|VexW=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, Qword|Unspecified|BaseIndex|RegXMM }
+vmovq, 2, 0xf37e, None, 1, CpuAVX, Load|Modrm|Vex=1|VexOpcode=0|VexW=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM }
+vmovq, 2, 0x66d6, None, 1, CpuAVX, Modrm|Vex=1|VexOpcode=0|VexW=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, Qword|Unspecified|BaseIndex|RegXMM }
vmovq, 2, 0x666e, None, 1, CpuAVX|Cpu64, D|Modrm|Vex=3|VexOpcode=0|VexW=2|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Size64, { Reg64|Unspecified|BaseIndex, RegXMM }
vmovsd, 2, 0xf210, None, 1, CpuAVX, D|Modrm|Vex=3|VexOpcode=0|VexW=3|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Qword|Unspecified|BaseIndex, RegXMM }
vmovsd, 3, 0xf210, None, 1, CpuAVX, D|Modrm|Vex=3|VexOpcode=0|VexVVVV=1|VexW=3|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM|RegMem, RegXMM, RegXMM }
0, 0, 0, 0, 0, 0 } },
{ 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
- 3, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
{ { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1,
0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 1, 0, 0,
0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
- 3, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 0, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0 },
{ { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,