inorder: find register dependencies "lazily"

Architectures like SPARC need to read the window pointer
in order to figure out it's register dependence. However,
this may not get updated until after an instruction gets
executed, so now we lazily detect the register dependence
in the EXE stage (execution unit or use_def). This
makes sure we get the mapping after the most current change.

diff --git a/src/cpu/inorder/resources/decode_unit.cc b/src/cpu/inorder/resources/decode_unit.cc
index b791253b25aadfb9977f62ba4f7681868c371e6d..43f8478188adc80ba2ce6f78c14822377891c2d8 100644 (file)
--- a/src/cpu/inorder/resources/decode_unit.cc
+++ b/src/cpu/inorder/resources/decode_unit.cc
@@ -68,7 +68,6 @@ DecodeUnit::execute(int slot_num)
                 DPRINTF(InOrderDecode,
                     "[tid:%i]: %s Setting Destination Register(s) for [sn:%i].\n",
                         tid, inst->instName(), inst->seqNum);
-                regDepMap[tid]->insert(inst);
 
                 //inst->printSked();
 

diff --git a/src/cpu/inorder/resources/execution_unit.cc b/src/cpu/inorder/resources/execution_unit.cc
index 2e52c5ac5621ebd7100a0153b3f78513685bef9d..8ea320b6bffb14e31610973753475c04f9648352 100644 (file)
--- a/src/cpu/inorder/resources/execution_unit.cc
+++ b/src/cpu/inorder/resources/execution_unit.cc
@@ -100,6 +100,17 @@ ExecutionUnit::execute(int slot_num)
     }
 
 
+    //@todo: may want to make a separate schedule entry for setting
+    //       destination register dependencies
+    //@note: typically want to set the output dependencies right
+    //       before we do any reading or writing of registers
+    //       (in RegFile Manager(use_def.cc)) but there are some
+    //       instructions that dont have src regs, so just in case
+    //       take care of reg. dep. map stuff here
+    if (!inst->isRegDepEntry()) {
+        regDepMap[tid]->insert(inst);
+    }
+
     switch (exec_req->cmd)
     {
       case ExecuteInst:
@@ -139,11 +150,9 @@ ExecutionUnit::execute(int slot_num)
                 lastControlTick = curTick();
 
                 // Evaluate Branch
-                DPRINTF(IEW, "Pre-Execute %s PC:%s nextPC:%s predPC:%s\n", inst->instName(), inst->pcState(), inst->readPredTarg());
                 fault = inst->execute();
                 executions++;
                 inst->setExecuted();
-                DPRINTF(IEW, "Post-Execute %s PC:%s nextPC:%s predPC:%s\n", inst->instName(), inst->pcState(), inst->readPredTarg());
 
                 if (fault == NoFault) {
                     // If branch is mispredicted, then signal squash

diff --git a/src/cpu/inorder/resources/use_def.cc b/src/cpu/inorder/resources/use_def.cc
index 5bc78d6ba59dc3bf088de01afb676a2bbfc26965..b23a3c3444f72f8a1da5299889d3ba1c172a1beb 100644 (file)
--- a/src/cpu/inorder/resources/use_def.cc
+++ b/src/cpu/inorder/resources/use_def.cc
@@ -159,6 +159,12 @@ UseDefUnit::execute(int slot_idx)
         *nonSpecSeqNum[tid] = seq_num;
     }
 
+    //@todo: may want to make a separate schedule entry for setting
+    //       destination register dependencies
+    if (!inst->isRegDepEntry()) {
+        regDepMap[tid]->insert(inst);
+    }
+
     switch (ud_req->cmd)
     {
       case ReadSrcReg: