X86: Implement the bswap instruction.
authorGabe Black <gblack@eecs.umich.edu>
Mon, 26 Jan 2009 04:32:43 +0000 (20:32 -0800)
committerGabe Black <gblack@eecs.umich.edu>
Mon, 26 Jan 2009 04:32:43 +0000 (20:32 -0800)
src/arch/x86/isa/decoder/two_byte_opcodes.isa
src/arch/x86/isa/insts/general_purpose/data_conversion/endian_conversion.py

index 4ebe03d84fb7d76f4f78f9a02f33fddf04defacb..064f5ce86d963960ec5c928bc9b20b4c07b6e1bf 100644 (file)
                     default: Inst::UD2();
                 }
             }
-            0x19: bswap_B();
+            0x19: decode OPSIZE {
+                4: Inst::BSWAP_D(Bd);
+                8: Inst::BSWAP_Q(Bq);
+                default: Inst::UD2();
+            }
             0x1A: decode LEGACY_DECODEVAL {
                 // no prefix
                 0x0: decode OPCODE_OP_BOTTOM3 {
index b375ac27e17c7f6d6b568d581b62828d8a155a67..ac23434627d87bde101ab6ff09617129b5578b00 100644 (file)
 #
 # Authors: Gabe Black
 
-microcode = ""
+microcode = '''
+def macroop BSWAP_D_R
+{
+    roli reg, reg, 8, dataSize=2
+    roli reg, reg, 16, dataSize=4
+    roli reg, reg, 8, dataSize=2
+};
+
+def macroop BSWAP_Q_R
+{
+    roli reg, reg, 8, dataSize=2
+    roli reg, reg, 16, dataSize=4
+    roli reg, reg, 8, dataSize=2
+    roli reg, reg, 32, dataSize=8
+    roli reg, reg, 8, dataSize=2
+    roli reg, reg, 16, dataSize=4
+    roli reg, reg, 8, dataSize=2
+};
+'''
 #let {{
 #    class BSWAP(Inst):
 #       "GenFault ${new UnimpInstFault}"