aco::schedule_program(program.get(), live_vars);
std::string llvm_ir;
- if (options->record_llvm_ir) {
+ if (options->record_ir) {
char *data = NULL;
size_t size = 0;
FILE *f = open_memstream(&data, &size);
std::vector<uint32_t> code;
unsigned exec_size = aco::emit_program(program.get(), code);
- bool get_disasm = options->dump_shader || options->record_llvm_ir;
+ bool get_disasm = options->dump_shader || options->record_ir;
size_t size = llvm_ir.size();
legacy_binary->config = config;
legacy_binary->disasm_size = 0;
- legacy_binary->llvm_ir_size = llvm_ir.size();
+ legacy_binary->ir_size = llvm_ir.size();
llvm_ir.copy((char*) legacy_binary->data + legacy_binary->code_size, llvm_ir.size());
fprintf(f, "NIR:\n%s\n", shader->nir_string);
}
- fprintf(f, "LLVM IR:\n%s\n", shader->llvm_ir_string);
+ fprintf(f, "LLVM IR:\n%s\n", shader->ir_string);
fprintf(f, "DISASM:\n%s\n", shader->disasm_string);
radv_shader_dump_stats(pipeline->device, shader, stage, f);
return NULL;
}
- variant->llvm_ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->elf_size)) : NULL;
+ variant->ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->elf_size)) : NULL;
variant->disasm_string = malloc(disasm_size + 1);
memcpy(variant->disasm_string, disasm_data, disasm_size);
variant->disasm_string[disasm_size] = 0;
for (unsigned i = 0; i < DEBUGGER_NUM_MARKERS; i++)
ptr32[i] = DEBUGGER_END_OF_CODE_MARKER;
- variant->llvm_ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->code_size)) : NULL;
- variant->disasm_string = bin->disasm_size ? strdup((const char*)(bin->data + bin->code_size + bin->llvm_ir_size)) : NULL;
+ variant->ir_string = bin->ir_size ? strdup((const char*)(bin->data + bin->code_size)) : NULL;
+ variant->disasm_string = bin->disasm_size ? strdup((const char*)(bin->data + bin->code_size + bin->ir_size)) : NULL;
}
return variant;
}
options->dump_shader = radv_can_dump_shader(device, module, gs_copy_shader);
options->dump_preoptir = options->dump_shader &&
device->instance->debug_flags & RADV_DEBUG_PREOPTIR;
- options->record_llvm_ir = keep_shader_info;
+ options->record_ir = keep_shader_info;
options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR;
options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size;
options->address32_hi = device->physical_device->rad_info.address32_hi;
else
options->wave_size = device->physical_device->ge_wave_size;
- if (!use_aco || options->dump_shader || options->record_llvm_ir)
+ if (!use_aco || options->dump_shader || options->record_ir)
ac_init_llvm_once();
if (use_aco) {
free(variant->nir_string);
free(variant->disasm_string);
- free(variant->llvm_ir_string);
+ free(variant->ir_string);
free(variant);
}
buf = _mesa_string_buffer_create(NULL, 1024);
_mesa_string_buffer_printf(buf, "%s:\n", radv_get_shader_name(&variant->info, stage));
- _mesa_string_buffer_printf(buf, "%s\n\n", variant->llvm_ir_string);
+ _mesa_string_buffer_printf(buf, "%s\n\n", variant->ir_string);
_mesa_string_buffer_printf(buf, "%s\n\n", variant->disasm_string);
generate_shader_stats(device, variant, stage, buf);
bool robust_buffer_access;
bool dump_shader;
bool dump_preoptir;
- bool record_llvm_ir;
+ bool record_ir;
bool check_ir;
bool has_ls_vgpr_init_bug;
bool use_ngg_streamout;
struct ac_shader_config config;
unsigned code_size;
unsigned exec_size;
- unsigned llvm_ir_size;
+ unsigned ir_size;
unsigned disasm_size;
- /* data has size of code_size + llvm_ir_size + disasm_size + 2, where
+ /* data has size of code_size + ir_size + disasm_size + 2, where
* the +2 is for 0 of the ir strings. */
uint8_t data[0];
};
uint32_t spirv_size;
char *nir_string;
char *disasm_string;
- char *llvm_ir_string;
+ char *ir_string;
struct list_head slab_list;
};