#include "mem/functional_mem/memory_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
+#include "dev/tsunami_io.hh"
using namespace std;
AlphaConsole::AlphaConsole(const string &name, SimConsole *cons,
SimpleDisk *d, int size, System *system,
- BaseCPU *cpu, TlaserClock *clock, int num_cpus,
+ BaseCPU *cpu, TsunamiIO *clock, int num_cpus,
Addr addr, Addr mask, MemoryController *mmu)
: MmapDevice(name, addr, mask, mmu), disk(d), console(cons)
{
Param<Addr> mask;
SimObjectParam<System *> system;
SimObjectParam<BaseCPU *> cpu;
- SimObjectParam<TlaserClock *> clock;
+ SimObjectParam<TsunamiIO *> clock;
END_DECLARE_SIM_OBJECT_PARAMS(AlphaConsole)
#include "sim/host.hh"
#include "dev/alpha_access.h"
#include "mem/functional_mem/mmap_device.hh"
+#include "dev/tsunami_io.hh"
class BaseCPU;
class SimConsole;
AlphaConsole(const std::string &name, SimConsole *cons,
SimpleDisk *d, int size,
System *system, BaseCPU *cpu,
- TlaserClock *clock, int num_cpus,
+ TsunamiIO *clock, int num_cpus,
Addr addr, Addr mask, MemoryController *mmu);
public:
using namespace std;
Tsunami::Tsunami(const string &name, ScsiController *s, EtherDev *e,
- TlaserClock *c, TsunamiCChip *cc, TsunamiPChip *pc, SimConsole *con,
- IntrControl *ic, int intr_freq)
- : SimObject(name), intctrl(ic), cons(con), scsi(s), ethernet(e),
- clock(c), cchip(cc), pchip(pc), interrupt_frequency(intr_freq)
+ SimConsole *con, IntrControl *ic, int intr_freq)
+ : SimObject(name), intrctrl(ic), cons(con), scsi(s), ethernet(e),
+ interrupt_frequency(intr_freq)
{
for (int i = 0; i < Tsunami::Max_CPUs; i++)
intr_sum_type[i] = 0;
SimObjectParam<ScsiController *> scsi;
SimObjectParam<EtherDev *> ethernet;
- SimObjectParam<TlaserClock *> clock;
- SimObjectParam<TsunamiCChip *> cchip;
- SimObjectParam<TsunamiPChip *> pchip;
SimObjectParam<SimConsole *> cons;
SimObjectParam<IntrControl *> intrctrl;
Param<int> interrupt_frequency;
INIT_PARAM(scsi, "scsi controller"),
INIT_PARAM(ethernet, "ethernet controller"),
- INIT_PARAM(clock, "turbolaser clock"),
- INIT_PARAM(cchip, "cchip"),
- INIT_PARAM(pchip, "pchip"),
INIT_PARAM(cons, "system console"),
INIT_PARAM(intrctrl, "interrupt controller"),
INIT_PARAM_DFLT(interrupt_frequency, "frequency of interrupts", 1200)
CREATE_SIM_OBJECT(Tsunami)
{
- return new Tsunami(getInstanceName(), scsi, ethernet, clock,
- cchip, pchip, cons, intrctrl, interrupt_frequency);
+ return new Tsunami(getInstanceName(), scsi, ethernet,
+ cons, intrctrl, interrupt_frequency);
}
REGISTER_SIM_OBJECT("Tsunami", Tsunami)
static const int Max_CPUs = 4;
- IntrControl *intctrl;
+ IntrControl *intrctrl;
// ConsoleListener *listener;
SimConsole *cons;
ScsiController *scsi;
EtherDev *ethernet;
- TlaserClock *clock;
TsunamiCChip *cchip;
TsunamiPChip *pchip;
public:
Tsunami(const std::string &name, ScsiController *scsi,
- EtherDev *ethernet, TlaserClock *clock, TsunamiCChip *cc, TsunamiPChip *pc,
+ EtherDev *ethernet,
SimConsole *, IntrControl *intctrl, int intrFreq);
virtual void serialize(std::ostream &os);
#include "dev/tsunami_cchip.hh"
#include "dev/tsunamireg.h"
#include "dev/tsunami.hh"
+#include "cpu/intr_control.hh"
#include "mem/functional_mem/memory_control.hh"
#include "sim/builder.hh"
#include "sim/system.hh"
using namespace std;
-TsunamiCChip::TsunamiCChip(const string &name, /*Tsunami *t,*/
+TsunamiCChip::TsunamiCChip(const string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu)/*, tsunami(t) */
+ : MmapDevice(name, addr, mask, mmu), tsunami(t)
{
for(int i=0; i < Tsunami::Max_CPUs; i++) {
dim[i] = 0;
}
drir = 0;
+ misc = 0;
+ RTCInterrupting = false;
+
+ //Put back pointer in tsunami
+ tsunami->cchip = this;
}
Fault
panic("TSDEV_CC_MTR not implemeted\n");
return No_Fault;
case TSDEV_CC_MISC:
- panic("TSDEV_CC_MISC not implemented\n");
+ *(uint64_t*)data = misc;
return No_Fault;
case TSDEV_CC_AAR0:
case TSDEV_CC_AAR1:
panic("TSDEV_CC_MTR write not implemented\n");
return No_Fault;
case TSDEV_CC_MISC:
- panic("TSDEV_CC_MISC write not implemented\n");
+ //If it is the seventh bit, clear the RTC interrupt
+ if ((*(uint64_t*) data) & (1<<7)) {
+ RTCInterrupting = false;
+ tsunami->intrctrl->clear(0, TheISA::INTLEVEL_IRQ2, 0);
+ misc &= ~(1<<7);
+ } else panic("TSDEV_CC_MISC write not implemented\n");
return No_Fault;
case TSDEV_CC_AAR0:
case TSDEV_CC_AAR1:
BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiCChip)
- // SimObjectParam<Tsunami *> tsunami;
+ SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiCChip)
-// INIT_PARAM(tsunami, "Tsunami"),
+ INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM(mask, "Address Mask")
CREATE_SIM_OBJECT(TsunamiCChip)
{
- return new TsunamiCChip(getInstanceName(), /*tsunami,*/ addr, mask, mmu);
+ return new TsunamiCChip(getInstanceName(), tsunami, addr, mask, mmu);
}
REGISTER_SIM_OBJECT("TsunamiCChip", TsunamiCChip)
uint64_t drir;
public:
- TsunamiCChip(const std::string &name, /*Tsunami *t,*/
+ TsunamiCChip(const std::string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu);
virtual Fault read(MemReqPtr req, uint8_t *data);
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string §ion);
+
+ uint64_t misc;
+ bool RTCInterrupting;
};
#endif // __TSUNAMI_CCHIP_HH__
#include "dev/tsunami.hh"
#include "mem/functional_mem/memory_control.hh"
#include "sim/builder.hh"
+#include "dev/tsunami_cchip.hh"
using namespace std;
#define RTC_RATE 1024
// Timer Event for Periodic interrupt of RTC
-TsunamiIO::RTCEvent::RTCEvent()
- : Event(&mainEventQueue)
+TsunamiIO::RTCEvent::RTCEvent(Tsunami* t)
+ : Event(&mainEventQueue), tsunami(t)
{
DPRINTF(MC146818, "RTC Event Initilizing\n");
schedule(curTick + ticksPerSecond/RTC_RATE);
DPRINTF(MC146818, "Timer Interrupt\n");
schedule(curTick + ticksPerSecond/RTC_RATE);
//Actually interrupt the processor here
+ if (!tsunami->cchip->RTCInterrupting) {
+ tsunami->cchip->misc |= 1 << 7;
+ tsunami->cchip->RTCInterrupting = true;
+ tsunami->intrctrl->post(0, TheISA::INTLEVEL_IRQ2, 0);
+ }
}
const char *
-TsunamiIO::TsunamiIO(const string &name, /*Tsunami *t,*/ time_t init_time,
- Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu)/*, tsunami(t) */
+TsunamiIO::TsunamiIO(const string &name, Tsunami *t, time_t init_time,
+ Addr addr, Addr mask, uint32_t f, MemoryController *mmu)
+ : MmapDevice(name, addr, mask, mmu), tsunami(t), rtc(t), freq(f)
{
timerData = 0;
set_time(init_time == 0 ? time(NULL) : init_time);
BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
- // SimObjectParam<Tsunami *> tsunami;
+ SimObjectParam<Tsunami *> tsunami;
Param<time_t> time;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
+ Param<uint32_t> frequency;
END_DECLARE_SIM_OBJECT_PARAMS(TsunamiIO)
BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
-// INIT_PARAM(tsunami, "Tsunami"),
+ INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM_DFLT(time, "System time to use "
"(0 for actual time, default is 1/1/06", ULL(1136073600)),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
- INIT_PARAM(mask, "Address Mask")
+ INIT_PARAM(mask, "Address Mask"),
+ INIT_PARAM(frequency, "clock interrupt frequency")
END_INIT_SIM_OBJECT_PARAMS(TsunamiIO)
CREATE_SIM_OBJECT(TsunamiIO)
{
- return new TsunamiIO(getInstanceName(), /*tsunami,*/ time, addr, mask, mmu);
+ return new TsunamiIO(getInstanceName(), tsunami, time, addr,
+ mask, frequency, mmu);
}
REGISTER_SIM_OBJECT("TsunamiIO", TsunamiIO)
class RTCEvent : public Event
{
+ protected:
+ Tsunami* tsunami;
public:
- RTCEvent();
+ RTCEvent(Tsunami* t);
virtual void process();
virtual const char *description();
uint8_t mode1;
uint8_t mode2;
+ Tsunami *tsunami;
+
/* This timer is initilized, but after I wrote the code
it doesn't seem to be used again, and best I can tell
it too is not connected to any interrupt port */
uint32_t timerData;
+ uint32_t freq;
+
public:
- TsunamiIO(const std::string &name, /*Tsunami *t,*/ time_t init_time,
- Addr addr, Addr mask, MemoryController *mmu);
+ uint32_t frequency() const { return freq; }
+
+ TsunamiIO(const std::string &name, Tsunami *t, time_t init_time,
+ Addr addr, Addr mask, uint32_t f, MemoryController *mmu);
void set_time(time_t t);
using namespace std;
-TsunamiPChip::TsunamiPChip(const string &name, /*Tsunami *t,*/
+TsunamiPChip::TsunamiPChip(const string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu)
- : MmapDevice(name, addr, mask, mmu)/*, tsunami(t) */
+ : MmapDevice(name, addr, mask, mmu), tsunami(t)
{
wsba0 = 0;
wsba1 = 0;
tba2 = 0;
tba3 = 0;
+ //Set back pointer in tsunami
+ tsunami->pchip = this;
}
Fault
BEGIN_DECLARE_SIM_OBJECT_PARAMS(TsunamiPChip)
-/* SimObjectParam<Tsunami *> tsunami;*/
+ SimObjectParam<Tsunami *> tsunami;
SimObjectParam<MemoryController *> mmu;
Param<Addr> addr;
Param<Addr> mask;
BEGIN_INIT_SIM_OBJECT_PARAMS(TsunamiPChip)
- /*INIT_PARAM(tsunami, "Tsunami"),*/
+ INIT_PARAM(tsunami, "Tsunami"),
INIT_PARAM(mmu, "Memory Controller"),
INIT_PARAM(addr, "Device Address"),
INIT_PARAM(mask, "Address Mask")
CREATE_SIM_OBJECT(TsunamiPChip)
{
- return new TsunamiPChip(getInstanceName(), /*tsunami,*/ addr, mask, mmu);
+ return new TsunamiPChip(getInstanceName(), tsunami, addr, mask, mmu);
}
REGISTER_SIM_OBJECT("TsunamiPChip", TsunamiPChip)
public:
- TsunamiPChip(const std::string &name, /*Tsunami *t,*/
+ TsunamiPChip(const std::string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu);
virtual Fault read(MemReqPtr req, uint8_t *data);