frickin frick

diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py
index 58cf4f1b91995da985bf3e009985e510a9727474..cf26f43f3e274625eca9cdfc2a1ecc57c9d0be43 100644 (file)
--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1147,14 +1147,11 @@ class SVP64Asm:
             elif encmode == 'vli':
                 assert sv_mode == 0b01 # only allow ff mode
                 vli = True
-<<<<<<< HEAD
-=======
             elif encmode == 'sea':
                 assert sv_mode in (None, 0b00, 0b01)
                 assert rm['mode'] == "LDST_IDX"
                 sea = True
                 assert failfirst is False, "cannot use ffirst+signed-address"
->>>>>>> 54866195 (add asserts to ensure failfirst+sea not attempted)
             elif is_bc:
                 if encmode == 'all':
                     svp64_rm.branch.ALL = 1