Add powmod algorithm implementation

diff --git a/crypto_router_asic.mdwn b/crypto_router_asic.mdwn
index d338fa3e0c8ee374f2002998423238a94c9a1b6c..e190eb8a627b3e9bf1536e65d26fa76681d72b56 100644 (file)
--- a/crypto_router_asic.mdwn
+++ b/crypto_router_asic.mdwn
@@ -30,6 +30,9 @@ See [Big integer arithmetic (bigint)](/openpower/sv/biginteger) and
 [Bit manipulation (bitmanip)](/openpower/sv/bitmanip) for rationale, instruction
 list and definition in pseudo-code.
 
+Also, a [presentation](https://ftp.libre-soc.org/fosdem_2024/fosdem2024_bigint.pdf)
+on big integer arithmetic on top of SVP64 vectorization.
+
 **2) Implementation and validation of the above instructions on the ISA simulator**
 
 The implementation is scattered within the simulator code, which is available at:
@@ -79,6 +82,20 @@ Implemented 100% in ISA simulator, allowing 100% successful implementation of Si
 (But limited budget of 2021-02-051 was insufficient to complete HDL
 implementation.)
 
+**5) Documentation and demonstration of the general-purpose instructions that
+happen to also help accelerate cryptographic algorithms**
+
+See: <https://bugs.libre-soc.org/show_bug.cgi?id=773>
+
+* [Big integer multiplication](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l29)
+* [Big integer division/modulus](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l131)
+* [Big integer modular power operation](https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/test/bigint/powmod.py;h=7fc794685bebb1f3c2451c64da041a0e81143e29;hb=HEAD#l991)
+
+To test the above assembly algorithms in the ISA simulator,
+[install the developer environment](/HDL_workflow/devscripts), go to the
+`~/src/openpower-isa/src/openpower/decoder/isa` directory, and run
+`python3 test_aaa_caller_svp64_powmod.py` (warning: long running).
+
 **5) A flexible self-contained HDL platform (ls2) for implementing a System-on-Chip
 on an FPGA or ASIC**
 
@@ -95,9 +112,6 @@ Links to:
 
 * sub-page about historical reasoning for some of the decisions taken
 (probably not needed, cesar)
-* documentation and demonstration of the general-purpose instructions that happen
-to also help accelerate cryptographic algorithms
- https://bugs.libre-soc.org/show_bug.cgi?id=773
 * bug reports, git commits and other wiki pages 
 
 [[/openpower/sv/cookbook/chacha20]] - this was actually done under NLnet grant [2022-08-051](/nlnet_2022_opf_isa_wg) (see [[https://bugs.libre-soc.org/show_bug.cgi?id=952]]) and only has TEN INSTRUCTIONS in the inner