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Added english language description, spaces and brackets for lbzx instruction
author
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:18:21 +0000
(11:18 +0100)
committer
Shriya Sharma
<shriya@redsemiconductor.com>
Tue, 26 Sep 2023 10:18:26 +0000
(11:18 +0100)
openpower/isa/fixedload.mdwn
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diff --git
a/openpower/isa/fixedload.mdwn
b/openpower/isa/fixedload.mdwn
index 7055c23f600dac74488a864fd3d0d2b590cce1c4..8d684f861276b347a93649ec3d57ca5e69cb4fd7 100644
(file)
--- a/
openpower/isa/fixedload.mdwn
+++ b/
openpower/isa/fixedload.mdwn
@@
-60,6
+60,12
@@
Pseudo-code:
EA <- b + (RB)
RT <- ([0] * (XLEN-8)) || MEM(EA, 1)
+Description:
+
+ Let the effective address (EA) be the sum
+ (RA|0)+ (RB). The byte in storage addressed by EA is
+ loaded into RT[56:63] . RT[0:55] are set to 0.
+
Special Registers Altered:
None