}
log_samples = util_logbase2(rctx->framebuffer.nr_samples);
- if (rctx->b.chip_class == CAYMAN && rctx->db_misc_state.log_samples != log_samples) {
+ /* This is for Cayman to program SAMPLE_RATE, and for RV770 to fix a hw bug. */
+ if ((rctx->b.chip_class == CAYMAN ||
+ rctx->b.family == CHIP_RV770) &&
+ rctx->db_misc_state.log_samples != log_samples) {
rctx->db_misc_state.log_samples = log_samples;
rctx->db_misc_state.atom.dirty = true;
}
db_render_control |= S_028D0C_DEPTH_CLEAR_ENABLE(1);
}
+ /* RV770 workaround for a hang with 8x MSAA. */
+ if (rctx->b.family == CHIP_RV770 && a->log_samples == 3) {
+ db_render_override |= S_028D10_MAX_TILES_IN_DTT(6);
+ }
+
r600_write_context_reg_seq(cs, R_028D0C_DB_RENDER_CONTROL, 2);
radeon_emit(cs, db_render_control); /* R_028D0C_DB_RENDER_CONTROL */
radeon_emit(cs, db_render_override); /* R_028D10_DB_RENDER_OVERRIDE */
#define S_028D10_IGNORE_SC_ZRANGE(x) (((x) & 0x1) << 17)
#define G_028D10_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1)
#define C_028D10_IGNORE_SC_ZRANGE 0xFFFDFFFF
+#define S_028D10_MAX_TILES_IN_DTT(x) (((x) & 0x1F) << 21)
+#define G_028D10_MAX_TILES_IN_DTT(x) (((x) >> 21) & 0x1F)
+#define C_028D10_MAX_TILES_IN_DTT 0xFC1FFFFF
#define R_02880C_DB_SHADER_CONTROL 0x02880C
#define S_02880C_Z_EXPORT_ENABLE(x) (((x) & 0x1) << 0)
#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1)