r600g: fix for an MSAA hang on RV770
authorMarek Olšák <marek.olsak@amd.com>
Sun, 20 Apr 2014 16:11:56 +0000 (18:11 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Thu, 24 Apr 2014 23:33:12 +0000 (01:33 +0200)
Cc: 10.0 10.1 mesa-stable@lists.freedesktop.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
src/gallium/drivers/r600/evergreen_state.c
src/gallium/drivers/r600/r600_state.c
src/gallium/drivers/r600/r600d.h

index fc54ae7606ad9086b50bee8067713afb72d31078..6f277906f5945bcf4ee54492faf099ef5609f094 100644 (file)
@@ -1381,7 +1381,10 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
        }
 
        log_samples = util_logbase2(rctx->framebuffer.nr_samples);
-       if (rctx->b.chip_class == CAYMAN && rctx->db_misc_state.log_samples != log_samples) {
+       /* This is for Cayman to program SAMPLE_RATE, and for RV770 to fix a hw bug. */
+       if ((rctx->b.chip_class == CAYMAN ||
+            rctx->b.family == CHIP_RV770) &&
+           rctx->db_misc_state.log_samples != log_samples) {
                rctx->db_misc_state.log_samples = log_samples;
                rctx->db_misc_state.atom.dirty = true;
        }
index 99cfe6f8e66262202c7ce0c91eb0691100e3766f..ffcceacfb8162d5395d4d6dd2e5768ceabcef139 100644 (file)
@@ -1615,6 +1615,11 @@ static void r600_emit_db_misc_state(struct r600_context *rctx, struct r600_atom
                db_render_control |= S_028D0C_DEPTH_CLEAR_ENABLE(1);
        }
 
+       /* RV770 workaround for a hang with 8x MSAA. */
+       if (rctx->b.family == CHIP_RV770 && a->log_samples == 3) {
+               db_render_override |= S_028D10_MAX_TILES_IN_DTT(6);
+       }
+
        r600_write_context_reg_seq(cs, R_028D0C_DB_RENDER_CONTROL, 2);
        radeon_emit(cs, db_render_control); /* R_028D0C_DB_RENDER_CONTROL */
        radeon_emit(cs, db_render_override); /* R_028D10_DB_RENDER_OVERRIDE */
index f787803a53e5df4724d09da30a6581ca45cb0702..1684429ba20fd6345b9d9a1f7c858c5bfa8d3696 100644 (file)
 #define   S_028D10_IGNORE_SC_ZRANGE(x)                 (((x) & 0x1) << 17)
 #define   G_028D10_IGNORE_SC_ZRANGE(x)                 (((x) >> 17) & 0x1)
 #define   C_028D10_IGNORE_SC_ZRANGE                    0xFFFDFFFF
+#define   S_028D10_MAX_TILES_IN_DTT(x)                 (((x) & 0x1F) << 21)
+#define   G_028D10_MAX_TILES_IN_DTT(x)                 (((x) >> 21) & 0x1F)
+#define   C_028D10_MAX_TILES_IN_DTT                    0xFC1FFFFF
 #define R_02880C_DB_SHADER_CONTROL                    0x02880C
 #define   S_02880C_Z_EXPORT_ENABLE(x)                  (((x) & 0x1) << 0)
 #define   G_02880C_Z_EXPORT_ENABLE(x)                  (((x) >> 0) & 0x1)