* i960-protos.h: New file.
* i960.c: Include tm_p.h. Add static prototypes. Fix compile
time warnings.
* i960.h: Move prototypes to i960-protos.h. Fix compile time warnings.
From-SVN: r31307
+2000-01-10 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
+
+ * i960-protos.h: New file.
+
+ * i960.c: Include tm_p.h. Add static prototypes. Fix compile
+ time warnings.
+
+ * i960.h: Move prototypes to i960-protos.h. Fix compile time warnings.
+
2000-01-10 Alexandre Oliva <oliva@lsd.ic.unicamp.br>
* combine.c (expand_field_assignment): Do not discard SUBREGs
--- /dev/null
+/* Definitions of target machine for GNU compiler, for Intel 80960
+ Copyright (C) 2000
+ Free Software Foundation, Inc.
+ Contributed by Steven McGeady, Intel Corp.
+ Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
+ Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support.
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+#ifdef RTX_CODE
+extern struct rtx_def *legitimize_address PARAMS ((rtx, rtx, enum machine_mode));
+/* Define the function that build the compare insn for scc and bcc. */
+
+extern struct rtx_def *gen_compare_reg PARAMS ((enum rtx_code, rtx, rtx));
+
+/* Define functions in i960.c and used in insn-output.c. */
+
+extern const char *i960_output_ldconst PARAMS ((rtx, rtx));
+extern const char *i960_output_call_insn PARAMS ((rtx, rtx, rtx, rtx));
+extern const char *i960_output_ret_insn PARAMS ((rtx));
+extern const char *i960_output_move_double PARAMS ((rtx, rtx));
+extern const char *i960_output_move_double_zero PARAMS ((rtx));
+extern const char *i960_output_move_quad PARAMS ((rtx, rtx));
+extern const char *i960_output_move_quad_zero PARAMS ((rtx));
+
+extern int literal PARAMS ((rtx, enum machine_mode));
+extern int hard_regno_mode_ok PARAMS ((int, enum machine_mode));
+extern int fp_literal PARAMS ((rtx, enum machine_mode));
+extern int signed_literal PARAMS ((rtx, enum machine_mode));
+extern int legitimate_address_p PARAMS ((enum machine_mode, rtx, int));
+extern void i960_print_operand PARAMS ((FILE *, rtx, int));
+extern int fpmove_src_operand PARAMS ((rtx, enum machine_mode));
+extern int arith_operand PARAMS ((rtx, enum machine_mode));
+extern int logic_operand PARAMS ((rtx, enum machine_mode));
+extern int fp_arith_operand PARAMS ((rtx, enum machine_mode));
+extern int signed_arith_operand PARAMS ((rtx, enum machine_mode));
+extern int fp_literal_one PARAMS ((rtx, enum machine_mode));
+extern int fp_literal_zero PARAMS ((rtx, enum machine_mode));
+extern int symbolic_memory_operand PARAMS ((rtx, enum machine_mode));
+extern int eq_or_neq PARAMS ((rtx, enum machine_mode));
+extern int arith32_operand PARAMS ((rtx, enum machine_mode));
+extern int power2_operand PARAMS ((rtx, enum machine_mode));
+extern int cmplpower2_operand PARAMS ((rtx, enum machine_mode));
+extern enum machine_mode select_cc_mode PARAMS ((RTX_CODE, rtx));
+extern int i960_address_cost PARAMS ((rtx));
+extern int emit_move_sequence PARAMS ((rtx *, enum machine_mode));
+extern int i960_bypass PARAMS ((rtx, rtx, rtx, int));
+extern void i960_print_operand_addr PARAMS ((FILE *, rtx));
+extern int i960_expr_alignment PARAMS ((rtx, int));
+extern int i960_improve_align PARAMS ((rtx, rtx, int));
+extern int i960_si_ti PARAMS ((rtx, rtx));
+extern int i960_si_di PARAMS ((rtx, rtx));
+#ifdef TREE_CODE
+extern struct rtx_def *i960_function_arg PARAMS ((CUMULATIVE_ARGS *,
+ enum machine_mode,
+ tree, int));
+extern rtx i960_va_arg PARAMS ((tree, tree));
+extern void i960_va_start PARAMS ((int, tree, rtx));
+#endif /* TREE_CODE */
+extern enum reg_class secondary_reload_class PARAMS ((enum reg_class, enum machine_mode, rtx));
+#endif /* RTX_CODE */
+
+#ifdef TREE_CODE
+extern void i960_function_name_declare PARAMS ((FILE *, const char *, tree));
+extern void i960_function_arg_advance PARAMS ((CUMULATIVE_ARGS *, enum machine_mode, tree, int));
+extern int i960_round_align PARAMS ((int, tree));
+extern void i960_setup_incoming_varargs PARAMS ((CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int));
+extern tree i960_build_va_list PARAMS ((void));
+extern int i960_final_reg_parm_stack_space PARAMS ((int, tree));
+extern int i960_reg_parm_stack_space PARAMS ((tree));
+#endif /* TREE_CODE */
+
+#ifdef REAL_VALUE_TYPE
+extern void i960_output_long_double PARAMS ((FILE *, REAL_VALUE_TYPE));
+extern void i960_output_double PARAMS ((FILE *, REAL_VALUE_TYPE));
+extern void i960_output_float PARAMS ((FILE *, REAL_VALUE_TYPE));
+#endif /* REAL_VALUE_TYPE */
+
+extern int process_pragma PARAMS ((int(*)(void), void(*)(int), const char *));
+extern int i960_object_bytes_bitalign PARAMS ((int));
+extern void i960_initialize PARAMS ((void));
+extern int bitpos PARAMS ((unsigned int));
+extern int is_mask PARAMS ((unsigned int));
+extern int bitstr PARAMS ((unsigned int, int *, int *));
+extern int compute_frame_size PARAMS ((int));
+extern void i960_function_prologue PARAMS ((FILE *, unsigned int));
+extern void output_function_profiler PARAMS ((FILE *, int));
+extern void i960_function_epilogue PARAMS ((FILE *, unsigned int));
+extern void i960_scan_opcode PARAMS ((const char *));
/* Subroutines used for code generation on intel 80960.
- Copyright (C) 1992, 1995, 1996, 1997, 1998, 1999
+ Copyright (C) 1992, 1995, 1996, 1997, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Steven McGeady, Intel Corp.
Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
#include "config.h"
#include "system.h"
+#include <math.h>
#include "rtl.h"
#include "regs.h"
#include "hard-reg-set.h"
#include "function.h"
#include "recog.h"
#include "toplev.h"
-#include <math.h>
+#include "tm_p.h"
/* Save the operands last given to a compare for use when we
generate a scc or bcc insn. */
int
process_pragma (p_getc, p_ungetc, pname)
- int (* p_getc) PROTO ((void));
- void (* p_ungetc) PROTO ((int));
- char * pname;
+ int (* p_getc) PARAMS ((void));
+ void (* p_ungetc) PARAMS ((int));
+ const char *pname;
{
- int i;
register int c;
char buf[20];
char *s = buf;
int
literal (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return ((GET_CODE (op) == CONST_INT) && INTVAL(op) >= 0 && INTVAL(op) < 32);
}
int
signed_literal(op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return ((GET_CODE (op) == CONST_INT) && INTVAL(op) > -32 && INTVAL(op) < 32);
}
int
symbolic_memory_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) == SUBREG)
op = SUBREG_REG (op);
int
eq_or_neq (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
return (GET_CODE (op) == EQ || GET_CODE (op) == NE);
}
int
power2_operand (op,mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return 0;
int
cmplpower2_operand (op, mode)
rtx op;
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (op) != CONST_INT)
return 0;
enum machine_mode
select_cc_mode (op, x)
RTX_CODE op;
- rtx x;
+ rtx x ATTRIBUTE_UNUSED;
{
if (op == GTU || op == LTU || op == GEU || op == LEU)
return CC_UNSmode;
/* Output assembler to move a double word value. */
-char *
+const char *
i960_output_move_double (dst, src)
rtx dst, src;
{
/* Output assembler to move a double word zero. */
-char *
+const char *
i960_output_move_double_zero (dst)
rtx dst;
{
/* Output assembler to move a quad word value. */
-char *
+const char *
i960_output_move_quad (dst, src)
rtx dst, src;
{
/* Output assembler to move a quad word zero. */
-char *
+const char *
i960_output_move_quad_zero (dst)
rtx dst;
{
/* Emit insns to load a constant to non-floating point registers.
Uses several strategies to try to use as few insns as possible. */
-char *
+const char *
i960_output_ldconst (dst, src)
register rtx dst, src;
{
void
i960_function_name_declare (file, name, fndecl)
FILE *file;
- char *name;
+ const char *name;
tree fndecl;
{
register int i, j;
char length;
};
+static int i960_form_reg_groups PARAMS ((int, int, int *, int, struct reg_group *));
+static int i960_reg_group_compare PARAMS ((const void *, const void *));
+static int i960_split_reg_group PARAMS ((struct reg_group *, int, int));
+static void i960_arg_size_and_align PARAMS ((enum machine_mode, tree, int *, int *));
+
/* The following functions forms the biggest as possible register
groups with registers in STATE. REGS contain states of the
registers in range [start, finish_reg). The function returns the
/* We sort register winodws in descending order by length. */
static int
i960_reg_group_compare (group1, group2)
- void *group1;
- void *group2;
+ const void *group1;
+ const void *group2;
{
- struct reg_group *w1 = group1;
- struct reg_group *w2 = group2;
+ const struct reg_group *w1 = group1;
+ const struct reg_group *w2 = group2;
if (w1->length > w2->length)
return -1;
((g->length == 4) ? "q" :
(g->length == 3) ? "t" :
(g->length == 2) ? "l" : ""),
- reg_names[g->start_reg], reg_names[l->start_reg]);
+ reg_names[(unsigned char) g->start_reg],
+ reg_names[(unsigned char) l->start_reg]);
sprintf (tmpstr, "\tmov%s %s,%s\n",
((g->length == 4) ? "q" :
(g->length == 3) ? "t" :
(g->length == 2) ? "l" : ""),
- reg_names[l->start_reg], reg_names[g->start_reg]);
+ reg_names[(unsigned char) l->start_reg],
+ reg_names[(unsigned char) g->start_reg]);
strcat (epilogue_string, tmpstr);
n_remaining_saved_regs -= g->length;
for (i = 0; i < g->length; i++)
void
i960_function_epilogue (file, size)
FILE *file;
- unsigned int size;
+ unsigned int size ATTRIBUTE_UNUSED;
{
if (i960_leaf_ret_reg >= 0)
{
/* Output code for a call insn. */
-char *
+const char *
i960_output_call_insn (target, argsize_rtx, arg_pointer, insn)
register rtx target, argsize_rtx, arg_pointer, insn;
{
/* Output code for a return insn. */
-char *
+const char *
i960_output_ret_insn (insn)
register rtx insn;
{
opcode to be tacked on an instruction. This must at least
return a null string. */
-char *
+const char *
i960_br_predict_opcode (lab_ref, insn)
rtx lab_ref, insn;
{
i960_print_operand (file, x, code)
FILE *file;
rtx x;
- char code;
+ int code;
{
enum rtx_code rtxcode = GET_CODE (x);
int
legitimate_address_p (mode, addr, strict)
- enum machine_mode mode;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
register rtx addr;
int strict;
{
rtx
legitimize_address (x, oldx, mode)
register rtx x;
- register rtx oldx;
- enum machine_mode mode;
+ register rtx oldx ATTRIBUTE_UNUSED;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
if (GET_CODE (x) == SYMBOL_REF)
{
break;
case ASHIFT:
- align = i960_expr_alignment (XEXP (x, 0));
+ align = i960_expr_alignment (XEXP (x, 0), size);
if (GET_CODE (XEXP (x, 1)) == CONST_INT)
{
align = MIN (align, 16);
break;
+ default:
+ break;
}
return align;
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type;
- int named;
+ int named ATTRIBUTE_UNUSED;
{
int size, align;
CUMULATIVE_ARGS *cum;
enum machine_mode mode;
tree type;
- int named;
+ int named ATTRIBUTE_UNUSED;
{
rtx ret;
int size, align;
void
i960_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
CUMULATIVE_ARGS *cum;
- enum machine_mode mode;
- tree type;
- int *pretend_size;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
+ tree type ATTRIBUTE_UNUSED;
+ int *pretend_size ATTRIBUTE_UNUSED;
int no_rtl;
{
/* Note: for a varargs fn with only a va_alist argument, this is 0. */
void
i960_scan_opcode (p)
- char *p;
+ const char *p;
{
switch (*p)
{
/* Definitions of target machine for GNU compiler, for Intel 80960
- Copyright (C) 1992, 1993, 1995, 1996, 1998, 1999
+ Copyright (C) 1992, 1993, 1995, 1996, 1998, 1999, 2000
Free Software Foundation, Inc.
Contributed by Steven McGeady, Intel Corp.
Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson
/* Handle pragmas for compatibility with Intel's compilers. */
#define HANDLE_PRAGMA(GET, UNGET, NAME) process_pragma (GET, UNGET, NAME)
-extern int process_pragma ();
/* Run-time compilation parameters selecting different hardware subsets. */
{ \
if (TARGET_K_SERIES && TARGET_C_SERIES) \
{ \
- warning ("conflicting architectures defined - using C series", 0); \
+ warning ("conflicting architectures defined - using C series"); \
target_flags &= ~TARGET_FLAG_K_SERIES; \
} \
if (TARGET_K_SERIES && TARGET_MC) \
{ \
- warning ("conflicting architectures defined - using K series", 0); \
+ warning ("conflicting architectures defined - using K series"); \
target_flags &= ~TARGET_FLAG_MC; \
} \
if (TARGET_C_SERIES && TARGET_MC) \
{ \
- warning ("conflicting architectures defined - using C series", 0);\
+ warning ("conflicting architectures defined - using C series");\
target_flags &= ~TARGET_FLAG_MC; \
} \
if (TARGET_IC_COMPAT3_0) \
target_flags |= TARGET_FLAG_CLEAN_LINKAGE; \
if (TARGET_IC_COMPAT2_0) \
{ \
- warning ("iC2.0 and iC3.0 are incompatible - using iC3.0", 0); \
+ warning ("iC2.0 and iC3.0 are incompatible - using iC3.0"); \
target_flags &= ~TARGET_FLAG_IC_COMPAT2_0; \
} \
} \
} \
/* ??? See the LONG_DOUBLE_TYPE_SIZE definition below. */ \
if (TARGET_LONG_DOUBLE_64) \
- warning ("The -mlong-double-64 option does not work yet.", 0);\
+ warning ("The -mlong-double-64 option does not work yet.");\
i960_initialize (); \
}
/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
On 80960, the cpu registers can hold any mode but the float registers
can only hold SFmode, DFmode, or XFmode. */
-extern int hard_regno_mode_ok ();
#define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok ((REGNO), (MODE))
/* Value is 1 if it is a good idea to tie two pseudo registers
NAMED is nonzero if this argument is a named parameter
(otherwise it is an extra parameter matching an ellipsis). */
-extern struct rtx_def *i960_function_arg ();
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
i960_function_arg(&CUM, MODE, TYPE, NAMED)
/* On 80960, convert non-canonical addresses to canonical form. */
-extern struct rtx_def *legitimize_address ();
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
{ rtx orig_x = (X); \
(X) = legitimize_address (X, OLDX, MODE); \
extern struct rtx_def *i960_compare_op0, *i960_compare_op1;
-/* Define the function that build the compare insn for scc and bcc. */
-
-extern struct rtx_def *gen_compare_reg ();
-
/* Add any extra modes needed to represent the condition code.
Also, signed and unsigned comparisons are distinguished, as
{"power2_operand", {CONST_INT}}, \
{"cmplpower2_operand", {CONST_INT}},
-/* Define functions in i960.c and used in insn-output.c. */
-
-extern char *i960_output_ldconst ();
-extern char *i960_output_call_insn ();
-extern char *i960_output_ret_insn ();
-extern char *i960_output_move_double ();
-extern char *i960_output_move_double_zero ();
-extern char *i960_output_move_quad ();
-extern char *i960_output_move_quad_zero ();
-
/* Defined in reload.c, and used in insn-recog.c. */
extern int rtx_equal_function_value_matters;