MIPS: Only build microMIPS specific simulator functions if microMIPS support is required.

This fixes PR sim/19441.  In the MIPS simulator the microMIPS
functions in micromips.igen were not predicated on the microMIPS
models.  This was causing build issues for some target triples.
This patch sets all the microMIPS specific functions to only be built if
the micromips32, micromips64 or micromipsdsp models are used.

	PR sim/19441
	* micromips.igen (delayslot_micromips): Enable for `micromips32',
	`micromips64' and `micromipsdsp' only.
	(process_isa_mode): Enable for `micromips32' and `micromips64' only.
	(do_micromips_jalr, do_micromips_jal): Likewise.
	(compute_movep_src_reg): Likewise.
	(compute_andi16_imm): Likewise.
	(convert_fmt_micromips): Likewise.
	(convert_fmt_micromips_cvt_d): Likewise.
	(convert_fmt_micromips_cvt_s): Likewise.
	(FMT_MICROMIPS): Likewise.
	(FMT_MICROMIPS_CVT_D): Likewise.
	(FMT_MICROMIPS_CVT_S): Likewise.

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 60af1165f24e367aa7ae4b76af3ac4316327bc32..0370e2b32ed9d19073592d89f8a042bd6c5e01f2 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,20 @@
+2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
+           Maciej W. Rozycki  <macro@imgtec.com>
+
+       PR sim/19441
+       * micromips.igen (delayslot_micromips): Enable for `micromips32',
+       `micromips64' and `micromipsdsp' only.
+       (process_isa_mode): Enable for `micromips32' and `micromips64' only.
+       (do_micromips_jalr, do_micromips_jal): Likewise.
+       (compute_movep_src_reg): Likewise.
+       (compute_andi16_imm): Likewise.
+       (convert_fmt_micromips): Likewise.
+       (convert_fmt_micromips_cvt_d): Likewise.
+       (convert_fmt_micromips_cvt_s): Likewise.
+       (FMT_MICROMIPS): Likewise.
+       (FMT_MICROMIPS_CVT_D): Likewise.
+       (FMT_MICROMIPS_CVT_S): Likewise.
+
 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 
        * interp.c: Include elf-bfd.h.

diff --git a/sim/mips/micromips.igen b/sim/mips/micromips.igen
index 2d921206d6bc88db166e872ad84184418a30e1bb..9f68ce5d3a3f9a40f051ccd185d359a5b44cdd6f 100644 (file)
--- a/sim/mips/micromips.igen
+++ b/sim/mips/micromips.igen
@@ -39,6 +39,9 @@
 :compute:::int:IMM_SHIFT_2BIT:IMMEDIATE:(IMMEDIATE << 2)
 
 :function:::address_word:delayslot_micromips:address_word target, address_word nia, int delayslot_instruction_size
+*micromips32:
+*micromips64:
+*micromipsdsp:
 {
   instruction_word delay_insn;
   sim_events_slip (SD, 1);
@@ -52,12 +55,16 @@
 }
 
 :function:::address_word:process_isa_mode:address_word target
+*micromips32:
+*micromips64:
 {
   SD->isa_mode = target & 0x1;
   return (target & (-(1 << 1)));
 }
 
 :function:::address_word:do_micromips_jalr:int rt, int rs, address_word nia, int delayslot_instruction_size
+*micromips32:
+*micromips64:
 {
   GPR[rt] = (nia + delayslot_instruction_size) | ISA_MODE_MICROMIPS;
   return (process_isa_mode (SD_,
@@ -65,6 +72,8 @@
 }
 
 :function:::address_word:do_micromips_jal:address_word target, address_word nia, int delayslot_instruction_size
+*micromips32:
+*micromips64:
 {
   RA = (nia + delayslot_instruction_size) | ISA_MODE_MICROMIPS;
   return delayslot_micromips (SD_, target, nia, delayslot_instruction_size);
@@ -72,6 +81,8 @@
 
 
 :function:::unsigned32:compute_movep_src_reg:int reg
+*micromips32:
+*micromips64:
 {
   switch(reg)
     {
@@ -88,6 +99,8 @@
 }
 
 :function:::unsigned32:compute_andi16_imm:int encoded_imm
+*micromips32:
+*micromips64:
 {
   switch (encoded_imm)
     {
@@ -112,6 +125,8 @@
 }
 
 :function:::FP_formats:convert_fmt_micromips:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {
@@ -123,6 +138,8 @@
 }
 
 :function:::FP_formats:convert_fmt_micromips_cvt_d:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {
@@ -135,6 +152,8 @@
 
 
 :function:::FP_formats:convert_fmt_micromips_cvt_s:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {
@@ -2252,6 +2271,8 @@
 
 
 :%s::::FMT_MICROMIPS:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {
@@ -2264,6 +2285,8 @@
 
 
 :%s::::FMT_MICROMIPS_CVT_D:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {
@@ -2276,6 +2299,8 @@
 
 
 :%s::::FMT_MICROMIPS_CVT_S:int fmt
+*micromips32:
+*micromips64:
 {
   switch (fmt)
     {