mem: Move the Rank construction logic to the Rank constructor

This change was made so Rank objects have their name assigned
when they are instantiated. Therefore, they can initialize their
member objects with their name and it is less likely to change during
runtime.

(NOTE: I would recommend hiding the fields which would cause the name to
change behind getters. Since modification of `Rank.rank` during runtime
will cause the `name()` to change.)

Change-Id: Id51c3553b40e489792c57950e18b8ce927e43173
Signed-off-by: Sean Wilson <spwilson2@wisc.edu>
Reviewed-on: https://gem5-review.googlesource.com/3742
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>

diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 4398611e5fa35af897f5f0a02b391b646e6f7980..9e5c00b0e3a4eaf8be6d01e6cf5e74c679b2f029 100644 (file)
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -104,32 +104,8 @@ DRAMCtrl::DRAMCtrl(const DRAMCtrlParams* p) :
              "must be a power of two\n", burstSize);
 
     for (int i = 0; i < ranksPerChannel; i++) {
-        Rank* rank = new Rank(*this, p);
+        Rank* rank = new Rank(*this, p, i);
         ranks.push_back(rank);
-
-        rank->actTicks.resize(activationLimit, 0);
-        rank->banks.resize(banksPerRank);
-        rank->rank = i;
-
-        for (int b = 0; b < banksPerRank; b++) {
-            rank->banks[b].bank = b;
-            // GDDR addressing of banks to BG is linear.
-            // Here we assume that all DRAM generations address bank groups as
-            // follows:
-            if (bankGroupArch) {
-                // Simply assign lower bits to bank group in order to
-                // rotate across bank groups as banks are incremented
-                // e.g. with 4 banks per bank group and 16 banks total:
-                //    banks 0,4,8,12  are in bank group 0
-                //    banks 1,5,9,13  are in bank group 1
-                //    banks 2,6,10,14 are in bank group 2
-                //    banks 3,7,11,15 are in bank group 3
-                rank->banks[b].bankgr = b % bankGroupsPerRank;
-            } else {
-                // No bank groups; simply assign to bank number
-                rank->banks[b].bankgr = b;
-            }
-        }
     }
 
     // perform a basic check of the write thresholds
@@ -1626,16 +1602,37 @@ DRAMCtrl::minBankPrep(const deque<DRAMPacket*>& queue,
     return make_pair(bank_mask, hidden_bank_prep);
 }
 
-DRAMCtrl::Rank::Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p)
+DRAMCtrl::Rank::Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p, int rank)
     : EventManager(&_memory), memory(_memory),
       pwrStateTrans(PWR_IDLE), pwrStatePostRefresh(PWR_IDLE),
       pwrStateTick(0), refreshDueAt(0), pwrState(PWR_IDLE),
-      refreshState(REF_IDLE), inLowPowerState(false), rank(0),
+      refreshState(REF_IDLE), inLowPowerState(false), rank(rank),
       readEntries(0), writeEntries(0), outstandingEvents(0),
-      wakeUpAllowedAt(0), power(_p, false), numBanksActive(0),
+      wakeUpAllowedAt(0), power(_p, false), banks(_p->banks_per_rank),
+      numBanksActive(0), actTicks(_p->activation_limit, 0),
       writeDoneEvent(*this), activateEvent(*this), prechargeEvent(*this),
       refreshEvent(*this), powerEvent(*this), wakeUpEvent(*this)
-{ }
+{
+    for (int b = 0; b < _p->banks_per_rank; b++) {
+        banks[b].bank = b;
+        // GDDR addressing of banks to BG is linear.
+        // Here we assume that all DRAM generations address bank groups as
+        // follows:
+        if (_p->bank_groups_per_rank > 0) {
+            // Simply assign lower bits to bank group in order to
+            // rotate across bank groups as banks are incremented
+            // e.g. with 4 banks per bank group and 16 banks total:
+            //    banks 0,4,8,12  are in bank group 0
+            //    banks 1,5,9,13  are in bank group 1
+            //    banks 2,6,10,14 are in bank group 2
+            //    banks 3,7,11,15 are in bank group 3
+            banks[b].bankgr = b % _p->bank_groups_per_rank;
+        } else {
+            // No bank groups; simply assign to bank number
+            banks[b].bankgr = b;
+        }
+    }
+}
 
 void
 DRAMCtrl::Rank::startup(Tick ref_tick)

diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
index 12cb0e92231f61782f95973ecf901ccb5239a3f2..1883041ccc4e4bb5256d0b64caec7901466dfba8 100644 (file)
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -451,7 +451,7 @@ class DRAMCtrl : public AbstractMemory
         /** List to keep track of activate ticks */
         std::deque<Tick> actTicks;
 
-        Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p);
+        Rank(DRAMCtrl& _memory, const DRAMCtrlParams* _p, int rank);
 
         const std::string name() const
         {