add missing addpcis to power_enums.py and minor_19.csv

diff --git a/openpower/isatables/minor_19.csv b/openpower/isatables/minor_19.csv
index 66f4c803e1e8f1b453d8c5e41b1b75c14a4fc9c2..887c2843d9b0fc912454831c4562923c3e18530f 100644 (file)
--- a/openpower/isatables/minor_19.csv
+++ b/openpower/isatables/minor_19.csv
@@ -16,3 +16,4 @@ opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry in,cry ou
 0010010110,ALU,OP_ISYNC,NONE,NONE,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,1,isync,XL,
 0000010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,rfid,XL,
 0100010010,TRAP,OP_RFID,SPR,SPR,NONE,NONE,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,0,hrfid,XL,
+-----00010,ALU,OP_ADD,CIA,CONST_DXHI4,NONE,RT,NONE,NONE,0,0,ZERO,0,NONE,0,0,0,0,0,0,NONE,0,1,addpcis,DX

diff --git a/src/openpower/decoder/power_enums.py b/src/openpower/decoder/power_enums.py
index 365ced69b20825c623ffc732d1f116e28d5851ea..9a5622e30693622fe8c2085ba1622311731cfd93 100644 (file)
--- a/src/openpower/decoder/power_enums.py
+++ b/src/openpower/decoder/power_enums.py
@@ -627,6 +627,7 @@ class In1Sel(Enum):
     RS = 4  # for some ALU/Logical operations
     FRA = 5
     FRS = 6
+    CIA = 7 # for addpcis
 
 
 @unique
@@ -649,6 +650,7 @@ class In2Sel(Enum):
     CONST_SVD = 15  # for SVD-Form
     CONST_SVDS = 16  # for SVDS-Form
     CONST_XBI = 17
+    CONST_DXHI4 = 18 # for addpcis
 
 
 @unique