(no commit message)

diff --git a/business_plan.mdwn b/business_plan.mdwn
index c86221de814e38194a175d09a56c57174443a7f8..235b08cc4ceecd26868bff99717cf3d07689f648 100644 (file)
--- a/business_plan.mdwn
+++ b/business_plan.mdwn
@@ -6,12 +6,22 @@
 
 ```What does it do and what makes it different?```
 
+Luke Original:
+
 Our products are hybrid 3D and Video processors (SoCs) that are designed to be more efficient, use less power and be easier and less cost to integrate into products such as smartphones, netbooks, chromebooks, tablets, Industrial IoT, routers, IPTV and many more.
 
 At the hardware level we achieve this by extending OpenPOWER with an innovative Vector ISA that merges 3D, Video and CPU into one single hybrid processor.  At the software level we engage closely with community resources and partners to ensure upstream collaboration.  Complexity is reduced, time to market is reduced, power consumption is reduced.
 
 A typical SoC licenses separate closed-source CPU and closed-source GPU, introducing huge complexity in the drivers and limiting innovation opportunities for the customer.  We provide the full source code even for the processor HDL, and full firmware source.  This allows customers to audit it in full (a critical requirement for secure environments).
 
+Cole edits:
+
+Our products are Systems on Chips (SoCs) that excel at providing the functionality consumers expect from their smartphones, laptops, chromebooks, tablets, Industrial IoT devices, routers, IPTVs, and more. Our SoCs have superior power efficiency, cost less, and are significantly easier to integrate into new and existing designs than existing solutions.
+
+We accomplish this at the hardware level we achieve this by extending the OpenPOWER Instruction Set Architecture (ISA) with an innovative Vector system that merges 3D graphics, video and general purpose processing normal provided by a separate CPU into a single Hybrid Processing Unit (HPU). We engage closely with  partners and other organizations to ensure upstream software compatibility, collaborating with the libre software community to ensure our libre hardware works at least as well as proprietary hardware. 
+
+A typical SoC will license a closed-source CPU and a separate closed-source GPU. This results in incredibly complex drivers, limiting innovation opportunities for the customer, and substantially increasing development cost and duration. We provide the full source code our processor, including the RTL, as well as the full firmware source which allows customers to audit it in full – a critical requirement for secure environments. This approach combined with the hardware innovations results in a dramatic reduction in complexity, power consumption and time to market.
+
 # Goals.
 
 ```What does the business want to achieve? This should set some SMART objectives that will quickly show if the business is succeeding.```
@@ -20,6 +30,8 @@ A typical SoC licenses separate closed-source CPU and closed-source GPU, introdu
      Keep it simple – three big goals supported by clear
      targeted actions to get you there
 
+Luke Original:
+
 Our very early goals are to develop a low-cost 180/130nm Gigabit router product with built-in cryptographic primitives and direct packet routing.  Timescale is end of Q4 2021 and using Google Skywater 130nm "Libre" MPW for a test ASIC. 
 
 The second product is a 28nm (or lower) Quad-Core competitor to the ASpeed 2600, a Boot Management Console SoC used to manage Servers in Cloud Computing Data Centres world-wide.  The product will also be suitable as a SBC (Single Board Computer) with "Raspberry Pi" style interfaces and, with both USB-C, PCIe host and client, can act as an independent low-power affordable Graphics Card (a 3D version of the Volari X11) with modest 3D and Video capabilities for use typically in Data Centres and Embedded Industrial PCs, as well as a USB-C Graphics Adapter (similar to DisplayLink products). Timescale is end of Q2 2022.
@@ -28,6 +40,12 @@ The long-term products are intended to reach mass-volume adoption of 100 to 500
 
 Additionally we seek to establish ourselves as a "Solutions Provider", developing custom-targetted high performance, high efficiency processors as part of full product design and delivery.  This through leveraging abd engaging professional community and partner resources with the highest level of exertise in the customer's market.
 
+Cole (incomplete) edits:
+
+The first product in development is a low-cost Gigabit ethernet router, with built-in cryptographic primitives and direct packet routing. We plan on manufacturing it on the 180nm/130nm silicon process. Long established silicon giants like AMD, Intel, Nvidia, Qualcomm, and Apple frequently need to ‘tape out’ their designs multiple times before getting working chips. By using an older and much cheaper process like 180nm/130nm we are able us to bring our first commercial product to market while minimizing the risk to our investors. This product is projected to begin production at the end of Q4 2021 using Google Skywater 130nm "Libre" Multi Project Wafer (MPW) for a test ASIC in Q2 2021.
+
+The second product in development is a 28nm/20nm Quad-Core Baseboard Management Controller (BMC) SoC. BMCs are present on almost every server motherboard – they are used to manage servers in Cloud Computing Data Centres world-wide. The current market leader in this niche is the ASpeed 2600, a 28nm dual core ARM CPU with an embedded microcontroller, capable of 1080p60 video over PCIe VGA. Our product will provide over twice the…
+
 # Your audience and the market.
 
 ```Who will your business supply and how will it reach them? How big is the market and who are your key competitors?```