intel/compiler: Don't repeat dispatch max fixing condition
authorKenneth Graunke <kenneth@whitecape.org>
Fri, 3 May 2019 21:28:51 +0000 (14:28 -0700)
committerKenneth Graunke <kenneth@whitecape.org>
Tue, 14 May 2019 20:16:27 +0000 (13:16 -0700)
Having a single flag will keep both places in sync if the condition
gets more complicated.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/compiler/brw_fs.cpp

index 8fda5ce2af9ff4e893543968144f181c3fd6fb45..9d05800d1fe03ab810e4bd852e34670f5987505a 100644 (file)
@@ -7437,8 +7437,11 @@ fs_visitor::run_tcs_single_patch()
    /* Initialize gl_InvocationID */
    set_tcs_invocation_id();
 
+   const bool fix_dispatch_mask =
+      (nir->info.tess.tcs_vertices_out % 8) != 0;
+
    /* Fix the disptach mask */
-   if (nir->info.tess.tcs_vertices_out % 8) {
+   if (fix_dispatch_mask) {
       bld.CMP(bld.null_reg_ud(), invocation_id,
               brw_imm_ud(nir->info.tess.tcs_vertices_out), BRW_CONDITIONAL_L);
       bld.IF(BRW_PREDICATE_NORMAL);
@@ -7446,7 +7449,7 @@ fs_visitor::run_tcs_single_patch()
 
    emit_nir_code();
 
-   if (nir->info.tess.tcs_vertices_out % 8) {
+   if (fix_dispatch_mask) {
       bld.emit(BRW_OPCODE_ENDIF);
    }