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diff --git a/cole.mdwn b/cole.mdwn
index e0deb1f421705c812605e78cf5713cd472b76c53..daf4019bb73740d98a2428f57da768172354795b 100644 (file)
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -8,7 +8,7 @@ List of things that need more fleshed out bug reports:
 
 * Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG
 * Bperm tutorial
-* Bugseverywhere
+* Bugseverywhere (or also https://github.com/MichaelMure/git-bug/blob/master/bug/bug.go)
 * Competition to LS: Skywater 130nm production-ready PDK gets opensourced (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008254.html)
 * Memory bus/L1/L2 Cache documentation  (bug #397)
 * Scoreboard documentation (http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-June/008287.html)