+2015-08-14 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Add support
+ for skylake.
+ * config/i386/i386.c (PTA_SKYLAKE): New macros.
+ (processor_alias_table): Add skylake description.
+ (enum processor_model): Add skylake processor.
+ (arch_names_table): Add skylake record.
+ * doc/invoke.texi: Add skylake item.
+
2015-08-13 Andrew MacLeod <amacleod@redhat.com>
* ira-int.h: Include recog.h.
/* Broadwell. */
cpu = "broadwell";
break;
+ case 0x4e:
+ case 0x5e:
+ /* Skylake. */
+ cpu = "skylake";
+ break;
case 0x57:
/* Knights Landing. */
cpu = "knl";
| PTA_FMA | PTA_MOVBE | PTA_HLE)
#define PTA_BROADWELL \
(PTA_HASWELL | PTA_ADX | PTA_PRFCHW | PTA_RDSEED)
+#define PTA_SKYLAKE \
+ (PTA_BROADWELL | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES)
#define PTA_KNL \
(PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD)
#define PTA_BONNELL \
{"haswell", PROCESSOR_HASWELL, CPU_NEHALEM, PTA_HASWELL},
{"core-avx2", PROCESSOR_HASWELL, CPU_NEHALEM, PTA_HASWELL},
{"broadwell", PROCESSOR_HASWELL, CPU_NEHALEM, PTA_BROADWELL},
+ {"skylake", PROCESSOR_HASWELL, CPU_NEHALEM, PTA_SKYLAKE},
{"bonnell", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
{"atom", PROCESSOR_BONNELL, CPU_ATOM, PTA_BONNELL},
{"silvermont", PROCESSOR_SILVERMONT, CPU_SLM, PTA_SILVERMONT},
M_AMDFAM15H_BDVER4,
M_INTEL_COREI7_IVYBRIDGE,
M_INTEL_COREI7_HASWELL,
- M_INTEL_COREI7_BROADWELL
+ M_INTEL_COREI7_BROADWELL,
+ M_INTEL_COREI7_SKYLAKE
};
static struct _arch_names_table
{"ivybridge", M_INTEL_COREI7_IVYBRIDGE},
{"haswell", M_INTEL_COREI7_HASWELL},
{"broadwell", M_INTEL_COREI7_BROADWELL},
+ {"skylake", M_INTEL_COREI7_SKYLAKE},
{"bonnell", M_INTEL_BONNELL},
{"silvermont", M_INTEL_SILVERMONT},
{"knl", M_INTEL_KNL},
SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
BMI, BMI2, F16C, RDSEED, ADCX and PREFETCHW instruction set support.
+@item skylake
+Intel Skylake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3,
+SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA,
+BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC and
+XSAVES instruction set support.
+
@item bonnell
Intel Bonnell CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3 and SSSE3
instruction set support.
+2015-08-14 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ * gcc.target/i386/builtin_target.c: Add skylake check.
+
2015-08-13 Jeff Law <law@redhat.com>
* gcc.dg/pr66314.c: Moved from here to ..
assert (__builtin_cpu_is ("corei7"));
assert (__builtin_cpu_is ("broadwell"));
break;
+ case 0x4e:
+ case 0x5e:
+ /* Skylake. */
+ assert (__builtin_cpu_is ("corei7"));
+ assert (__builtin_cpu_is ("skylake"));
+ break;
case 0x17:
case 0x1d:
/* Penryn. */
+2015-08-14 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ * config/i386/cpuinfo.c (enum processor_subtypes): Add skylake.
+ (get_intel_cpu): Likewise.
+
2015-08-12 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/cpuinfo.c (processor_types): Add INTEL_KNL.
INTEL_COREI7_IVYBRIDGE,
INTEL_COREI7_HASWELL,
INTEL_COREI7_BROADWELL,
+ INTEL_COREI7_SKYLAKE,
CPU_SUBTYPE_MAX
};
__cpu_model.__cpu_type = INTEL_COREI7;
__cpu_model.__cpu_subtype = INTEL_COREI7_BROADWELL;
break;
+ case 0x4e:
+ case 0x5e:
+ /* Skylake. */
+ __cpu_model.__cpu_type = INTEL_COREI7;
+ __cpu_model.__cpu_subtype = INTEL_COREI7_SKYLAKE;
+ break;
case 0x17:
case 0x1d:
/* Penryn. */