radeon/UVD: fix the decoding target pitch calculation

The firmware expects the value in pixel not bytes. Didn't made a difference
so far because we only used 8bpp surfaces.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Mark Thompson <sw@jkqxz.net>

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index f1339d121b70d10356ca1e07cee8946c209c79fa..7a08c81cbc0e0beb704bd16fbdb5f6a7d28530b4 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1354,7 +1354,7 @@ static unsigned bank_wh(unsigned bankwh)
 void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma,
                          struct radeon_surf *chroma)
 {
-       msg->body.decode.dt_pitch = luma->level[0].nblk_x * luma->bpe;
+       msg->body.decode.dt_pitch = luma->level[0].nblk_x;
        switch (luma->level[0].mode) {
        case RADEON_SURF_MODE_LINEAR_ALIGNED:
                msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;